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1. 发明授权

US07391644B2 Phase-changeable memory device and read method thereof 有权
标题翻译：相变存储器件及其读取方法
公开(公告)号：US07391644B2
公开(公告)日：2008-06-24
申请号：US11605212
申请日：2006-11-29
申请人： Woo-Yeong Cho , Byung-Gil Choi , Du-Eung Kim , Hyung-Rok Oh , Beak-Hyung Cho , Yu-Hwan Ro
发明人： Woo-Yeong Cho , Byung-Gil Choi , Du-Eung Kim , Hyung-Rok Oh , Beak-Hyung Cho , Yu-Hwan Ro
IPC分类号： G11C11/00
CPC分类号： G11C8/10 , G11C13/0004 , G11C13/004 , G11C2013/0054 , G11C2213/72
摘要： Disclosed is a phase-changeable memory device and a related method of reading data. The memory device is comprised of memory cells, a high voltage circuit, a precharging circuit, a bias circuit, and a sense amplifier. Each memory cell includes a phase-changeable material and a diode connected to a bitline. The high voltage circuit provides a high voltage from a power source. The precharging circuit raises the bitline up to the high voltage after charging the bitline up to the power source voltage. The bias circuit supplies a read current to the bitline by means of the high voltage. The sense amplifier compares a voltage of the bitline with a reference voltage by means of the high voltage, and reads data from the memory cell. The memory device is able to reduce the burden on the high voltage circuit during the precharging operation, thus assuring a sufficient sensing margin during the sensing operation.
摘要翻译：公开了一种可变相存储器件和读取数据的相关方法。存储器件包括存储器单元，高压电路，预充电电路，偏置电路和读出放大器。每个存储单元包括相位可变材料和连接到位线的二极管。高压电路从电源提供高电压。预充电电路将位线充电至电源电压后，将位线升高至高电压。偏置电路通过高电压向位线提供读取电流。读出放大器通过高电压将位线的电压与参考电压进行比较，并从存储单元读取数据。存储器件能够减少在预充电操作期间对高压电路的负担，从而在感测操作期间确保足够的感测余量。

2. 发明申请

US20070230240A1 Phase change memory device and related programming method 有权
标题翻译：相变存储器件及相关编程方法
公开(公告)号：US20070230240A1
公开(公告)日：2007-10-04
申请号：US11724268
申请日：2007-03-15
申请人： Byung-Gil Choi , Du-Eung Kim , Beak-Hyung Cho , Woo-Yeong Cho
发明人： Byung-Gil Choi , Du-Eung Kim , Beak-Hyung Cho , Woo-Yeong Cho
IPC分类号： G11C11/00
CPC分类号： G11C8/10 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0078 , G11C2213/72
摘要： A phase change memory device comprises a memory cell array and a write driver circuit. The memory cell array comprises a plurality of memory cells, and the write driver circuit comprises a set current driver and a reset current driver. The set current driver is adapted to provide a set current to a selected memory cell among the plurality of memory cells and the reset current driver is adapted to provide a reset current to a selected memory cell among the plurality of memory cells.
摘要翻译：相变存储器件包括存储单元阵列和写入驱动器电路。存储单元阵列包括多个存储单元，并且写驱动器电路包括设定电流驱动器和复位电流驱动器。所设置的电流驱动器适于向所述多个存储器单元中的所选择的存储单元提供设定电流，并且所述复位电流驱动器适于向所述多个存储器单元中的所选存储单元提供复位电流。

3. 发明申请

US20070230239A1 Phase change memory devices and program methods 有权
标题翻译：相变存储器件和程序方法
公开(公告)号：US20070230239A1
公开(公告)日：2007-10-04
申请号：US11723354
申请日：2007-03-19
申请人： Byung-Gil Choi , Du-Eung Kim , Yu-Hwan Ro , Joon-Yong Choi , Beak-Hyung Cho , Woo-Yeong Cho
发明人： Byung-Gil Choi , Du-Eung Kim , Yu-Hwan Ro , Joon-Yong Choi , Beak-Hyung Cho , Woo-Yeong Cho
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C2013/0078 , G11C2213/72
摘要： A phase change memory device is disclosed. It includes a memory cell array including a plurality of memory cells programmed in relation to a phase change material, and a write driver circuit configured to provide a set current and a reset current to a selected memory cell. The write driver circuit includes a set current driver configured to provide the set current and a reset current driver configured to provide the reset current.
摘要翻译：公开了一种相变存储器件。其包括存储单元阵列，其包括相对于相变材料编程的多个存储器单元，以及写入驱动器电路，其被配置为向所选存储单元提供置位电流和复位电流。写驱动器电路包括配置成提供设定电流的设定电流驱动器和被配置为提供复位电流的复位电流驱动器。

4. 发明授权

US07511993B2 Phase change memory device and related programming method 有权
标题翻译：相变存储器件及相关编程方法
公开(公告)号：US07511993B2
公开(公告)日：2009-03-31
申请号：US11724268
申请日：2007-03-15
申请人： Byung-Gil Choi , Du-Eung Kim , Beak-Hyung Cho , Woo-Yeong Cho
发明人： Byung-Gil Choi , Du-Eung Kim , Beak-Hyung Cho , Woo-Yeong Cho
IPC分类号： G11C11/00
CPC分类号： G11C8/10 , G11C11/5678 , G11C13/0004 , G11C13/0069 , G11C2013/0078 , G11C2213/72
摘要： A phase change memory device comprises a memory cell array and a write driver circuit. The memory cell array comprises a plurality of memory cells, and the write driver circuit comprises a set current driver and a reset current driver. The set current driver is adapted to provide a set current to a selected memory cell among the plurality of memory cells and the reset current driver is adapted to provide a reset current to a selected memory cell among the plurality of memory cells.
摘要翻译：相变存储器件包括存储单元阵列和写入驱动器电路。存储单元阵列包括多个存储单元，并且写驱动器电路包括设定电流驱动器和复位电流驱动器。所设置的电流驱动器适于向所述多个存储器单元中的所选择的存储单元提供设定电流，并且所述复位电流驱动器适于向所述多个存储器单元中的所选存储单元提供复位电流。

5. 发明申请

US20070133271A1 Phase-changeable memory device and read method thereof 有权
标题翻译：相变存储器件及其读取方法
公开(公告)号：US20070133271A1
公开(公告)日：2007-06-14
申请号：US11605212
申请日：2006-11-29
申请人： Woo-Yeong Cho , Byung-Gil Choi , Du-Eung Kim , Hyung-Rok Oh , Beak-Hyung Cho , Yu-Hwan Ro
发明人： Woo-Yeong Cho , Byung-Gil Choi , Du-Eung Kim , Hyung-Rok Oh , Beak-Hyung Cho , Yu-Hwan Ro
IPC分类号： G11C11/00
CPC分类号： G11C8/10 , G11C13/0004 , G11C13/004 , G11C2013/0054 , G11C2213/72
摘要： Disclosed is a phase-changeable memory device and a related method of reading data. The memory device is comprised of memory cells, a high voltage circuit, a precharging circuit, a bias circuit, and a sense amplifier. Each memory cell includes a phase-changeable material and a diode connected to a bitline. The high voltage circuit provides a high voltage from a power source. The precharging circuit raises the bitline up to the high voltage after charging the bitline up to the power source voltage. The bias circuit supplies a read current to the bitline by means of the high voltage. The sense amplifier compares a voltage of the bitline with a reference voltage by means of the high voltage, and reads data from the memory cell. The memory device is able to reduce the burden on the high voltage circuit during the precharging operation, thus assuring a sufficient sensing margin during the sensing operation.
摘要翻译：公开了一种可变相存储器件和读取数据的相关方法。存储器件包括存储器单元，高压电路，预充电电路，偏置电路和读出放大器。每个存储单元包括相位可变材料和连接到位线的二极管。高压电路从电源提供高电压。预充电电路将位线充电至电源电压后，将位线升高至高电压。偏置电路通过高电压向位线提供读取电流。读出放大器通过高电压将位线的电压与参考电压进行比较，并从存储单元读取数据。存储器件能够减少在预充电操作期间对高压电路的负担，从而在感测操作期间确保足够的感测余量。

6. 发明授权

US07499316B2 Phase change memory devices and program methods 有权
标题翻译：相变存储器件和程序方法
公开(公告)号：US07499316B2
公开(公告)日：2009-03-03
申请号：US11723354
申请日：2007-03-19
申请人： Byung-Gil Choi , Du-Eung Kim , Yu-Hwan Ro , Joon-Yong Choi , Beak-Hyung Cho , Woo-Yeong Cho
发明人： Byung-Gil Choi , Du-Eung Kim , Yu-Hwan Ro , Joon-Yong Choi , Beak-Hyung Cho , Woo-Yeong Cho
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C2013/0078 , G11C2213/72
摘要： A phase change memory device is disclosed. It includes a memory cell array including a plurality of memory cells programmed in relation to a phase change material, and a write driver circuit configured to provide a set current and a reset current to a selected memory cell. The write driver circuit includes a set current driver configured to provide the set current and a reset current driver configured to provide the reset current.
摘要翻译：公开了一种相变存储器件。其包括存储单元阵列，其包括相对于相变材料编程的多个存储器单元，以及写入驱动器电路，其被配置为向所选存储单元提供置位电流和复位电流。写驱动器电路包括配置成提供设定电流的设定电流驱动器和被配置为提供复位电流的复位电流驱动器。

7. 发明授权

US07668007B2 Memory system including a resistance variable memory device 有权
标题翻译：存储器系统包括电阻变量存储器件
公开(公告)号：US07668007B2
公开(公告)日：2010-02-23
申请号：US12124523
申请日：2008-05-21
申请人： Byung-Gil Choi , Woo-Yeong Cho , Du-Eung Kim , Hyung-Rok Oh , Beak-Hyung Cho , Yu-Hwan Ro
发明人： Byung-Gil Choi , Woo-Yeong Cho , Du-Eung Kim , Hyung-Rok Oh , Beak-Hyung Cho , Yu-Hwan Ro
IPC分类号： G11C11/00
CPC分类号： G11C8/10 , G11C13/0004 , G11C13/004 , G11C2013/0054 , G11C2213/72
摘要： A memory system includes a resistance variable memory device, and a memory controller for controlling the resistance variable memory device. The resistance variable memory device includes a memory cell connected to a bitline, a high voltage circuit adapted to generate a high voltage from an externally provided power source voltage, where the high voltage is higher than the power source voltage, a precharging circuit adapted to charge the bitline to the power source voltage and further charge the bitline to the high voltage, a bias circuit adapted to provide a read current to the bitline with using the high voltage, and a sense amplifier adapted to detect a voltage level of the bitline with using the high voltage.
摘要翻译：存储器系统包括电阻可变存储器件和用于控制电阻变化存储器件的存储器控制器。电阻可变存储器件包括连接到位线的存储单元，适于从外部提供的电源电压产生高电压的高压电路，其中高电压高于电源电压，预充电电路适于充电位线到电源电压并进一步将位线充电到高电压，偏置电路适于使用高电压向位线提供读取电流;以及读出放大器，其适于使用来检测位线的电压电平高电压。

8. 发明申请

US20080232161A1 RESISTANCE VARIABLE MEMORY DEVICE AND READ METHOD THEREOF 有权
标题翻译：电阻可变存储器件及其读取方法
公开(公告)号：US20080232161A1
公开(公告)日：2008-09-25
申请号：US12124523
申请日：2008-05-21
申请人： Byung-Gil Choi , Woo-Yeong Cho , Du-Eung Kim , Hyung-Rok Oh , Beak-Hyung Cho , Yu-Hwan Ro
发明人： Byung-Gil Choi , Woo-Yeong Cho , Du-Eung Kim , Hyung-Rok Oh , Beak-Hyung Cho , Yu-Hwan Ro
IPC分类号： G11C11/00
CPC分类号： G11C8/10 , G11C13/0004 , G11C13/004 , G11C2013/0054 , G11C2213/72
摘要： A memory system includes a resistance variable memory device, and a memory controller for controlling the resistance variable memory device. The resistance variable memory device includes a memory cell connected to a bitline, a high voltage circuit adapted to generate a high voltage from an externally provided power source voltage, where the high voltage is higher than the power source voltage, a precharging circuit adapted to charge the bitline to the power source voltage and further charge the bitline to the high voltage, a bias circuit adapted to provide a read current to the bitline with using the high voltage, and a sense amplifier adapted to detect a voltage level of the bitline with using the high voltage.
摘要翻译：存储器系统包括电阻可变存储器件和用于控制电阻变化存储器件的存储器控制器。电阻可变存储器件包括连接到位线的存储单元，适于从外部提供的电源电压产生高电压的高压电路，其中高电压高于电源电压，预充电电路适于充电位线到电源电压并进一步将位线充电到高电压，偏置电路适于使用高电压向位线提供读取电流;以及读出放大器，其适于使用来检测位线的电压电平高电压。

9. 发明申请

US20060274574A1 Phase-change memory device and method of writing a phase-change memory device 有权
公开(公告)号：US20060274574A1
公开(公告)日：2006-12-07
申请号：US11502563
申请日：2006-08-11
申请人： Byung-Gil Choi , Choong-Keun Kwak , Du-Eung Kim , Beak-Hyung Cho
发明人： Byung-Gil Choi , Choong-Keun Kwak , Du-Eung Kim , Beak-Hyung Cho
IPC分类号： G11C11/00
CPC分类号： G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C2013/0078 , G11C2013/0092
摘要： A phase-change cell memory device includes a plurality of phase-change memory cells, an address circuit, a write driver, and a write driver control circuit. The phase-change memory cells each include a volume of material that is programmable between amorphous and crystalline states. The address circuit selects at least one of the memory cells, and the write driver generates a reset pulse current to program a memory cell selected by the address circuit into the amorphous state, and a set pulse current to program the memory cell selected by the address circuit into the crystalline state. The write driver control circuit varies at least one of a pulse width and a pulse count of at least one of the reset and set pulse currents according to a load between the write driver and the memory cell selected by the address circuit.

10. 发明申请

US20110242886A1 Apparatus and Systems Using Phase Change Memories 有权
标题翻译：使用相变记忆的装置和系统
公开(公告)号：US20110242886A1
公开(公告)日：2011-10-06
申请号：US13091238
申请日：2011-04-21
申请人： Beak-Hyung Cho , Du-Eung Kim , Woo-Yeong Cho
发明人： Beak-Hyung Cho , Du-Eung Kim , Woo-Yeong Cho
IPC分类号： G11C11/21
CPC分类号： G11C13/0069 , G11C13/0004 , G11C2013/0078 , G11C2013/0092
摘要： Apparatus and systems that use phase-change memory devices are provided. The phase-change memory devices may include multiple phase-change memory cells and a reset pulse generation circuit configured to output multiple sequential reset pulses. Each sequential reset pulse is output to a corresponding one of multiple reset lines. Multiple write driver circuits are coupled to corresponding phase change memory cells and to a corresponding one of the reset lines of the reset pulse generation circuit.
摘要翻译：提供了使用相变存储器件的装置和系统。相变存储器件可以包括多个相变存储器单元和被配置为输出多个顺序复位脉冲的复位脉冲发生电路。每个顺序复位脉冲被输出到多个复位线中相应的一个。多个写入驱动器电路耦合到相应的相变存储器单元和复位脉冲发生电路的相应的一个复位线。

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