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1. 发明授权

US5727184A Method and apparatus for interfacing between peripherals of multiple formats and a single system bus 失效
公开(公告)号：US5727184A
公开(公告)日：1998-03-10
申请号：US266975
申请日：1994-06-27
申请人： Bryan M. Richter , Stephen A. Smith , Daniel G. Bezzant , Kasturiraman Gopalaswamy , Suhas Anand Shetty , Arunachalam Vaidyanathan
发明人： Bryan M. Richter , Stephen A. Smith , Daniel G. Bezzant , Kasturiraman Gopalaswamy , Suhas Anand Shetty , Arunachalam Vaidyanathan
IPC分类号： G06F13/38 , G06F13/10 , G06F5/01
CPC分类号： G06F13/385
摘要： A peripheral interface system and apparatus including a pair of integrated circuits, referred to as a system adapter and a socket controller, use a communication protocol, referred to as a windowed-interchip-communication protocol, to interface peripherals, such as PCMCIA cards or infrared devices, and other subsystems having different formats with a CPU system bus. The system adapter communicates to a hard disk drive subsystem using the ATA communication standards to interface an ATA hard disk drive with the CPU system bus. Communication between the system adapter and the socket controller, which communicates with PCMCIA peripheral cards and IR peripherals, is accomplished using the windowed-interchip-communication protocol which may share hardware resources with other communication protocols. Communication between the system adapter and the hard disk drive and between the system adapter and the socket controller may be provided on the same chain of a standard 40 signal ribbon cable. Alternatively communication between an expansion board and a socket controller may be performed across a cable separate from the hard disk drives having a different signal line format. The system adapter may be included within a single interface expansion board which can be connected to the motherboard and CPU system bus or it can be directly connected or soldered to the motherboard and communicate with the socket controller and ATA hard disk drives using one or more busses.

2. 发明授权

US5905885A Method and apparatus for interfacing between peripherals of multiple formats and a single system bus 失效
标题翻译：用于连接多种格式的外围设备和单个系统总线的方法和装置
公开(公告)号：US5905885A
公开(公告)日：1999-05-18
申请号：US933884
申请日：1997-09-19
申请人： Bryan M. Richter , Stephen A. Smith , Daniel G. Bezzant , Kasturiraman Gopalaswamy , Suhas Anand Shetty , Arunachalam Vaidyanathan
发明人： Bryan M. Richter , Stephen A. Smith , Daniel G. Bezzant , Kasturiraman Gopalaswamy , Suhas Anand Shetty , Arunachalam Vaidyanathan
IPC分类号： G06F13/38 , G06F13/10 , G06F5/01
CPC分类号： G06F13/385
摘要： A peripheral interface system and apparatus including a pair of integrated circuits, referred to as a system adapter and a socket controller, use a communication protocol, referred to as a windowed-interchip-communication protocol, to interface peripherals, such as PCMCIA cards or infrared devices, and other subsystems having different formats with a CPU system bus. The system adapter communicates to a hard disk drive subsystem using the ATA communication standards to interface an ATA hard disk drive with the CPU system bus. Communication between the system adapter and the socket controller, which communicates with PCMCIA peripheral cards and IR peripherals, is accomplished using the windowed-interchip-communication protocol which may share hardware resources with other communication protocols. Communication between the system adapter and the hard disk drive and between the system adapter and the socket controller may be provided on the same chain of a standard 40 signal ribbon cable. Alternatively communication between an expansion board and a socket controller may be performed across a cable separate from the hard disk drives having a different signal line format. The system adapter may be included within a single interface expansion board which can be connected to the motherboard and CPU system bus or it can be directly connected or soldered to the motherboard and communicate with the socket controller and ATA hard disk drives using one or more busses.
摘要翻译：被称为系统适配器和插座控制器的包括一对集成电路的外围接口系统和设备使用称为窗口 - 芯片间通信协议的通信协议来接口诸如PCMCIA卡或红外线设备和具有CPU系统总线的具有不同格式的其他子系统。系统适配器使用ATA通信标准与硬盘驱动器子系统进行通信，以将ATA硬盘驱动器与CPU系统总线进行接口。与PCMCIA外设卡和IR外围设备通信的系统适配器和插座控制器之间的通信使用可与其他通信协议共享硬件资源的窗口 - 芯片间通信协议实现。系统适配器和硬盘驱动器之间以及系统适配器和插座控制器之间的通信可以提供在标准40信号带状电缆的同一链上。备选地，扩展板和插座控制器之间的通信可以与具有不同信号线格式的硬盘驱动器分离的电缆进行。系统适配器可以包括在可以连接到主板和CPU系统总线的单个接口扩展板中，或者可以直接连接或焊接到主板，并使用一个或多个总线与插座控制器和ATA硬盘驱动器进行通信。

3. 发明授权

US5440244A Method and apparatus for controlling a mixed voltage interface in a multivoltage system 失效
标题翻译：用于控制多电压系统中的混合电压接口的方法和装置
公开(公告)号：US5440244A
公开(公告)日：1995-08-08
申请号：US149061
申请日：1993-11-08
申请人： Bryan M. Richter , Stephen A. Smith , Mike Assar , Abdul Q. Kashmiri , Jerry L. Clark , Dave M. Singhal
发明人： Bryan M. Richter , Stephen A. Smith , Mike Assar , Abdul Q. Kashmiri , Jerry L. Clark , Dave M. Singhal
IPC分类号： H01L27/118 , H03K19/00 , H03K19/003 , H03K19/0185 , H03K19/0175
CPC分类号： H01L27/11898 , H03K19/0027 , H03K19/00315 , H03K19/018521 , H03K19/018585 , H03K19/018592 , H03K2217/0018
摘要： The design and implementation of a low power CMOS bi-directional I/O buffer that translates low voltage core logic level signals into the highest logic level signals to drive the final output stage which outputs a selectable logic level signal. The buffer further translates input signals of a variety of logic levels into low voltage core logic level signals. In either case, AC and DC power consumption is minimized in a mixed power supply environment that requires voltage translation to represent the proper binary logic levels. An multivoltage I/O buffer having multiple input-receiving NOR gates is also described. The NOR gates of the multivoltage I/O buffer having triggering levels optimized for differing core voltage levels. Also described is a host adapted system for interfacing between and removable peripheral card and a host computer. The host adaptor includes an integrated circuit employing the multivoltage bi-directional I/O buffer.
摘要翻译：低功耗CMOS双向I / O缓冲器的设计和实现，将低电压核心逻辑电平信号转换为最高逻辑电平信号，以驱动输出可选逻辑电平信号的最终输出级。缓冲器还将各种逻辑电平的输入信号转换为低电压核心逻辑电平信号。在任一情况下，在需要电压转换来表示适当的二进制逻辑电平的混合电源环境中AC和DC功耗被最小化。还描述了具有多个输入接收NOR门的多电压I / O缓冲器。具有针对不同核心电压电平优化的触发电平的多电压I / O缓冲器的或非门。还描述了用于在可移动外围卡和主计算机之间进行接口的主机适配系统。主机适配器包括采用多电压双向I / O缓冲器的集成电路。

4. 发明授权

US6149319A Computer system host adapter for controlling signal levels to peripheral cards 失效
标题翻译：用于控制外围卡信号电平的计算机系统主机适配器
公开(公告)号：US6149319A
公开(公告)日：2000-11-21
申请号：US388615
申请日：1995-02-14
申请人： Bryan M. Richter , Stephen A. Smith , Mike Assar , Abdul Q. Kashmiri , Jerry L. Clark , Dave M. Singhal
发明人： Bryan M. Richter , Stephen A. Smith , Mike Assar , Abdul Q. Kashmiri , Jerry L. Clark , Dave M. Singhal
IPC分类号： H01L27/118 , H03K19/00 , H03K19/003 , H03K19/0185 , G06F1/26
CPC分类号： H01L27/11898 , H03K19/0027 , H03K19/00315 , H03K19/018521 , H03K19/018585 , H03K19/018592 , H03K2217/0018
摘要： A method and apparatus for maintaining the voltage level of data signals supplied to an integrated circuit, such as a PCMCIA card, at the same level as power also provided to the integrated circuit. Circuitry for maintaining the voltages at the same level is preferably embodied within a system having a card controller integrated circuit, a power supply, and a peripheral card socket for receiving a removable PCMCIA card. The power supply is controlled by the card controller to provide power to the PCMCIA card through the card socket at a voltage level matching internal voltage requirements of the PCMCIA card. The card controller is connected directly to the PCMCIA card by a signal transmission line. Circuitry is provided for ensuring that the voltage of data signals transmitted along the data bus line to the PCMCIA card substantially match the voltage of power provided from the power supply to the PCMCIA card along a power supply line. In this manner, damage resulting from a power mismatch within the PCMCIA card is avoided.
摘要翻译：提供给集成电路（例如PCMCIA卡）的数据信号的电压电平与提供给集成电路的功率相同的方法和装置。用于将电压维持在相同水平的电路优选地体现在具有卡控制器集成电路，电源和用于接收可移除PCMCIA卡的外围卡插槽的系统内。电源由卡控制器控制，以与PCMCIA卡的内部电压要求匹配的电压电平通过卡插座向PCMCIA卡供电。卡控制器通过信号传输线直接连接到PCMCIA卡。提供电路，用于确保沿着数据总线传输到PCMCIA卡的数据信号的电压基本上与沿电源线从电源提供给PCMCIA卡的电源电压相匹配。以这种方式，避免了由PCMCIA卡内的电源失配引起的损坏。

5. 发明授权

US5293159A Method and apparatus for producing perception of high quality grayscale shading on digitally commanded displays 失效
标题翻译：用于在数字命令显示器上产生高质量灰度阴影感知的方法和装置
公开(公告)号：US5293159A
公开(公告)日：1994-03-08
申请号：US865046
申请日：1992-04-06
申请人： Chester F. Bassetti, Jr. , Dayakar C. Reddy , Ekaputra Laiman , Bryan M. Richter
发明人： Chester F. Bassetti, Jr. , Dayakar C. Reddy , Ekaputra Laiman , Bryan M. Richter
IPC分类号： G06F3/153 , G06T15/50 , G09G3/20 , G09G3/36 , H04N3/12 , H04N9/30 , G09G5/10
CPC分类号： H04N3/127 , G09G3/2003 , G09G3/2051 , G09G3/2092 , G09G3/3611 , G09G2320/0247 , G09G2320/0261 , G09G2320/0266 , G09G2320/0276 , G09G2360/18 , G09G3/2025
摘要： The perception of grayscale shading on a digitally commanded display is produced by commanding pixels of the display with brightness-setting signals of differing average duty cycles. Brightness-setting signals having one brightness level associated with them are phase shifted in relation to time and distributed to spaced apart pixel locations at which the one brightness level is to be produced. The energization of spatially adjacent pixels is scattered in time and pixels which are energized at the same time are selected to be spatially scattered so as to avoid the perception of visual disturbances such as flickering and surface streaming.
摘要翻译：通过用不同平均占空比的亮度设置信号命令显示器的像素来产生对数字命令显示器的灰度阴影的感知。具有与其相关联的一个亮度级的亮度设置信号相对于时间相位偏移并且分布到将要产生一个亮度级的间隔开的像素位置。空间相邻像素的通电在时间上散射，并且同时被激励的像素被选择为在空间上分散，以避免视觉紊乱（例如闪烁和表面流）的感知。

6. 发明授权

US5185602A Method and apparatus for producing perception of high quality grayscale shading on digitally commanded displays 失效
标题翻译：用于生产数字指示显示屏上高品质灰度显示的方法和设备
公开(公告)号：US5185602A
公开(公告)日：1993-02-09
申请号：US335622
申请日：1989-04-10
申请人： Chester F. Bassetti, Jr. , Dayakar C. Reddy , Ekaputra Laiman , Bryan M. Richter
发明人： Chester F. Bassetti, Jr. , Dayakar C. Reddy , Ekaputra Laiman , Bryan M. Richter
IPC分类号： G06F3/153 , G06T15/50 , G09G3/20 , G09G3/36 , H04N3/12 , H04N9/30
CPC分类号： H04N3/127 , G09G3/2003 , G09G3/2051 , G09G3/2092 , G09G3/3611 , G09G2320/0247 , G09G2320/0261 , G09G2320/0266 , G09G2320/0276 , G09G2360/18 , G09G3/2025
摘要： The perception of grayscale shading on a digitally commanded display is produced by commanding pixels of the display with brightness-setting signals of differing average duty cycles. Brightness-setting signals having one brightness level associated with them are phase shifted in relation to time and distributed to spaced apart pixel locations at which the one brightness level is to be produced. The energization of spatially adjacent pixels is scattered in time and pixels which are energized at the same time are selected to be spatially scattered so as to avoid the perception of visual disturbances such as flickering and surface streaming.
摘要翻译：通过用不同平均占空比的亮度设置信号命令显示器的像素来产生对数字命令显示器的灰度阴影的感知。具有与其相关联的一个亮度级的亮度设置信号相对于时间相位偏移并且分布到将要产生一个亮度级的间隔开的像素位置。空间相邻像素的通电在时间上散射，并且同时被激励的像素被选择为在空间上分散，以避免视觉紊乱（例如闪烁和表面流）的感知。

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