会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Two-wire chip-to-chip interface
    • 二线芯片到芯片接口
    • US07430259B2
    • 2008-09-30
    • US10850707
    • 2004-05-21
    • Brian NorthDouglas S. Smith
    • Brian NorthDouglas S. Smith
    • H04L7/00
    • H04B3/56
    • A method for communicating data over a serial interface between a master device and at least one slave device is disclosed. A master device generates a preamble that is attached to a data block for transmission over the serial interface between a master device and at least one slave device. Upon receipt of the control word at the at least one slave device, the preamble is detected by the slave device. Upon detection of the preamble, the slave device is enabled to respond to information within the control word as appropriate.
    • 公开了一种通过主设备和至少一个从设备之间的串行接口传送数据的方法。 主设备生成附加到数据块的前导码,用于通过主设备和至少一个从设备之间的串行接口进行传输。 在至少一个从设备接收到控制字时,由从设备检测前同步码。 在检测到前导码时,从属设备能够适当地响应控制字中的信息。
    • 6. 发明授权
    • Active folded cascode
    • 主动折叠共源共栅
    • US5469104A
    • 1995-11-21
    • US218726
    • 1994-03-28
    • Douglas S. SmithEdward C. Bee
    • Douglas S. SmithEdward C. Bee
    • H03F1/22H03F3/45H03F1/56
    • H03F3/45192H03F1/22H03F1/223H03F2203/45028H03F2203/45122H03F2203/45126
    • An active folded cascode includes an amplifier transistor and a source follower transistor configured as a folded cascode with the drain of the amplifier transistor and the source of the follower transistor connected to form a gain node. A feedback transistor has its gate and drain connected to the source and gate of the follower transistor while bias current provided to the drain of the feedback transistor by a current source maintains the gain node at a fixed voltage with respect to a reference voltage. Coupling of the voltage at the gain node to the gate of the source follower transistor by the feedback transistor reduces the effective source impedance of the source follower transistor, providing improved gain and bandwidth properties for the active folded cascode circuit.
    • 有源折叠共源共栅包括放大器晶体管和源极跟随器晶体管,其被配置为与放大器晶体管的漏极并且跟随器晶体管的源极连接以形成增益节点的折叠共源共栅。 反馈晶体管的栅极和漏极连接到跟随器晶体管的源极和栅极,而通过电流源提供给反馈晶体管的漏极的偏置电流将增益节点保持在相对于参考电压的固定电压。 通过反馈晶体管将增益节点处的电压耦合到源极跟随器晶体管的栅极减小了源极跟随器晶体管的有效源极阻抗,为有源折叠共源共栅电路提供改进的增益和带宽特性。
    • 7. 发明授权
    • Wide temperature range MESFET logic circuit
    • 宽温度范围MESFET逻辑电路
    • US5077494A
    • 1991-12-31
    • US396536
    • 1989-08-21
    • Derek F. BowersDouglas S. Smith
    • Derek F. BowersDouglas S. Smith
    • H03K19/003H03K19/0952
    • H03K19/00384H03K19/0952
    • A first Schottky diode is connected between the source of a first enhancement JFET and a low voltage line. The drain of the first enhancement JFET is connected through a first active load current source to a high voltage line, and also through a second Schottky diode and a second active load current source to the low voltage line. The first Schottky diode produces a voltage drop which maintains the source of the first enhancement JFET positive with respect to the low voltage line. The second Schottky diode produces a voltage drop complementary to that of the first Schottky diode, which causes the circuit to produce an output voltage across the second current source having a logically low level close to that of the low voltage line. This low output voltage positively turns off a first enhancement JFET of a next stage even at elevated temperatures where the voltage threshold is close to zero, since the source of the first enhancement JFET is held positive at one diode drop above the low voltage line by the first Schottky diode. A second enhancement JFET may be connected to supply current which maintains the first Schottky diode conductive at all times, and also to provide positive feedback to the first enhancement JFET by source coupling through the resistance of the first Schottky diode which enhances switching.
    • 8. 发明授权
    • Dual mode voltage reference circuit and method
    • 双模参考电压和方式
    • US4933572A
    • 1990-06-12
    • US418908
    • 1989-10-05
    • Douglas S. SmithDerek F. Bowers
    • Douglas S. SmithDerek F. Bowers
    • G05F1/56
    • G05F1/56
    • A voltage reference circuit is described which is capable of providing either an internally generated voltage having a trimming capability, or an externally generated voltage, with the use of only two pins. The internal voltage is connected through an interrupt circuit to an input/output terminal, which can also receive an externally generated voltage. A trimming terminal is used to apply trimming voltage signals to adjust the internally generated voltage. To convert from the internal to the external voltage source, an interrupt voltage is applied to the trimming terminal which is outside of the normal trimming voltage range. This interrupt voltage actuates an interrupt circuit to interrupt the connection between the internal voltage source and input/output terminal, leaving the output terminal available for the external voltage source.
    • 描述了一种电压参考电路,其能够仅使用两个引脚来提供具有微调能力的内部产生的电压或外部产生的电压。 内部电压通过中断电路连接到输入/输出端子,也可以接收外部产生的电压。 微调终端用于施加微调电压信号以调整内部产生的电压。 要从内部电压转换为外部电压源,将中断电压施加到正常微调电压范围之外的微调端子。 该中断电压使中断电路中断内部电压源和输入/输出端子之间的连接,使输出端子可用于外部电压源。