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1. 发明申请

US20070280026A1 Low voltage memory device and method thereof 有权
标题翻译：低电压存储器件及其方法
公开(公告)号：US20070280026A1
公开(公告)日：2007-12-06
申请号：US11435942
申请日：2006-05-17
申请人： Bradford Hunter , David Burnett , Troy Cooper , Prashant Kenkare , Ravindraj Ramaraju , Andrew Russel , Shayan Zhang , Michael Snyder
发明人： Bradford Hunter , David Burnett , Troy Cooper , Prashant Kenkare , Ravindraj Ramaraju , Andrew Russel , Shayan Zhang , Michael Snyder
IPC分类号： G11C5/14
CPC分类号： G11C5/143 , G11C5/147
摘要： A device is disclosed having a low-voltage memory device. The device includes a first memory having a first memory topology and a second memory having a second memory topology, with both memories located in an integrated circuit. The first memory is a relatively high-density memory device, capable of storing large amounts of data relative to the second memory. The second memory is a low-voltage memory device capable of being accessed at low-voltages relative to the voltage at which the first memory can be accessed. Accordingly, the second memory is accessible when the integrated circuit is placed in a low-voltage mode of operation, which may represent a data retention state (sleep state) for the first memory or other portions of the integrated circuit. Thus, the device is able to store large amounts of data in the high density memory in a normal or active mode of operation, and also have access to the low-voltage memory during the low-voltage mode of operation.
摘要翻译：公开了一种具有低电压存储器件的器件。该设备包括具有第一存储器拓扑的第一存储器和具有第二存储器拓扑的第二存储器，其中两个存储器位于集成电路中。第一存储器是相对高密度存储器件，能够存储相对于第二存储器的大量数据。第二存储器是能够相对于可以访问第一存储器的电压的低电压访问的低电压存储器件。因此，当集成电路处于低电压工作模式时，第二存储器可访问，这可以表示第一存储器或集成电路的其它部分的数据保持状态（睡眠状态）。因此，该设备能够在正常或主动操作模式下将大量数据存储在高密度存储器中，并且还可以在低电压操作模式期间访问低电压存储器。

2. 发明授权

US07675806B2 Low voltage memory device and method thereof 有权
标题翻译：低电压存储器件及其方法
公开(公告)号：US07675806B2
公开(公告)日：2010-03-09
申请号：US11435942
申请日：2006-05-17
申请人： Bradford Hunter , David Burnett , Troy Cooper , Prashant Kenkare , Ravindraj Ramaraju , Andrew Russell , Shayan Zhang , Michael Snyder
发明人： Bradford Hunter , David Burnett , Troy Cooper , Prashant Kenkare , Ravindraj Ramaraju , Andrew Russell , Shayan Zhang , Michael Snyder
IPC分类号： G11C5/14
CPC分类号： G11C5/143 , G11C5/147
摘要： A device is disclosed having a low-voltage memory device. The device includes a first memory having a first memory topology and a second memory having a second memory topology, with both memories located in an integrated circuit. The first memory is a relatively high-density memory device, capable of storing large amounts of data relative to the second memory. The second memory is a low-voltage memory device capable of being accessed at low-voltages relative to the voltage at which the first memory can be accessed. Accordingly, the second memory is accessible when the integrated circuit is placed in a low-voltage mode of operation, which may represent a data retention state (sleep state) for the first memory or other portions of the integrated circuit. Thus, the device is able to store large amounts of data in the high density memory in a normal or active mode of operation, and also have access to the low-voltage memory during the low-voltage mode of operation.
摘要翻译：公开了一种具有低电压存储器件的器件。该设备包括具有第一存储器拓扑的第一存储器和具有第二存储器拓扑的第二存储器，其中两个存储器位于集成电路中。第一存储器是相对高密度存储器件，能够存储相对于第二存储器的大量数据。第二存储器是能够相对于可以访问第一存储器的电压的低电压访问的低电压存储器件。因此，当集成电路处于低电压工作模式时，第二存储器可访问，这可以表示第一存储器或集成电路的其它部分的数据保持状态（睡眠状态）。因此，该器件能够在正常或主动操作模式下将大量数据存储在高密度存储器中，并且还可以在低电压操作模式期间访问低电压存储器。

3. 发明申请

US20080019206A1 INTEGRATED CIRCUIT HAVING A MEMORY WITH LOW VOLTAGE READ/WRITE OPERATION 有权
标题翻译：具有低电压读/写操作的存储器的集成电路
公开(公告)号：US20080019206A1
公开(公告)日：2008-01-24
申请号：US11863961
申请日：2007-09-28
申请人： Prashant Kenkare , Andrew Russell , David Bearden , James Burnett , Troy Cooper , Shayan Zhang
发明人： Prashant Kenkare , Andrew Russell , David Bearden , James Burnett , Troy Cooper , Shayan Zhang
IPC分类号： G11C5/14
CPC分类号： G11C11/417 , G11C5/147 , G11C11/419
摘要： An integrated circuit with a low voltage read/write operation is provided. The integrated circuit may include a processor and a plurality of memory cells organized in rows and columns and coupled to the processor, wherein a row of memory cells comprises a word line and all of the memory cells coupled to the word line, and wherein a column of memory cells comprises a bit line and all of the memory cells coupled to the bit line. The integrated circuit may further include a first power supply voltage terminal for receiving a first power supply voltage, wherein the first power supply voltage is provided to power the processor, and wherein the first power supply voltage is provided to power the plurality of memory cells during a first access operation of the plurality of memory cells. The integrated circuit may further include a second power supply voltage terminal for receiving a second power supply voltage higher than the first power supply voltage, wherein the second power supply voltage is provided to power the plurality of memory cells during a second access operation of the plurality of memory cells.
摘要翻译：提供具有低电压读/写操作的集成电路。集成电路可以包括处理器和以行和列组织并且耦合到处理器的多个存储单元，其中存储单元行包括字线和耦合到字线的所有存储器单元，并且其中列的存储器单元包括位线和耦合到位线的所有存储器单元。集成电路还可以包括用于接收第一电源电压的第一电源电压端子，其中提供第一电源电压以为处理器供电，并且其中提供第一电源电压以在多个存储器单元期间供电多个存储单元的第一访问操作。集成电路还可以包括用于接收高于第一电源电压的第二电源电压的第二电源电压端子，其中提供第二电源电压以在多个存储器单元的第二访问操作期间为多个存储器单元供电的记忆细胞。

4. 发明申请

US20050281957A1 Misting apparatus for electrostatic application of coating materials to body surfaces 有权
标题翻译：用于将涂料静电施用于身体表面的雾化设备
公开(公告)号：US20050281957A1
公开(公告)日：2005-12-22
申请号：US10873838
申请日：2004-06-21
申请人： Steven Cooper , Troy Cooper
发明人： Steven Cooper , Troy Cooper
IPC分类号： A45D34/04 , A61H35/00 , B05D1/04 , H05C1/00
CPC分类号： A61H35/00 , A45D2200/057 , A61H2201/10 , A61H2201/105 , A61N1/00 , Y10S118/07
摘要： An apparatus and method for electrostatically coating a body surface with a coating composition. An apparatus of the present invention includes an enclosure, a mount positioned on the enclosure, and an electrostatic nozzle connected to the mount, the electrostatic nozzle adapted for passing the coating composition for deposition on the body surface. The apparatus further includes a floor surface within the enclosure, the floor surface having a resistive electrical connection.
摘要翻译：一种用涂料组合物静电涂覆体表的装置和方法。本发明的装置包括外壳，位于外壳上的安装件和连接到安装座上的静电喷嘴，静电喷嘴适于使涂料组合物沉积在体表上。所述设备还包括在所述外壳内的地板表面，所述地板表面具有电阻电连接。

5. 发明申请

US20080000657A1 Disk Blade Scrapers for Tillage Apparatus 审中-公开
公开(公告)号：US20080000657A1
公开(公告)日：2008-01-03
申请号：US11856349
申请日：2007-09-17
申请人： Troy Cooper , Marvin Kuebler , Rickey Gerber
发明人： Troy Cooper , Marvin Kuebler , Rickey Gerber
IPC分类号： A01B15/16
CPC分类号： A01B15/16
摘要： A disk blade scraper is used with a tillage implement having rotating disk blades separated by hub spools. In one form, the disk blade scraper has a wide tapered scraper blade positioned very close to the transition of the hub spool and the disk blade. In another form, the disk blade scraper incorporates a round disk having an edge that runs in the transition joint of the disk blade and the hub spool. In yet another form, the disk blade scraper incorporates a round and or square bar that is positioned in such a way that the bar end rubs against this transition joint. In still another form, the disk blade scraper incorporates a flat scraper blade shaped to fit the contour of the backside of the disk blade. The corner of this scraper is positioned very close to the transition joint of the disk blade and the hub spool.

6. 发明申请

US20060047935A1 Data processing system having translation lookaside buffer valid bits with lock and method therefor 有权
标题翻译：具有翻译后备缓冲器有效位的数据处理系统及其锁定方法
公开(公告)号：US20060047935A1
公开(公告)日：2006-03-02
申请号：US10928399
申请日：2004-08-27
申请人： Ravindraraj Ramaraju , David Burgess , Troy Cooper , Eric Fiene , George Hoekstra
发明人： Ravindraraj Ramaraju , David Burgess , Troy Cooper , Eric Fiene , George Hoekstra
IPC分类号： G06F12/08
CPC分类号： G06F12/126 , G06F12/1027
摘要： A system (10) translates memory addresses. Processing circuitry (12) provides an effective address to a storage array (14, 16) having a plurality of stored effective addresses, each of the plurality of stored effective addresses having a corresponding pair of a lock bit and a valid bit. An output tag value and a single valid bit are provided to a comparator (18). The lock bit defines one of two predetermined classes of tasks executed by the system. The single valid bit is applicable to both of the two predetermined classes of tasks. The lock bit qualifies the clearing of the single valid bit. The comparator respectively compares the output tag value and the single valid bit with a predetermined effective address and a predetermined bit value. An output hit signal is provided when a match occurs to validate a physical address provided by a physical address array (20).
摘要翻译：系统（10）翻译存储器地址。处理电路（12）向具有多个存储的有效地址的存储阵列（14,16）提供有效地址，所述多个存储的有效地址中的每一个具有相应的一对锁定位和有效位。将输出标签值和单个有效位提供给比较器（18）。锁定位定义系统执行的两个预定任务类别之一。单个有效位适用于两个预定类别的任务。锁定位限定单个有效位的清除。比较器分别将输出标签值和单个有效位与预定的有效地址和预定位值进行比较。当发生匹配以验证由物理地址阵列（20）提供的物理地址时，提供输出命中信号。

7. 发明申请

US20080006417A1 Disk Blade Scrapers for Tillage Apparatus 审中-公开
公开(公告)号：US20080006417A1
公开(公告)日：2008-01-10
申请号：US11856401
申请日：2007-09-17
申请人： Troy Cooper , Marvin Kuebler , Rickey Gerber
发明人： Troy Cooper , Marvin Kuebler , Rickey Gerber
IPC分类号： A01B15/16
CPC分类号： A01B15/16
摘要： A disk blade scraper is used with a tillage implement having rotating disk blades separated by hub spools. In one form, the disk blade scraper has a wide tapered scraper blade positioned very close to the transition of the hub spool and the disk blade. In another form, the disk blade scraper incorporates a round disk having an edge that runs in the transition joint of the disk blade and the hub spool. In yet another form, the disk blade scraper incorporates a round and or square bar that is positioned in such a way that the bar end rubs against this transition joint. In still another form, the disk blade scraper incorporates a flat scraper blade shaped to fit the contour of the backside of the disk blade. The corner of this scraper is positioned very close to the transition joint of the disk blade and the hub spool.

8. 发明申请

US20060278661A1 Gantry tower spraying system with cartridge/receptacle assembly 有权
标题翻译：龙门式塔式喷淋系统，带有墨盒/插座组件
公开(公告)号：US20060278661A1
公开(公告)日：2006-12-14
申请号：US11413450
申请日：2006-04-28
申请人： Steven Cooper , Troy Cooper , Ricky Croft
发明人： Steven Cooper , Troy Cooper , Ricky Croft
IPC分类号： B67D5/40 , G01F11/00
CPC分类号： B05B5/03 , A45D2200/057 , A45D2200/207 , B05B5/043 , B05B5/08 , B05B5/16 , B05B7/2408 , B05B13/0405 , B05B16/00
摘要： A gantry tower spraying system with a cartridge/receptacle assembly includes a gantry and a spray assembly coupled to the gantry to allow for translational movement of the spray assembly along the gantry. The spray assembly includes a receptacle for receiving a cartridge containing a cosmetic liquid for skin treatment, and a spray nozzle coupled to the receptacle for receiving the cosmetic liquid and dispensing the cosmetic liquid in a spray. The receptacle has an inner surface of a size and shape to generally conform to a size and shape of a portion of an outer surface of the cartridge. The spraying system can further be provided with an oscillation mechanism adapted to cause oscillation of the spray nozzle. The bottle can be provided with a keying mechanism for engaging a corresponding key structure of the receptacle.
摘要翻译：具有盒/插座组件的龙门式塔架喷射系统包括龙门架和连接到台架的喷射组件，以允许喷雾组件沿机架的平移运动。喷雾组件包括用于容纳包含用于皮肤处理的化妆液的药筒的容器，以及连接到容器的喷嘴，用于接收化妆品液体并以喷雾方式分配化妆品液体。容器具有尺寸和形状的内表面，以大致符合盒的外表面的一部分的尺寸和形状。喷雾系统还可以设置有适于引起喷嘴的振荡的振荡机构。瓶子可以设置有用于接合容器的相应键结构的键控机构。

9. 发明申请

US20050189126A1 Disk blade scrapers for tillage apparatus 有权
标题翻译：盘式刮刀刮土机
公开(公告)号：US20050189126A1
公开(公告)日：2005-09-01
申请号：US10788624
申请日：2004-02-27
申请人： Troy Cooper , Marvin Kuebler , Rickey Gerber
发明人： Troy Cooper , Marvin Kuebler , Rickey Gerber
IPC分类号： A01B15/16
CPC分类号： A01B15/16
摘要： A disk blade scraper is used with a tillage implement having rotating disk blades separated by hub spools. In one form, the disk blade scraper has a wide tapered scraper blade positioned very close to the transition of the hub spool and the disk blade. In another form, the disk blade scraper incorporates a round disk having an edge that runs in the transition joint of the disk blade and the hub spool. In yet another form, the disk blade scraper incorporates a round and or square bar that is positioned in such a way that the bar end rubs against this transition joint. In still another form, the disk blade scraper incorporates a flat scraper blade shaped to fit the contour of the backside of the disk blade. The corner of this scraper is positioned very close to the transition joint of the disk blade and the hub spool.
摘要翻译：盘式刮刀与具有由轮毂线轴分离的旋转盘片的耕作机构一起使用。在一种形式中，盘式刮刀具有广泛的锥形刮刀，其非常接近轮毂卷轴和盘片的过渡位置。在另一种形式中，盘片刮刀结合有圆盘，该圆盘具有在盘片和轮毂卷轴的过渡接头中延伸的边缘。在另一种形式中，盘片刮刀结合了圆形或方形的杆，其定位成使得杆端部抵靠该过渡接头。在另一种形式中，盘式刮刀包括形状适合盘片的背面轮廓的平的刮刀。该刮刀的角部非常靠近盘片和轮毂卷轴的过渡接头。

10. 发明申请

US20070200173A1 Embedded substrate interconnect for underside contact to source and drain regions 有权
标题翻译：用于下侧接触源极和漏极区域的嵌入式衬底互连
公开(公告)号：US20070200173A1
公开(公告)日：2007-08-30
申请号：US11356229
申请日：2006-02-16
申请人： Perry Pelley , Troy Cooper , Michael Mendicino
发明人： Perry Pelley , Troy Cooper , Michael Mendicino
IPC分类号： H01L27/12
CPC分类号： H01L29/41733 , H01L21/84 , H01L27/12
摘要： A semiconductor topography (10) is provided which includes a semiconductor-on-insulator (SOI) substrate having a conductive line (16) arranged within an insulating layer (22) of the SOI substrate. A method for forming an SOI substrate with such a configuration includes forming a first conductive line (16) within an insulating layer (22) arranged above a wafer substrate (12) and forming a silicon layer (24) upon surfaces of the first conductive line and the insulating layer. A further method is provided which includes the formation of a transistor gate (28) upon an SOI substrate having a conductive line (16) embedded therein and implanting dopants within the semiconductor topography to form source and drain regions (30) within an upper semiconductor layer (24) of the SOI substrate such that an underside of one of the source and drain regions is in contact with the conductive line.
摘要翻译：提供一种半导体图形（10），其包括绝缘体上半导体（SOI）基板，其具有布置在SOI衬底的绝缘层（22）内的导线（16）。一种用于形成具有这种结构的SOI衬底的方法包括在布置在晶片衬底（12）上方的绝缘层（22）内形成第一导电线（16），并在第一导线的表面上形成硅层（24）和绝缘层。提供了一种另外的方法，其包括在SOI衬底上形成晶体管栅极（28），该SOI衬底具有嵌入其中的导电线（16），并且在半导体拓扑图内注入掺杂剂以在上半导体层内形成源区和漏区（30）（24），使得源极和漏极区域之一的下侧与导电线接触。

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