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    • 3. 发明授权
    • Optical network terminal of the gigabit passive optical network and frame treatment method of the ONT
    • 千兆无源光网络的光网络终端和ONT的帧处理方法
    • US08526818B2
    • 2013-09-03
    • US12747330
    • 2009-04-28
    • Kwang-ok KimYong-tae KimDong-soo Lee
    • Kwang-ok KimYong-tae KimDong-soo Lee
    • H04B14/00
    • H04J3/1694H04Q11/0067H04Q2011/0064
    • A gigabit passive optical network (GPON) system for fiber to the home (FTTH) service must provide a down-stream data rate of an optical band to provide IPTV service with hundreds of channels to subscribers, and must be able to provide an upstream data rate of an optical band using a currently available BM-IC chip. A currently available BM-IC chip for a GPON has 1.244 Gbps and 2.488 Gbps modes. Accordingly, an optical network terminal (ONT) for a GPON that is capable of providing a downstream transmission band of 10-Gbps and an upstream transmission band of 1.244 Gbps or 2.488 Gbps, and a method for processing an upstream frame in the terminal, are provided. The GPON ONT can provide 20 Mbps, high-definition IPTV service with 500 channels and can provide both upstream data rates of 1.244 Gbps and 2.488 Gbps according to a user's selection without using an additional device.
    • 用于光纤到家庭(FTTH)业务的千兆无源光网络(GPON)系统必须提供光带的下行数据速率,以向用户提供数百个信道的IPTV服务,并且必须能够提供上行数据 使用当前可用的BM-IC芯片的光学带宽率。 目前用于GPON的BM-IC芯片具有1.244 Gbps和2.488 Gbps模式。 因此,能够提供10Gbps的下行传输频带和1.244Gbps或2.488Gbps的上行传输频带的GPON的光网络终端(ONT)以及用于处理终端中的上行帧的方法是 提供。 GPON ONT可以提供具有500个通道的20 Mbps高清晰度IPTV服务,并可根据用户的选择提供1.244 Gbps和2.488 Gbps的上行数据速率,而无需使用其他设备。
    • 4. 发明申请
    • OPTICAL NETWORK TERMINAL OF THE GIGABIT PASSIVE OPTICAL NETWORK AND FRAME TREATMENT METHOD OF THE ONT
    • 技术的光网络终端被动光网络和帧的处理方法
    • US20100260498A1
    • 2010-10-14
    • US12747330
    • 2009-04-28
    • Kwang-ok KimYong-tae KimDong-soo Lee
    • Kwang-ok KimYong-tae KimDong-soo Lee
    • H04J14/00
    • H04J3/1694H04Q11/0067H04Q2011/0064
    • A gigabit passive optical network (GPON) system for fiber to the home (FTTH) service must provide a down-stream data rate of an optical band to provide IPTV service with hundreds of channels to subscribers, and must be able to provide an upstream data rate of an optical band using a currently available BM-IC chip. A currently available BM-IC chip for a GPON has 1.244 Gbps and 2.488 Gbps modes. Accordingly, an optical network terminal (ONT) for a GPON that is capable of providing a downstream transmission band of 10-Gbps and an upstream transmission band of 1.244 Gbps or 2.488 Gbps, and a method for processing an upstream frame in the terminal, are provided. The GPON ONT can provide 20 Mbps, high-definition IPTV service with 500 channels and can provide both upstream data rates of 1.244 Gbps and 2.488 Gbps according to a user's selection without using an additional device.
    • 用于光纤到家庭(FTTH)业务的千兆无源光网络(GPON)系统必须提供光带的下行数据速率,以向用户提供数百个信道的IPTV服务,并且必须能够提供上行数据 使用当前可用的BM-IC芯片的光学带宽率。 目前用于GPON的BM-IC芯片具有1.244 Gbps和2.488 Gbps模式。 因此,能够提供10Gbps的下行传输频带和1.244Gbps或2.488Gbps的上行传输频带的GPON的光网络终端(ONT)以及用于处理终端中的上行帧的方法是 提供。 GPON ONT可以提供具有500个通道的20 Mbps高清晰度IPTV服务,并可根据用户的选择提供1.244 Gbps和2.488 Gbps的上行数据速率,而无需使用其他设备。
    • 7. 发明授权
    • Method and apparatus for displaying two-dimensional or three-dimensional image sequence while adjusting frame rate
    • 在调整帧速率的同时显示二维或三维图像序列的方法和装置
    • US08570362B2
    • 2013-10-29
    • US12541372
    • 2009-08-14
    • Sang-moo ParkYong-tae KimSeon-deok HwangDae-sik Kim
    • Sang-moo ParkYong-tae KimSeon-deok HwangDae-sik Kim
    • H04N15/00H04N13/04
    • G06T15/00H04N13/139H04N13/359H04N2213/007
    • Provided are a method and apparatus for displaying a two-dimensional (2D)/three-dimensional (3D) image, and apparatus to execute the same, the method including determining whether an input image sequence having a first frame rate is a 2D image sequence or a 3D image sequence, wherein, if the input image sequence is a 2D image sequence, generating a 2D output image sequence having a second frame rate, the 2D output image sequence including the input image sequence and a 2D intermediate image generated from the input image sequence, and wherein, if the input image sequence is a 3D image sequence, generating a 3D output image sequence having a third frame rate, where a left-viewpoint intermediate image, a right-viewpoint intermediate image and the input image sequence are repeatedly included in the 3D output image sequence, the left-viewpoint intermediate image is determined from at least one left-viewpoint image in a left-viewpoint image sequence included in the input image sequence, and the right-viewpoint intermediate image is determined from at least one right-viewpoint image in a right-viewpoint image sequence included in the input image sequence.
    • 提供了一种用于显示二维(2D)/三维(3D)图像的方法和装置及其执行方法,所述方法包括确定具有第一帧速率的输入图像序列是否为2D图像序列 或3D图像序列,其中如果所述输入图像序列是2D图像序列,则生成具有第二帧率的2D输出图像序列,所述2D输出图像序列包括所述输入图像序列和从所述输入生成的2D中间图像 图像序列,并且其中,如果所述输入图像序列是3D图像序列,则生成具有第三帧率的3D输出图像序列,其中左视点中间图像,右视点中间图像和所述输入图像序列重复 包括在3D输出图像序列中,从包括在输入图像序列中的左视点图像序列中的至少一个左视点图像确定左视点中间图像,以及 从包括在输入图像序列中的右视点图像序列中的至少一个右视点图像确定右视点中间图像。
    • 10. 发明申请
    • Non-volatile memory device and method of driving the same
    • 非易失性存储器件及其驱动方法
    • US20100103744A1
    • 2010-04-29
    • US12588680
    • 2009-10-23
    • Seung-jin YangJeong-uk HanYong-tae KimYong-suk ChoiBae-seong Kwon
    • Seung-jin YangJeong-uk HanYong-tae KimYong-suk ChoiBae-seong Kwon
    • G11C16/04G11C11/34
    • G11C16/0433
    • A non-volatile memory device includes a memory cell array with a plurality of unit memory cells arranged in a matrix pattern, each of the unit memory cells having first and second non-volatile memory transistors sharing a common source, and a selection transistor connected between the common source and one of the first and second non-volatile memory transistors, a first word line coupled to control gates of the first non-volatile memory transistors arranged in a column direction of the memory cell array, a second word line coupled to control gates of the second non-volatile memory transistors arranged in the column direction of the memory cell array, a selection line coupled to gates of the selected transistors arranged in the column direction of the memory cell array, and at least one bit line coupled to drains of the first and second non-volatile memory transistors.
    • 一种非易失性存储器件包括具有以矩阵模式布置的多个单元存储单元的存储单元阵列,每个单元存储单元具有共享公共源的第一和第二非易失性存储器晶体管,以及连接在 公共源和第一和第二非易失性存储器晶体管中的一个,耦合到以存储单元阵列的列方向布置的第一非易失性存储器晶体管的控制栅极的第一字线,耦合到控制的第二字线 布置在存储单元阵列的列方向上的第二非易失性存储晶体管的栅极,耦合到沿着存储单元阵列的列方向布置的所选晶体管的栅极的选择线以及耦合到漏极的至少一个位线 的第一和第二非易失性存储器晶体管。