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1. 发明授权

US06758984B2 Selective removal of dielectric materials and plating process using same 有权
标题翻译：选择性去除电介质材料和使用电镀工艺
公开(公告)号：US06758984B2
公开(公告)日：2004-07-06
申请号：US09945775
申请日：2001-09-04
申请人： Belgacem Haba , Irina Poukhova , Masud Beroz
发明人： Belgacem Haba , Irina Poukhova , Masud Beroz
IPC分类号： C23F100
CPC分类号： H01L21/4828 , C25D7/12 , H05K3/062 , H05K3/108 , H05K3/4092 , H05K2203/0597 , H05K2203/095 , H05K2203/105 , H05K2203/1184
摘要： A metal is provided on a polymeric component and the component is subjected to a removal process such as plasma or liquid etching in the presence of an electric field. The etchant selectively attacks the polymer at the boundary between the metal and the polymer, thereby forming gaps alongside the metal. A cover metal may be plated onto the metal in the gaps. The cover metal protects the principal metal during subsequent etching procedures.
摘要翻译：在聚合物组分上提供金属，并且在存在电场的情况下对组分进行诸如等离子体或液体蚀刻的去除处理。蚀刻剂在金属和聚合物之间的边界选择性地攻击聚合物，从而在金属旁边形成间隙。覆盖金属可以镀在间隙中的金属上。覆盖金属在随后的蚀刻过程中保护主要金属。

2. 发明授权

US06334942B1 Selective removal of dielectric materials and plating process using same 有权
公开(公告)号：US06334942B1
公开(公告)日：2002-01-01
申请号：US09247156
申请日：1999-02-09
申请人： Belgacem Haba , Irina Poukhova , Masud Beroz
发明人： Belgacem Haba , Irina Poukhova , Masud Beroz
IPC分类号： C25D502
CPC分类号： H01L21/4828 , C25D7/12 , H05K3/062 , H05K3/108 , H05K3/4092 , H05K2203/0597 , H05K2203/095 , H05K2203/105 , H05K2203/1184
摘要： A metal is provided on a polymeric component and the component is subjected to a removal process such as plasma or liquid etching in the presence of an electric field. The etchant selectively attacks the polymer at the boundary between the metal and the polymer, thereby forming gaps alongside the metal. A cover metal may be plated onto the metal in the gaps. The cover metal protects the principal metal during subsequent etching procedures.

3. 发明授权

US07332068B2 Selective removal of dielectric materials and plating process using same 有权
标题翻译：选择性去除电介质材料和使用电镀工艺
公开(公告)号：US07332068B2
公开(公告)日：2008-02-19
申请号：US10856723
申请日：2004-05-28
申请人： Belgacem Haba , Irina Poukhova , Masud Beroz
发明人： Belgacem Haba , Irina Poukhova , Masud Beroz
IPC分类号： C25F3/00
CPC分类号： H01L21/4828 , C25D7/12 , H05K3/062 , H05K3/108 , H05K3/4092 , H05K2203/0597 , H05K2203/095 , H05K2203/105 , H05K2203/1184
摘要： A metal is provided on a polymeric component and the component is subjected to a removal process such as plasma or liquid etching in the presence of an electric field. The etchant selectively attacks the polymer at the boundary between the metal and the polymer, thereby forming gaps alongside the metal. A cover metal may be plated onto the metal in the gaps. The cover metal protects the principal metal during subsequent etching procedures.
摘要翻译：在聚合物组分上提供金属，并且在存在电场的情况下对组分进行诸如等离子体或液体蚀刻的去除处理。蚀刻剂在金属和聚合物之间的边界选择性地攻击聚合物，从而在金属旁边形成间隙。覆盖金属可以镀在间隙中的金属上。覆盖金属在随后的蚀刻过程中保护主要金属。

4. 发明授权

US08207604B2 Microelectronic package comprising offset conductive posts on compliant layer 有权
标题翻译：微电子封装包括柔性层上的偏移导电柱
公开(公告)号：US08207604B2
公开(公告)日：2012-06-26
申请号：US10985126
申请日：2004-11-10
申请人： Belgacem Haba , Masud Beroz , Giles Humpston , Jae M. Park
发明人： Belgacem Haba , Masud Beroz , Giles Humpston , Jae M. Park
IPC分类号： H01L23/485
CPC分类号： H01L23/13 , H01L21/4846 , H01L2924/0002 , H01R13/2414 , H01R13/2464 , H01L2924/00
摘要： A microelectronic package includes a mounting structure, a microelectronic element associated with the mounting structure, and a plurality of conductive posts physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts project from the mounting structure in an upward direction, at least one of the conductive posts being an offset post. Each offset post has a base connected to the mounting structure, the base of each offset post defining a centroid. Each offset post also defines an upper extremity having a centroid, the centroid of the upper extremity being offset from the centroid of the base in a horizontal offset direction transverse to the upward direction. The mounting structure is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities may wipe across a contact pad of an opposing circuit board.
摘要翻译：微电子封装包括安装结构，与安装结构相关联的微电子元件以及物理连接到安装结构并电连接到微电子元件的多个导电柱。导电柱从安装结构沿向上的方向突出，至少一个导电柱是偏移柱。每个偏移柱具有连接到安装结构的基座，每个偏置柱的基部限定质心。每个偏移柱还限定具有质心的上肢，上肢的质心在垂直于向上方向的水平偏移方向上偏离基部的质心。安装结构适于允许每个偏移柱绕水平轴线倾斜，使得上端部可以擦过相对电路板的接触垫。

5. 发明申请

US20080296717A1 Packages and assemblies including lidded chips 审中-公开
标题翻译：包装和组件，包括带芯片
公开(公告)号：US20080296717A1
公开(公告)日：2008-12-04
申请号：US11809780
申请日：2007-06-01
申请人： Masud Beroz , Belgacem Haba , Michael J. Nystrom , Richard Dewitt Crisp , Giles Humpston
发明人： Masud Beroz , Belgacem Haba , Michael J. Nystrom , Richard Dewitt Crisp , Giles Humpston
IPC分类号： H01L31/0203 , H01L21/58 , H01L23/02
CPC分类号： H01L31/0203 , H01L23/552 , H01L24/16 , H01L24/48 , H01L24/49 , H01L24/81 , H01L25/03 , H01L25/0657 , H01L25/50 , H01L27/14618 , H01L27/14632 , H01L2224/05554 , H01L2224/05568 , H01L2224/05571 , H01L2224/05573 , H01L2224/10126 , H01L2224/16225 , H01L2224/16227 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48464 , H01L2224/4911 , H01L2224/49171 , H01L2224/49175 , H01L2224/81192 , H01L2225/06506 , H01L2225/06517 , H01L2225/06568 , H01L2225/06589 , H01L2924/00011 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/1461 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/15787 , H01L2924/19107 , H01L2924/3025 , H01L2924/00 , H01L2224/29099 , H01L2224/45099 , H01L2224/81805 , H01L2224/05599
摘要： A lidded chip is provided which includes a chip having a major surface and a plurality of first chip contacts exposed at the major surface. A lid overlies the major surface. A chip carrier is disposed between the chip and the lid, the chip carrier having an inner surface confronting the major surface and an outer surface confronting the lid. A plurality of first carrier contacts of the chip carrier are conductively connected to the first chip contacts. A plurality of second carrier contacts extend upwardly at least partially through the openings in the lid.
摘要翻译：提供了一种带芯的芯片，其包括具有主表面的芯片和在主表面处暴露的多个第一芯片触点。盖子盖在主表面上。芯片载体设置在芯片和盖之间，芯片载体具有面向主表面的内表面和面对盖的外表面。芯片载体的多个第一载体触点导电地连接到第一芯片触点。多个第二载体触点至少部分地向上延伸穿过盖中的开口。

6. 发明授权

US07453157B2 Microelectronic packages and methods therefor 有权
标题翻译：微电子封装及其方法
公开(公告)号：US07453157B2
公开(公告)日：2008-11-18
申请号：US11140312
申请日：2005-05-27
申请人： Belgacem Haba , Masud Beroz , Teck-Gyu Kang , Yoichi Kubota , Sridhar Krishnan , John B. Riley, III , Ilyas Mohammed
发明人： Belgacem Haba , Masud Beroz , Teck-Gyu Kang , Yoichi Kubota , Sridhar Krishnan , John B. Riley, III , Ilyas Mohammed
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L23/49811 , H01L23/3128 , H01L23/3677 , H01L23/4985 , H01L24/48 , H01L25/105 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/4824 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01004 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/15311 , H01L2924/15312 , H01L2924/181 , H01L2924/19041 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A microelectronic package includes a microelectronic element having faces, contacts and an outer perimeter, and a flexible substrate overlying and spaced from a first face of the microelectronic element, an outer region of the flexible substrate extending beyond the outer perimeter of the microelectronic element. The package includes a plurality of etched conductive posts exposed at a surface of the flexible substrate and being electrically interconnected with the microelectronic element, wherein at least one of the conductive posts is disposed in the outer region of the flexible substrate, and a compliant layer disposed between the first face of the microelectronic element and the flexible substrate, wherein the compliant layer overlies the at least one of the conductive posts that is disposed in the outer region of the flexible substrate. The package includes an encapsulating mold material in contact with the microelectronic element and the compliant layer, whereby the encapsulating mold material overlies the outer region of the flexible substrate.
摘要翻译：微电子封装包括具有面，触点和外周边的微电子元件，以及覆盖并与微电子元件的第一面间隔开的柔性基板，柔性基板的外部区域延伸超出微电子元件的外周边。所述封装包括多个蚀刻的导电柱，其暴露在所述柔性基板的表面处并与所述微电子元件电互连，其中所述导电柱中的至少一个设置在所述柔性基板的外部区域中，并且设置柔性层在微电子元件的第一面和柔性基板之间，其中柔性层覆盖设置在柔性基板的外部区域中的至少一个导电柱。该封装包括与微电子元件和柔性层接触的封装模具材料，由此封装模具材料覆盖在柔性基板的外部区域上。

7. 发明授权

US07361979B2 Multi-sheet conductive substrates for microelectronic devices and methods for forming such substrates 有权
标题翻译：用于微电子器件的多片导电衬底以及用于形成这种衬底的方法
公开(公告)号：US07361979B2
公开(公告)日：2008-04-22
申请号：US11025401
申请日：2004-12-29
申请人： Masud Beroz , Belgacem Haba
发明人： Masud Beroz , Belgacem Haba
IPC分类号： H01L23/02 , H05K1/00
CPC分类号： H01L23/49833 , H01L23/4985 , H01L2224/48227 , H01L2224/49109 , H05K1/112 , H05K3/4611 , H05K2201/09472
摘要： A substrate is provided having a plurality of sheets. Each sheet has a first major surface containing a plurality of electrically conductive regions and a second major surface that opposes the first major surface. The sheets are arranged such that the first major surface of a sheet faces the second major surface of another. At least one electrically conductive region of each sheet is partially or fully exposed. At least one electrically conductive region of a sheet is partially or fully covered, e.g., by one or more electrically conductive regions of another sheet. A method for forming such a substrate is also provided.
摘要翻译：提供具有多个片材的基片。每个片材具有包含多个导电区域的第一主表面和与第一主表面相对的第二主表面。片材布置成使得片材的第一主表面面对另一片材的第二主表面。每个片材的至少一个导电区域部分或全部暴露。片材的至少一个导电区域被部分或完全覆盖，例如由另一片材的一个或多个导电区域覆盖。还提供了一种用于形成这种基板的方法。

8. 发明申请

US20070105346A1 Small chips with fan-out leads 有权
标题翻译：小型芯片带扇出引线
公开(公告)号：US20070105346A1
公开(公告)日：2007-05-10
申请号：US11588438
申请日：2006-10-26
申请人： Masud Beroz , Belgacem Haba
发明人： Masud Beroz , Belgacem Haba
IPC分类号： H01L21/00
CPC分类号： H01L23/49572 , H01L23/4822 , H01L23/49541 , H01L24/13 , H01L24/94 , H01L24/96 , H01L2224/05001 , H01L2224/05024 , H01L2224/05026 , H01L2224/05548 , H01L2224/12105 , H01L2224/1302 , H01L2224/131 , H01L2224/94 , H01L2224/96 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/381 , H01L2224/05599 , H01L2224/05099 , H01L2924/00012
摘要： A method of expanding the contact pitch for un-diced chips in an array by pre-slicing the array in a first direction, attaching a lead frame to the chips' contacts, and then slicing the array and attached lead frame in the second direction. The lead frame has leads mechanically connected one another such that slicing the frame in the second direction along the mechanical connections separates the leads. Each lead has a first terminal which is conductively attached to a chip contact and a second terminal extending beyond the boundaries of the chip to which the first terminal is attached. In this manner, the contact pitch is effectively expanded to the terminal pitch of the leads.
摘要翻译：一种通过在第一方向上预分割阵列来扩展阵列中未切割的芯片的接触间距的方法，将引线框架附接到芯片的触点，然后在第二方向上对阵列和附接的引线框进行切片。引线框架具有彼此机械连接的引线，使得沿着机械连接沿第二方向切割框架将引线分开。每个引线具有导电地连接到芯片触点的第一端子和延伸超过与第一端子连接的芯片的边界的第二端子。以这种方式，接触间距有效地扩展到引线的端子间距。

9. 发明授权

US07176043B2 Microelectronic packages and methods therefor 有权
标题翻译：微电子封装及其方法
公开(公告)号：US07176043B2
公开(公告)日：2007-02-13
申请号：US11014439
申请日：2004-12-16
申请人： Belgacem Haba , Masud Beroz , Ronald Green , Ilyas Mohammed , Stuart E. Wilson , Wael Zohni , Yoichi Kubota , Jesse Burl Thompson
发明人： Belgacem Haba , Masud Beroz , Ronald Green , Ilyas Mohammed , Stuart E. Wilson , Wael Zohni , Yoichi Kubota , Jesse Burl Thompson
IPC分类号： H01L21/66
CPC分类号： H01L23/49811 , G01R1/06744 , G01R1/0735 , H01L21/563 , H01L23/4985 , H01L24/12 , H01L24/16 , H01L24/48 , H01L24/73 , H01L2224/0401 , H01L2224/05599 , H01L2224/0603 , H01L2224/131 , H01L2224/13147 , H01L2224/13187 , H01L2224/13188 , H01L2224/1319 , H01L2224/1329 , H01L2224/133 , H01L2224/1357 , H01L2224/136 , H01L2224/1403 , H01L2224/16 , H01L2224/17 , H01L2224/1703 , H01L2224/48091 , H01L2224/73203 , H01L2224/73204 , H01L2224/73257 , H01L2224/73265 , H01L2224/83194 , H01L2224/85399 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01084 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/3011 , H01L2224/13099 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： A microelectronic package includes a microelectronic element having faces and contacts and a flexible substrate spaced from and overlying a first face of the microelectronic element. The package also includes a plurality of conductive posts extending from the flexible substrate and projecting away from the first face of the microelectronic element, wherein at least some of the conductive posts are electrically interconnected with the microelectronic element, and a plurality of support elements supporting the flexible substrate over the microelectronic element. The conductive posts are offset from the support elements to facilitate flexure of the substrate and movement of the posts relative to the microelectronic element.
摘要翻译：微电子封装包括具有面和触点的微电子元件和与微电子元件的第一面间隔开并且覆盖其上的柔性基板。该封装还包括从柔性基板延伸并从远离微电子元件的第一面突出的多个导电柱，其中至少一些导电柱与微电子元件电互连，以及多个支撑元件微电子元件上的柔性衬底。导电柱从支撑元件偏移以便于基板的挠曲和柱相对于微电子元件的移动。

10. 发明申请

US20060113645A1 Microelectronic assemblies incorporating inductors 审中-公开
公开(公告)号：US20060113645A1
公开(公告)日：2006-06-01
申请号：US11327057
申请日：2006-01-06
申请人： Michael Warner , Belgacem Haba , Masud Beroz
发明人： Michael Warner , Belgacem Haba , Masud Beroz
IPC分类号： H01L23/495
摘要： Inductors are provided in chip assemblies such as in packaged semiconductor chips. The inductors may be incorporated in a chip carrier which forms part of the package, and may include, for example, spiral or serpentine inductors formed from traces on the chip carrier. The chip carrier may include a flap bearing the inductive element, and this flap may be bent to tilt the inductive element out of the plane of the chip carrier to reduce electromagnetic interaction between the inductive element and surrounding electrical components. Other inductors include solenoids formed in part by leads on the chip carrier as, for example, by displacing leads out of the plane of the chip carrier to form loops in vertically-extensive planes transverse to the plane of the chip carrier. Additional features provide trimming of the inductor to a desired inductance value during by breaking or connecting leads during assembly.

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