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1. 发明授权

US10635393B2 Buffer-related USB communication 有权
公开(公告)号：US10635393B2
公开(公告)日：2020-04-28
申请号：US13976691
申请日：2012-03-29
申请人： Bahareh Sadeghi , John S. Howard
发明人： Bahareh Sadeghi , John S. Howard
IPC分类号： G06F5/12 , G06F13/42
CPC分类号： G06F5/12 , G06F13/4291
摘要： According to various embodiments, apparatuses and methods to communicate buffer allocation information are presented. The disclosed apparatuses and methods may include transmitting a buffer message by a wireless USB device to a wireless USB host, which may indicate an available storage space in a buffer of the USB device to store data from the USB host. The buffer message may be transmitted independent of whether or not the USB device has received a request message (e.g., from the USB host) for information relating the available storage space in the buffer. Additionally, the buffer message may be transmitted independent of any data exchange mechanism between the USB host and the USB device. The USB device may receive a data packet from the USB host, and transmit a data packet acknowledgement message including data packet status information, and information regarding the available storage space in the buffer.

2. 发明申请

US20140047141A1 BUFFER-RELATED USB COMMUNICATION 审中-公开
标题翻译：缓冲相关USB通信
公开(公告)号：US20140047141A1
公开(公告)日：2014-02-13
申请号：US13976691
申请日：2012-03-29
申请人： Bahareh Sadeghi , John S. Howard
发明人： Bahareh Sadeghi , John S. Howard
IPC分类号： G06F5/12
CPC分类号： G06F5/12 , G06F13/4291
摘要： According to various embodiments, apparatuses and methods to communicate buffer allocation information are presented. The disclosed apparatuses and methods may include transmitting a buffer message by a wireless USB device to a wireless USB host, which may indicate an available storage space in a buffer of the USB device to store data from the USB host. The buffer message may be transmitted independent of whether or not the USB device has received a request message (e.g., from the USB host) for information relating the available storage space in the buffer. Additionally, the buffer message may be transmitted independent of any data exchange mechanism between the USB host and the USB device. The USB device may receive a data packet from the USB host, and transmit a data packet acknowledgement message including data packet status information, and information regarding the available storage space in the buffer.
摘要翻译：根据各种实施例，呈现用于传送缓冲器分配信息的装置和方法。所公开的设备和方法可以包括通过无线USB设备向无线USB主机发送缓冲器消息，其可以指示USB设备的缓冲器中的可用存储空间来存储来自USB主机的数据。可以独立于USB设备是否已接收到与缓冲器中的可用存储空间有关的信息的来自USB主机的请求消息（例如，从USB主机）发送的缓冲器消息。此外，可以独立于USB主机和USB设备之间的任何数据交换机制来发送缓冲器消息。 USB设备可以从USB主机接收数据分组，并且发送包括数据分组状态信息的数据分组确认消息以及关于缓冲器中的可用存储空间的信息。

3. 发明授权

US08312183B2 Bus port power management 有权
标题翻译：总线端口电源管理
公开(公告)号：US08312183B2
公开(公告)日：2012-11-13
申请号：US12763994
申请日：2010-04-20
申请人： John S. Howard
发明人： John S. Howard
IPC分类号： G06F3/00
CPC分类号： G06F13/426 , G06F1/3203 , G06F1/325 , G06F1/3253 , Y02D10/151 , Y02D50/20
摘要： For one disclosed embodiment, an apparatus comprises a display and a circuit. The circuit has a first port to be coupled to communicate over data lines with a Universal Serial Bus (USB) port of a device external to the apparatus. The circuit is operable to detect resume signaling of a duration of less than one millisecond and to transition the first port from a first state corresponding to an idle state of the data lines to a second, enabled state in response to the resume signaling. For one disclosed embodiment, the circuit is operable to drive resume signaling for a duration of less than one millisecond to initiate transition of the first port from a first state corresponding to an idle state of the data lines to a second, enabled state. Other embodiments are also disclosed.
摘要翻译：对于一个公开的实施例，一种装置包括显示器和电路。该电路具有第一端口，用于通过数据线与设备外部设备的通用串行总线（USB）端口进行耦合。电路可操作以响应于恢复信令，检测小于一毫秒的持续时间的恢复信令，并且使第一端口从对应于数据线的空闲状态的第一状态转变到第二使能状态。对于一个公开的实施例，电路可操作以在小于一毫秒的持续时间内驱动恢复信令，以启动第一端口从对应于数据线的空闲状态的第一状态转换到第二启用状态。还公开了其他实施例。

4. 发明授权

US07007119B2 System and method for supporting split transactions on a bus 失效
公开(公告)号：US07007119B2
公开(公告)日：2006-02-28
申请号：US09967775
申请日：2001-09-28
申请人： John S. Howard , John L. Garney
发明人： John S. Howard , John L. Garney
IPC分类号： G06F13/00
CPC分类号： G06F13/4022 , Y10S345/951
摘要： System and method for supporting split transactions on a bus. The method may comprise processing a periodic frame list of external bus data frame by frame, and traversing each frame node by node. When a save place node is encountered in a first frame, the traversing jumps to a destination node pointed to by the save place node in a second frame, and continues the traversing there. When a restore place node is encountered when traversing the nodes in the second frame, the traversing returns to the node after the save place node in the first frame and continues the processing in the first frame. The method may be implemented on a system that comprises a processor, a memory, an internal bus, and an external bus controller. The external bus controller and the external bus data may support one or more versions of the Universal Serial Bus standard.

5. 发明授权

US07007110B2 Nak throttling for USB host controllers 失效
公开(公告)号：US07007110B2
公开(公告)日：2006-02-28
申请号：US09823558
申请日：2001-03-30
申请人： John S. Howard , John I. Garney
发明人： John S. Howard , John I. Garney
IPC分类号： G06F13/14
CPC分类号： G06F13/385
摘要： A method and apparatus for traversing a schedule with a bus master, the schedule having a plurality of elements, each element having information pertaining to one of a plurality of endpoints; executing transactions on a bus in accordance with the information pertaining to the plurality of endpoints; counting flow control events issued by individual endpoints; and skipping elements in the traversal of the schedule, the elements being skipped corresponding to endpoints which have issued a threshold number of flow control events.

6. 发明授权

US06952429B2 Transaction scheduling for a bus system in a multiple speed environment 失效
标题翻译：在多速度环境中的总线系统的事务调度
公开(公告)号：US06952429B2
公开(公告)日：2005-10-04
申请号：US10613971
申请日：2003-07-03
申请人： John I. Garney , John S. Howard
发明人： John I. Garney , John S. Howard
IPC分类号： H04L12/417 , H04J3/24
CPC分类号： H04L12/4625 , H04L12/40013 , H04L12/4013 , H04L12/403 , H04L12/417
摘要： A method of and apparatus for communicating data using a hub. The method includes determining a first estimated unused capacity left in a first frame in which a second transaction is to be performed between a hub and an agent. The method then includes determining an amount of a first data that can fit into the estimated unused capacity and that is to be sent to the hub during a first transaction and then sent by the hub to the agent during the second transaction. The method also includes sending the first data to the hub during the first transaction.
摘要翻译：一种使用集线器传送数据的方法和装置。该方法包括确定在第一帧中剩下的第一估计未使用容量，其中将在轮毂和代理之间执行第二事务。该方法然后包括确定可以适应于估计的未使用容量的第一数据的量，并且将在第一事务期间发送到集线器，然后由集线器在第二事务期间发送到代理。该方法还包括在第一次交易期间将第一数据发送到集线器。

7. 发明授权

US06748465B2 Local bus polling support buffer 有权
标题翻译：本地总线轮询支持缓冲区
公开(公告)号：US06748465B2
公开(公告)日：2004-06-08
申请号：US09968073
申请日：2001-09-28
申请人： John S. Howard , Brad Hosler
发明人： John S. Howard , Brad Hosler
IPC分类号： G06F1300
CPC分类号： G06F1/3287 , G06F1/3203 , G06F13/22 , Y02D10/171
摘要： A method and apparatus for allowing memory, cache and/or a processor to remain powered down while repetitive transactions are carried out on an I/O bus and actions are taken in response to feedback received from I/O devices coupled to the I/O bus.
摘要翻译：一种用于允许存储器，高速缓存和/或处理器在I / O总线上执行重复事务时保持断电的方法和装置，并且响应从耦合到I / O的I / O设备接收到的反馈而采取动作总线。

8. 发明授权

US06678761B2 Method and apparatus for budget development under universal serial bus protocol in a multiple speed transmission environment 有权
标题翻译：通用串行总线协议在多速传输环境下的预算开发方法和装置
公开(公告)号：US06678761B2
公开(公告)日：2004-01-13
申请号：US09823798
申请日：2001-03-30
申请人： John I. Garney , John S. Howard
发明人： John I. Garney , John S. Howard
IPC分类号： G06F300
CPC分类号： G06F13/4059 , G06F2213/0042
摘要： A system and method for serial bus budget development and maintenance. The present invention relates to a method for budgeting transactions under a Universal Serial Bus (USB) protocol, utilizing split transactions, such as USB 2.0. The present invention provides for budgeting transactions occurring across a high-speed to full/low-speed translation, accommodating the full/low speed transactions as well as high-speed splits and data overhead in accordance with USB protocol.
摘要翻译：一种用于串行总线预算开发和维护的系统和方法。本发明涉及一种利用诸如USB2.0之类的分割事务在通用串行总线（USB）协议下预算交易的方法。本发明提供了在高速到全/低速转换之间发生的预算交易，适应全/低速交易以及根据USB协议的高速分割和数据开销。

9. 发明授权

US06546018B1 Digital system having a peripheral bus structure with at least one store-and-forward segment 有权
标题翻译：数字系统具有具有至少一个存储和转发段的外围总线结构
公开(公告)号：US06546018B1
公开(公告)日：2003-04-08
申请号：US09309484
申请日：1999-05-10
申请人： John I. Garney , John S. Howard , Venkat Iyer
发明人： John I. Garney , John S. Howard , Venkat Iyer
IPC分类号： H04J1500
CPC分类号： G06F13/385
摘要： A digital system is provided with a bus controller to operate and control a peripheral bus, wherein the bus controller selectively operates at least a first portion of the peripheral bus in a store-and-forward manner. The bus controller facilitates communication with a first bus agent in this first portion by sending a number of request packets destined for the first bus agent to a first hub in the first portion, in an integrated multi-packet form, in bulk, and at a first communication speed. The first hub buffers the request packets, and then forwards the request packets to the first bus agent, on a packet-by-packet basis, and at a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. In one embodiment, the first hub also receives communications destined for a second bus agent of this first portion, from the bus controller at the first communication speed, and repeats the communications for the second bus agent without buffering, at also the first communication speed. In another embodiment, the peripheral bus further includes a second portion, including a second hub that receives communications destined for a third bus agent in this second portion, from the bus controller at the second communication speed, and repeats the communications for the third bus agent without buffering, at also the second communication speed.
摘要翻译：数字系统设置有总线控制器以操作和控制外围总线，其中总线控制器以存储和转发的方式选择性地操作外围总线的至少第一部分。总线控制器通过以大量方式以集成的多分组形式向第一部分中的第一集线器发送目的地为第一总线代理的多个请求分组，并且在第一通讯速度。第一集线器缓冲请求分组，然后以逐个分组的方式，以第二通信速度将请求分组转发到第一总线代理。在一个实施例中，第二通信速度比第一通信速度慢。在一个实施例中，第一集线器还以第一通信速度从总线控制器接收目的地为该第一部分的第二总线代理的通信，并且也以第一通信速度重复第二总线代理的通信而不进行缓冲。在另一个实施例中，外围总线还包括第二部分，包括第二集线器，第二集线器以第二通信速度从总线控制器接收发往第二部分中的第三总线代理的通信，并重复第三总线代理的通信没有缓冲，也是第二个通信速度。

10. 发明授权

US06389501B1 I/O peripheral device for use in a store-and-forward segment of a peripheral bus 有权
标题翻译：用于外围总线存储转发段的I / O外围设备
公开(公告)号：US06389501B1
公开(公告)日：2002-05-14
申请号：US09309087
申请日：1999-05-10
申请人： John I. Garney , John S. Howard , Venkat Iyer
发明人： John I. Garney , John S. Howard , Venkat Iyer
IPC分类号： G06F1312
CPC分类号： G06F13/4059
摘要： An I/O peripheral device is equipped with a first collection of circuitry to enable the I/O peripheral device to provide a store-and-forward manner of operation to a segment of a peripheral bus. The first collection of circuitry includes first buffering circuitry to buffer request packets destined for a first bus agent, received from a bus controller in an integrated multi-packet form, in bulk, and at a first communication speed. Furthermore, the first collection includes control circuitry to forward the request packets separately, in a packet-by-packet basis, to the first bus agent, in a second communication speed. In one embodiment, the second communication speed is slower than the first communication speed. The I/O peripheral device further includes second buffer circuitry to buffer response packets to a request from the first bus agent provided separately, and each at the slower second communication speed. The first control circuitry also facilitates forwarding of the buffered response packets to the bus controller in bulk at the faster first communication speed. In one embodiment, the I/O peripheral device further includes second control circuitry to repeat communications destined for a second bus agent, received from the bus controller at the first communication speed, for the second bus agent, at also the first communication speed. In one embodiment, the I/O peripheral device is a hub.
摘要翻译： I / O外围设备配备有电路的第一集合，以使得I / O外围设备能够向外围总线的段提供存储转发的操作方式。电路的第一集合包括第一缓冲电路，用于以批量和第一通信速度缓冲以集成多分组形式从总线控制器接收的去往第一总线代理的请求分组。此外，第一集合包括控制电路，其以第二通信速度逐个分组地将请求分组转发到第一总线代理。在一个实施例中，第二通信速度比第一通信速度慢。 I / O外围设备还包括第二缓冲器电路，用于将响应分组缓冲到来自分开提供的第一总线代理的请求，并且每个以较慢的第二通信速度缓冲。第一控制电路还有助于将缓冲的响应分组以更快的第一通信速度批量转发到总线控制器。在一个实施例中，I / O外围设备还包括第二控制电路，用于以第一通信速度，以第一通信速度从总线控制器接收第二总线代理的第二总线代理用于第二总线代理。在一个实施例中，I / O外围设备是集线器。

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