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    • 1. 发明授权
    • Production method for SIMOX substrate and SIMOX substrate
    • SIMOX基板和SIMOX基板的生产方法
    • US07067402B2
    • 2006-06-27
    • US10473692
    • 2002-03-28
    • Atsuki MatsumuraKeisuke KawamuraYoichi NagatakeSeiji Takayama
    • Atsuki MatsumuraKeisuke KawamuraYoichi NagatakeSeiji Takayama
    • H01L21/762
    • H01L21/76243
    • A Separation by Implanted Oxygen (“SIMOX”) substrate and method for making thereof are provided. The SIMOX substrate can be produced by employing an oxygen ion implantation amount in a low dose range. The substrate is a high quality SOI substrate having an increased thickness of a BOX layer. More specifically, the SIMOX substrate and method for making the same are provided such that a buried oxide layer and a surface silicon layer are formed by applying the implantation of oxygen ions in a silicon substrate and a high temperature heat treatment thereafter. A buried oxide layer is provided by applying a high temperature heat treatment after an oxygen ion implantation; then applying an additional oxygen ion implantation so that the peak position of the distribution of implanted oxygen is located at a portion lower than the interface between the buried oxide layer, already formed, and the substrate thereunder. Then, another high temperature heat treatment is applied. The SIMOX substrate has a surface silicon layer 10 to 400 nm in thickness and a buried oxide layer 60 to 250 nm in thickness.
    • 提供了通过植入氧(“SIMOX”)底物的分离及其制备方法。 可以通过在低剂量范围内使用氧离子注入量来制造SIMOX基板。 衬底是具有增加BOX层厚度的高质量SOI衬底。 更具体地,提供SIMOX基板及其制造方法,从而通过在硅基板中注入氧离子并在其后进行高温热处理来形成掩埋氧化物层和表面硅层。 通过在氧离子注入后施加高温热处理来提供掩埋氧化物层; 然后施加额外的氧离子注入,使得注入氧的分布的峰位置位于比已经形成的掩埋氧化物层和其下的衬底之间的界面低的部分。 然后,进行另一种高温热处理。 SIMOX基板具有厚度为10至400nm的表面硅层和厚度为60至250nm的掩埋氧化物层。
    • 2. 发明授权
    • SOI substrate, semiconductor substrate, and method for production thereof
    • SOI衬底,半导体衬底及其制造方法
    • US07320925B2
    • 2008-01-22
    • US10858646
    • 2004-06-02
    • Tsutomu SasakiSeiji TakayamaAtsuki Matsumura
    • Tsutomu SasakiSeiji TakayamaAtsuki Matsumura
    • H01L21/84
    • H01L21/26533H01L21/26586H01L21/76243H01L21/76267
    • A method is for commercially producing by the SIMOX technique a perfect partial SOI structure avoiding exposure of a buried oxide film through the surface thereof and forming no step between an SOI region and a non-SOI region.A method for the production of an SOI substrate, includes forming on the surface of a semiconductor substrate made of a silicon single crystal a protective film designated to serve as a mask for ion implantation, forming an opening part of a stated pattern in the protective film, implanting oxygen ions into the surface of the semiconductor substrate in a direction not perpendicular thereto, and heat treating the semiconductor substrate thereby forming a buried oxide film in the semiconductor substrate, and inducing at the step of implanting oxygen ions into the surface of the semiconductor substrate the impartation of at least two angles to be formed between the projection of the flux of implantation of oxygen ions and a specific azimuth of the main body of the substrate.
    • 一种通过SIMOX技术商业生产的方法是完美的部分SOI结构,避免了掩埋氧化膜通过其表面的暴露,并且在SOI区域和非SOI区域之间不形成台阶。 一种制造SOI衬底的方法,包括在由硅单晶制成的半导体衬底的表面上形成指定为用于离子注入的掩模的保护膜,在保护膜中形成所述图案的开口部分 在与半导体衬底的表面不沿垂直的方向上将氧离子注入到半导体衬底的表面中,对半导体衬底进行热处理,从而在半导体衬底中形成掩埋氧化膜,并在将氧离子注入半导体表面的步骤 在氧离子注入焊剂的突起与基板主体的特定方位之间形成至少两个角度的基底。
    • 4. 发明申请
    • Silicon Wafer And Production Method Thereof
    • 硅晶片及其制作方法
    • US20120032229A1
    • 2012-02-09
    • US13191532
    • 2011-07-27
    • Hiroyuki DeaiSeiji Takayama
    • Hiroyuki DeaiSeiji Takayama
    • H01L29/165H01L29/36
    • H01L21/02381H01L21/0245H01L21/02532H01L21/02576H01L21/0262
    • A silicon wafer contains: a silicon substrate; a first epitaxial layer on the silicon wafer, wherein the absolute value of the difference between donor and acceptor concentrations is ≧1×1018 atoms/cm3; a second epitaxial layer above the first epitaxial layer, whose conductivity type is the same as the first epitaxial layer, wherein the absolute value of the difference between donor and acceptor concentrations is ≦5×1017 atoms/cm3; wherein, by doping a lattice constant adjusting material into the first epitaxial layer, the variation amount ((a1-aSi)/aSi) of the lattice constant of the first epitaxial layer (a1) relative to the lattice constant of the silicon single crystal (aSi) as well as the variation amount ((a2-aSi)/aSi) of the lattice constant of the second epitaxial layer (a2) relative to the lattice constant of the silicon single crystal (aSi) are controlled to less than the critical lattice mismatch.
    • 硅晶片包含:硅衬底; 硅晶片上的第一外延层,其中供体和受主浓度之差的绝对值为≥1×1018原子/ cm3; 在第一外延层上方的第二外延层,其导电类型与第一外延层相同,其中供体和受体浓度之差的绝对值为5×1017原子/ cm3; 其中,通过将晶格常数调整材料掺杂到第一外延层中,第一外延层(a1)的晶格常数相对于硅单晶的晶格常数的变化量((a1-aSi)/ aSi) aSi)以及第二外延层(a2)的晶格常数相对于硅单晶(aSi)的晶格常数的变化量((a2-aSi)/ aSi)被控制为小于临界晶格 不匹配。