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1. 发明申请

US20150188583A1 FEEDBACK CALIBRATION OF DIGITAL TO TIME CONVERTER 有权
标题翻译：数字到时间转换器的反馈校准
公开(公告)号：US20150188583A1
公开(公告)日：2015-07-02
申请号：US14140801
申请日：2013-12-26
申请人： Ashoke Ravi , Ofir Degani , Hasnain Lakdawala
发明人： Ashoke Ravi , Ofir Degani , Hasnain Lakdawala
IPC分类号： H04B1/04 , H03M1/84
CPC分类号： H04B17/21 , H03F1/3241 , H03M1/1009 , H03M1/82 , H03M1/84 , H04B1/0475 , H04B2001/0425
摘要： This document discusses apparatus and methods for compensating non-linearity of digital-to-time converters (DTCs). In an example, a wireless device can include a digital-to-time converter (DTC) configured to receive a phase data information from a baseband processor and to provide a first modulation signal for generating a wireless signal, a detector configure to receive the first modulation signal and provide an indication of nonlinearities of the DTC, and a pre-distortion module configured to provide pre-distortion information to the DTC using the indication of nonlinearities.
摘要翻译：本文讨论了用于补偿数字到时间转换器（DTC）的非线性的装置和方法。在一个示例中，无线设备可以包括被配置为从基带处理器接收相位数据信息并提供用于生成无线信号的第一调制信号的数字 - 时间转换器（DTC），检测器配置为接收第一调制信号并提供DTC的非线性指示，以及被配置为使用非线性指示向DTC提供预失真信息的预失真模块。

2. 发明申请

US20150116012A1 Digital Voltage Ramp Generator 审中-公开
标题翻译：数字电压斜坡发生器
公开(公告)号：US20150116012A1
公开(公告)日：2015-04-30
申请号：US14066961
申请日：2013-10-30
申请人： Hasnain Lakdawala , Eshel Gordon , Ofir Degani , Ashoke Ravi , Thomas W. Brown
发明人： Hasnain Lakdawala , Eshel Gordon , Ofir Degani , Ashoke Ravi , Thomas W. Brown
IPC分类号： H03K4/12
CPC分类号： H03K4/12 , H03K4/48 , H03K4/502
摘要： According to some embodiments, an all digital ramp generator may use a string of series connected delays or digital to time-based circuits to perform voltage ramp generation. Thus in some embodiments conventional operational amplifier circuits and relaxation oscillators may be replaced for generating triangular ramp waveforms for DC to DC or direct time-based DC to DC converters. The use of delay lines may produce sufficient resolution for many applications. Thus time domain techniques may afford a more digital approach that scales with process technology and allows high speed operation in some embodiments. A design based on use of inverters and capacitors may scale well with process technology. The decoder and drive logic may be integrated into the voltage ramp generation in some embodiments.
摘要翻译：根据一些实施例，全数字斜坡发生器可以使用串联连接的延迟串或数字到基于时间的电路来执行电压斜坡生成。因此，在一些实施例中，常规运算放大器电路和弛豫振荡器可以被替换以产生用于直流到直流或直接基于时间的直流到直流转换器的三角形斜坡波形。使用延迟线可以为许多应用产生足够的分辨率。因此，时域技术可以提供与数字处理技术相比较的数字化方法，并且在一些实施例中允许高速操作。基于逆变器和电容器的设计可以与工艺技术相结合。在一些实施例中，解码器和驱动逻辑可以集成到电压斜坡生成中。

3. 发明申请

US20120142304A1 Power Amplifiers for Wireless Systems 审中-公开
标题翻译：无线系统功率放大器
公开(公告)号：US20120142304A1
公开(公告)日：2012-06-07
申请号：US12958503
申请日：2010-12-02
申请人： Ofir Degani , Ashoke Ravi , Hasnain Lakdawala
发明人： Ofir Degani , Ashoke Ravi , Hasnain Lakdawala
IPC分类号： H04B1/16 , H03F1/00
CPC分类号： H03F1/025 , H03F1/02 , H03F3/19 , H03F3/211 , H03F3/24 , H03F3/245 , H03F2200/102 , H03F2200/507 , H03F2200/511 , H03F2200/516 , H04B2001/045
摘要： A wireless transceiver may include a power amplifier that uses an envelope tracker. The envelope tracker may include stacked buck switching supply modulators, each having two different supply voltages. In one embodiment, the two different supply voltages are higher and lower supply voltages, which relaxes the voltage head room on the switching regulator and allows the use of thin gate fast transistors in some embodiments.
摘要翻译：无线收发器可以包括使用信封跟踪器的功率放大器。包络跟踪器可以包括堆叠的降压开关电源调制器，每个具有两个不同的电源电压。在一个实施例中，两个不同的电源电压是较高和较低的电源电压，其在一些实施例中放宽了开关调节器上的电压头部室并允许使用薄栅极快速晶体管。

4. 发明申请

US20090002086A1 Film bulk acoustic resonator calibration 失效
公开(公告)号：US20090002086A1
公开(公告)日：2009-01-01
申请号：US11823856
申请日：2007-06-28
申请人： Hasnain Lakdawala , Ofir Degani , Ashoke Ravi , Masoud Sajadieh , Soumyanath Krishnamurthy
发明人： Hasnain Lakdawala , Ofir Degani , Ashoke Ravi , Masoud Sajadieh , Soumyanath Krishnamurthy
IPC分类号： H03L1/00
CPC分类号： H03L1/026 , H03L7/1974
摘要： Film bulk acoustic resonators (FBARS) have resonant frequencies that vary with manufacturing variations, but tend to be matched when in proximity on an integrated circuit die. FBAR resonant frequency is determined using a fractional-N synthesizer and comparing phase/frequency of an output signal from the fractional-N synthesizer to a reference. The reference may be derived from a low frequency crystal oscillator, an external signal source, or a communications signal.

5. 发明授权

US08773182B1 Stochastic beating time-to-digital converter (TDC) 失效
标题翻译：随机抖动时间 - 数字转换器（TDC）
公开(公告)号：US08773182B1
公开(公告)日：2014-07-08
申请号：US13756670
申请日：2013-02-01
申请人： Ofir Degani , Ashoke Ravi , Hasnain Lakdawala , Rotem Banin
发明人： Ofir Degani , Ashoke Ravi , Hasnain Lakdawala , Rotem Banin
IPC分类号： H03L7/06
CPC分类号： H03L7/085 , G04F10/005 , H03L2207/50
摘要： A stochastic beating time-to-digital converter (TDC) can include triggered ring oscillator (TRO) and a stochastic TDC (sTDC). The TRO, when triggered by a reference signal edge, can generate a periodic TRO signal with a TRO period that is a selected ratio of a voltage-controlled oscillator (VCO) period. The TRO period can be greater than or less than the VCO period by the specified ratio. The sTDC with an event triggered memory can include an sTDC component with a plurality of groups of latches. Each group of latches can be configured to sample and store a VCO state at an edge of a TRO signal. The sTDC component can trigger a capture of a select number of VCO states of the group of latches when one latch in the group of latches transitions to a different digital state referred to as a transition edge.
摘要翻译：随机抖动时间 - 数字转换器（TDC）可以包括触发环形振荡器（TRO）和随机TDC（sTDC）。当由参考信号沿触发时，TRO可以产生具有作为压控振荡器（VCO）周期的选定比率的TRO周期的周期性TRO信号。 TRO周期可以大于或小于VCO周期的指定比率。具有事件触发的存储器的sTDC可以包括具有多组锁存器的sTDC组件。每组锁存器可以配置为在TRO信号的边沿采样和存储VCO状态。当锁存器组中的一个锁存器转变为被称为过渡沿的不同数字状态时，sTDC组件可以触发锁存器组的选定数量的VCO状态的捕获。

6. 发明授权

US07576621B2 Film bulk acoustic resonator calibration 失效
标题翻译：薄膜体声共振器校准
公开(公告)号：US07576621B2
公开(公告)日：2009-08-18
申请号：US11823856
申请日：2007-06-28
申请人： Hasnain Lakdawala , Ofir Degani , Ashoke Ravi , Masoud Sajadieh , Soumyanath Krishnamurthy
发明人： Hasnain Lakdawala , Ofir Degani , Ashoke Ravi , Masoud Sajadieh , Soumyanath Krishnamurthy
IPC分类号： H03L1/00
CPC分类号： H03L1/026 , H03L7/1974
摘要： Film bulk acoustic resonators (FBARS) have resonant frequencies that vary with manufacturing variations, but tend to be matched when in proximity on an integrated circuit die. FBAR resonant frequency is determined using a fractional-N synthesizer and comparing phase/frequency of an output signal from the fractional-N synthesizer to a reference. The reference may be derived from a low frequency crystal oscillator, an external signal source, or a communications signal.
摘要翻译：薄膜体声共振器（FBARS）具有随着制造变化而变化的谐振频率，但是当在集成电路芯片附近时，它们倾向于匹配。使用分数N合成器确定FBAR谐振频率，并将来自分数N合成器的输出信号的相位/频率与参考值进行比较。该参考可以从低频晶体振荡器，外部信号源或通信信号导出。

7. 发明申请

US20090041108A1 CASCADED PHASE PULSE POSITION AND PULSE WIDTH MODULATION BASED DIGITAL TRANSMITTER 有权
标题翻译：基于脉冲位置和脉冲宽度调制的数字信号发生器
公开(公告)号：US20090041108A1
公开(公告)日：2009-02-12
申请号：US11837043
申请日：2007-08-10
申请人： Ofir Degani , Hasnain Lakdawala , Ashoke Ravi
发明人： Ofir Degani , Hasnain Lakdawala , Ashoke Ravi
IPC分类号： H03K7/10
CPC分类号： H04L25/4902
摘要： Briefly, in accordance with one or more embodiments, a digital transmitter may comprise two or more phase modulators in a cascaded arrangement. The phase modulators may modulate a local oscillator signal using control signals derived from the quadrature baseband data to be transmitted. A closed loop power control feedback arrangement may be used to compare the output power of the transmitter with a desired output signal, and make corrections to the output signal by modifying at least one of the control signals provided to the cascaded phase modulators.
摘要翻译：简而言之，根据一个或多个实施例，数字发射机可以包括两个或更多个级联布置的相位调制器。相位调制器可以使用从要发送的正交基带数据导出的控制信号来调制本地振荡器信号。可以使用闭环功率控制反馈装置来将发射机的输出功率与期望的输出信号进行比较，并且通过修改提供给级联相位调制器的控制信号中的至少一个来对输出信号进行校正。

8. 发明申请

US20090034603A1 SUBRANGING FOR A PULSE POSITION AND PULSE WIDTH MODULATION BASED TRANSMITTER 有权
标题翻译：用于脉冲位置和脉冲宽度调制的发射机的SUBRANGING
公开(公告)号：US20090034603A1
公开(公告)日：2009-02-05
申请号：US12176646
申请日：2008-07-21
申请人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Itshak Hod , Yorgos Palaskas , Masoud Sajadieh
发明人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Itshak Hod , Yorgos Palaskas , Masoud Sajadieh
IPC分类号： H03K7/08
CPC分类号： H03K7/10 , H03F3/2178 , H04B1/0483 , H04L25/4902
摘要： Briefly, in accordance with one or more embodiments, in a pulse position and pulse position modulation out-phasing transmitter, the range of the phase angle, theta, may be divided into more than one range to drive a first power amplifier with a first range of theta, and to drive a second power amplifier with a second range of theta. In one or more embodiments, a main power amplifier is driven with a first phase range having a higher probability density function, and an overload power amplifier is driven with a first phase range having a lower probability density function. In one or more embodiments, a full adder may be used to combine the two phases wherein the sum signal is used to drive the main power amplifier, and the carry signal is used to drive the overload power amplifier.
摘要翻译：简而言之，根据一个或多个实施例，在脉冲位置和脉冲位置调制输出相位变送器中，相位角θ的范围可被划分成多于一个范围以驱动具有第一范围的第一功率放大器的θ，并驱动具有θ的第二范围的第二功率放大器。在一个或多个实施例中，主功率放大器由具有较高概率密度函数的第一相位范围驱动，而过载功率放大器由具有较低概率密度函数的第一相位范围驱动。在一个或多个实施例中，全加器可以用于组合两相，其中求和信号用于驱动主功率放大器，并且进位信号用于驱动过载功率放大器。

9. 发明授权

US08736384B2 Delay line calibration 有权
标题翻译：延迟线校准
公开(公告)号：US08736384B2
公开(公告)日：2014-05-27
申请号：US12769806
申请日：2010-04-29
申请人： Ashoke Ravi , Ofir Degani , Hasnain Lakdawala , Masoud Sajadieh
发明人： Ashoke Ravi , Ofir Degani , Hasnain Lakdawala , Masoud Sajadieh
IPC分类号： H03L7/095
CPC分类号： H03L7/1978
摘要： In some embodiments, provided are calibration techniques for measuring mismatches between TDL delay stage elements, and in some cases, then compensating for the mismatches to minimize performance degradation.
摘要翻译：在一些实施例中，提供了用于测量TDL延迟级元件之间的不匹配的校准技术，并且在一些情况下，然后补偿不匹配以最小化性能下降。

10. 发明授权

US08098726B2 Subranging for a pulse position and pulse width modulation based transmitter 有权
标题翻译：基于脉冲位置和基于脉宽调制的发射机的分组
公开(公告)号：US08098726B2
公开(公告)日：2012-01-17
申请号：US12176646
申请日：2008-07-21
申请人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Itshak Hod , Yorgos Palaskas , Masoud Sajadieh
发明人： Hasnain Lakdawala , Ashoke Ravi , Ofir Degani , Itshak Hod , Yorgos Palaskas , Masoud Sajadieh
IPC分类号： H03K7/08
CPC分类号： H03K7/10 , H03F3/2178 , H04B1/0483 , H04L25/4902
摘要： Briefly, in accordance with one or more embodiments, in a pulse position and pulse position modulation out-phasing transmitter, the range of the phase angle, theta, may be divided into more than one range to drive a first power amplifier with a first range of theta, and to drive a second power amplifier with a second range of theta. In one or more embodiments, a main power amplifier is driven with a first phase range having a higher probability density function, and an overload power amplifier is driven with a first phase range having a lower probability density function. In one or more embodiments, a full adder may be used to combine the two phases wherein the sum signal is used to drive the main power amplifier, and the carry signal is used to drive the overload power amplifier.
摘要翻译：简而言之，根据一个或多个实施例，在脉冲位置和脉冲位置调制输出相位变送器中，相位角θ的范围可被划分成多于一个范围以驱动具有第一范围的第一功率放大器的θ，并驱动具有θ的第二范围的第二功率放大器。在一个或多个实施例中，主功率放大器由具有较高概率密度函数的第一相位范围驱动，而过载功率放大器由具有较低概率密度函数的第一相位范围驱动。在一个或多个实施例中，全加器可以用于组合两相，其中求和信号用于驱动主功率放大器，并且进位信号用于驱动过载功率放大器。

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