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1. 发明授权

US09917570B2 Method and apparatus for signal filtering and for improving properties of electronic devices 有权
公开(公告)号：US09917570B2
公开(公告)日：2018-03-13
申请号：US15271819
申请日：2016-09-21
申请人： Avatekh, Inc.
发明人： Alexei V. Nikitin
IPC分类号： H03M1/84 , H03M1/88 , H03H17/02 , H03H7/01 , H03H11/12 , H03H21/00 , H03M1/12 , H03H11/24
CPC分类号： H03H17/0219 , H03H7/0153 , H03H11/1256 , H03H11/1291 , H03H11/24 , H03H17/0201 , H03H21/0001 , H03H21/0016 , H03H2210/043 , H03M1/1235
摘要： The present invention relates to nonlinear signal processing, and, in particular, to adaptive nonlinear filtering of real-, complex-, and vector-valued signals utilizing analog Nonlinear Differential Limiters (NDLs), and to adaptive real-time signal conditioning, processing, analysis, quantification, comparison, and control. More generally, this invention relates to methods, processes and apparatus for real-time measuring and analysis of variables, and to generic measurement systems and processes. This invention also relates to methods and corresponding apparatus for measuring which extend to different applications and provide results other than instantaneous values of variables. The invention further relates to post-processing analysis of measured variables and to statistical analysis. The NDL-based filtering method and apparatus enable improvements in the overall properties of electronic devices including, but not limited to, improvements in performance, reduction in size, weight, cost, and power consumption, and, in particular for wireless devices, NDLs enable improvements in spectrum usage efficiency.

2. 发明授权

US07212141B2 Filter with gain 有权
标题翻译：过滤增益
公开(公告)号：US07212141B2
公开(公告)日：2007-05-01
申请号：US11178625
申请日：2005-07-11
申请人： Hasnain Lakdawala , Ashoke Ravi , Georgios Palaskas , Stefan H. Andersson , Krishnamurthy Soumyanath
发明人： Hasnain Lakdawala , Ashoke Ravi , Georgios Palaskas , Stefan H. Andersson , Krishnamurthy Soumyanath
IPC分类号： H03M1/84 , H03M1/62
CPC分类号： H03H15/02
摘要： Embodiments of a filter with gain are presented herein.
摘要翻译：本文给出了具有增益的滤波器的实施例。

3. 发明授权

US06847318B2 Method and circuit for regulating the signal level fed to an analog-digital converter 有权
标题翻译：用于调节馈送到模数转换器的信号电平的方法和电路
公开(公告)号：US06847318B2
公开(公告)日：2005-01-25
申请号：US10372465
申请日：2003-02-21
申请人： Joseph Renier Gerardus Maria Leenen
发明人： Joseph Renier Gerardus Maria Leenen
IPC分类号： H03M1/18 , H03M1/06 , H03M1/62 , H03M1/84 , H03M1/88 , H04R25/00
CPC分类号： H03M1/183 , H04R25/505 , H04R2430/01
摘要： Methods and devices for converting an analog input signal into a digital output signal by means of an analog-to-digital converter are provided. The analog input signal is multiplied by a first adjustable scaling factor to form an analog intermediate signal. The analog intermediate signal is converted into a digital representation. The digital representation is multiplied by a second adjustable scaling factor to form a sample signal, and a third adjustable scaling factor to form the digital output signal. The level of the sample signal is determined and compared to first and second threshold values, with the first threshold value being greater than the second threshold value. The first adjustable scaling factor is increased and the second and third adjustable scaling factors are decreased if the sample signal level is higher than the first threshold value. The first adjustable scaling factor is decreased and the second and third adjustable scaling factors are increased if the sample signal level is lower than the second threshold value.
摘要翻译：提供了通过模数转换器将模拟输入信号转换成数字输出信号的方法和装置。模拟输入信号乘以第一可调节缩放因子以形成模拟中间信号。模拟中间信号被转换为数字表示。数字表示乘以第二可调缩放因子以形成采样信号，以及第三可调缩放因子以形成数字输出信号。确定采样信号的电平并将其与第一阈值和第二阈值进行比较，其中第一阈值大于第二阈值。如果采样信号电平高于第一阈值，则第一可调节缩放因子增加并且第二和第三可调节缩放因子减小。如果采样信号电平低于第二阈值，则第一可调节缩放因子减小，并且第二和第三可调缩放因子增加。

4. 发明授权

US5724036A Digital-to-analog converter with gamma compensation and a liquid crystal display device using same 失效
标题翻译：具有伽马补偿的数模转换器和使用其的液晶显示装置
公开(公告)号：US5724036A
公开(公告)日：1998-03-03
申请号：US523654
申请日：1995-09-05
申请人： Yoshinao Kobayashi , Yoshitami Sakaguchi
发明人： Yoshinao Kobayashi , Yoshitami Sakaguchi
IPC分类号： H04N5/202 , G09G3/20 , G09G3/36 , H03M1/66 , H03M1/74 , H03M1/76 , H04N5/66 , H03M1/84
CPC分类号： G09G3/2011 , H03M1/664 , G09G2310/027 , G09G2320/0276 , G09G3/36 , G09G3/3685 , H03M1/765
摘要： A DAC is disclosed that includes a decoder having output lines corresponding to digits of digital data. The decoder generates an output corresponding to the value of the digital data on the output lines. The DAC further includes a constant current source, and output means connected to the constant current source for providing an output voltage by a flowing current. The DAC also has driver transistors, where each transistor is connected to one of the decoder output lines and to the constant current source. The output means conducts a current from the constant current source when the connected output line is activated. Current limit transistors are each connected to each one of the driver transistors. The decoder output lines are grouped so as to correspond to each of the ranges of a gamma compensation curve. A common reference voltage for each group is applied to a control terminal of the current limiting transistors associated with the output lines in each group.
摘要翻译：公开了一种DAC，其包括具有对应于数字数据的数字的输出线的解码器。解码器产生对应于输出线上的数字数据的值的输出。 DAC还包括恒流源和连接到恒流源的输出装置，用于通过流动电流提供输出电压。 DAC还具有驱动器晶体管，其中每个晶体管连接到解码器输出线之一和恒流源。当连接的输出线被激活时，输出装置从恒流源传导电流。电流限制晶体管各自连接到每个驱动器晶体管。解码器输出线被分组以对应于伽马补偿曲线的每个范围。每个组的公共参考电压被施加到与每个组中的输出线相关联的限流晶体管的控制端子。

5. 发明授权

US5455581A Digital-to-analog converter employing a common trigger and reference signal 失效
标题翻译：采用公共触发和参考信号的数模转换器
公开(公告)号：US5455581A
公开(公告)日：1995-10-03
申请号：US154519
申请日：1993-11-19
申请人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
发明人： Guoliang Shou , Weikang Yang , Sunao Takatori , Makoto Yamamoto
IPC分类号： H03M1/84 , H03M1/82
CPC分类号： H03M1/82
摘要： The D/A converter comprises: a digital counter receiving a reference clock pluses and a reference voltage as a start signal so as to output a stop signal when the digital counter counts the reference clock pulses until a predetermined number; and a number is reached, and an RC circuit having a resister and a capacitor receiving the reference voltage so as to be charged by a predetermined time constant until the stop signal is inputted to the RC circuit, whereby the RC circuit is charged up to a voltage corresponding to a time distance between the start signal and the stop signal.
摘要翻译： D / A转换器包括：数字计数器接收参考时钟脉冲和参考电压作为起始信号，以便当数字计数器对参考时钟脉冲进行计数直到预定数量时输出停止信号; 并且到达一个数字，以及RC电路，具有接收参考电压的电阻和电容器，以便以预定的时间常数充电直到停止信号被输入到RC电路，由此将RC电路充电到对应于起始信号和停止信号之间的时间距离的电压。

6. 发明公开

US20230179213A1 Current Operative Analog to Digital Converter (ADC) 审中-公开
公开(公告)号：US20230179213A1
公开(公告)日：2023-06-08
申请号：US18092959
申请日：2023-01-04
申请人： SigmaSense, LLC.
发明人： Phuong Huynh
IPC分类号： H03M1/06 , H03M1/46 , H03M1/12 , H03M3/00 , H03M1/84
CPC分类号： H03M1/0626 , H03M1/84 , H03M1/462 , H03M1/464 , H03M1/1245 , H03M3/32 , H03M3/43 , H03M3/462 , H03M3/476
摘要： An analog to digital converter (ADC) senses an analog signal (e.g., a load current) to generate a digital signal. The ADC operates based on a load voltage produced based on charging of an element (e.g., a capacitor) by a load current and a digital to analog converter (DAC) output current (e.g., from a N-bit DAC). The ADC generates a digital output signal representative of a difference between the load voltage and a reference voltage. This digital output signal is used directly, or after digital signal processing, to operate an N-bit DAC to generate a DAC output current that tracks the load current. The digital output signal provided to the N-bit DAC is an inverse function of the load current. The ADC is operative to sense very low currents (e.g., currents as low as 1 s of pico-amps) and consume very little power (e.g., less than 2 µW).

7. 发明授权

US09705613B2 Feedback calibration of digital to time converter 有权
公开(公告)号：US09705613B2
公开(公告)日：2017-07-11
申请号：US15099301
申请日：2016-04-14
申请人： Intel IP Corporation
发明人： Ashoke Ravi , Ofir Degani , Hasnain Lakdawala
IPC分类号： H04K1/02 , H04L25/03 , H04L25/49 , H04B17/21 , H03M1/84 , H04B1/04 , H03M1/10 , H03M1/82
CPC分类号： H04B17/21 , H03F1/3241 , H03M1/1009 , H03M1/82 , H03M1/84 , H04B1/0475 , H04B2001/0425
摘要： This document discusses apparatus and methods for compensating non-linearity of digital-to-time converters (DTCs). In an example, a wireless device can include a digital-to-time converter (DTC) configured to receive a phase data information from a baseband processor and to provide a first modulation signal for generating a wireless signal, a detector configure to receive the first modulation signal and provide an indication of nonlinearities of the DTC, and a pre-distortion module configured to provide pre-distortion information to the DTC using the indication of nonlinearities.

8. 发明授权

US08400339B2 Correlated-level-shifting and correlated-double-sampling switched-capacitor gain stages, systems implementing the gain stages, and methods of their operation 有权
标题翻译：相关电平移位和相关双采样开关电容器增益级，实现增益级的系统及其操作方法
公开(公告)号：US08400339B2
公开(公告)日：2013-03-19
申请号：US13075956
申请日：2011-03-30
申请人： Douglas A. Garrity , Brandt Braswell
发明人： Douglas A. Garrity , Brandt Braswell
IPC分类号： H03M1/62 , H03M1/84 , H03M1/88
CPC分类号： H03F3/005 , H03F3/45475 , H03F3/45986 , H03G1/0094
摘要： Embodiments of apparatus and methods for applying a gain to an input signal are provided. An embodiment of a switched-capacitor gain stage circuit includes an input node, an output node, an operational amplifier, a correlated-double-sampling portion, a correlated-level-shifting portion, and a switching configuration. The operational amplifier has a first amplifier input, a second amplifier input, and an amplifier output. The correlated-double-sampling portion includes a plurality of sampling capacitors arranged in parallel and selectively coupled between the input node and a central node, and an offset storage capacitor including a first terminal coupled to the first amplifier input. The correlated-level-shifting portion includes a correlated-level-shifting capacitor including a first terminal coupled to the output node. The switching configuration has multiple switches that are controllable sequentially to place the gain stage circuit in a sampling state, an approximate output voltage storage state, a level shifting and gain state, and an output state.
摘要翻译：提供了用于向输入信号施加增益的装置和方法的实施例。开关电容器增益级电路的实施例包括输入节点，输出节点，运算放大器，相关双采样部分，相关电平转换部分和切换配置。运算放大器具有第一放大器输入，第二放大器输入和放大器输出。相关双采样部分包括并联布置并选择性地耦合在输入节点和中心节点之间的多个采样电容器和包括耦合到第一放大器输入的第一端子的偏移存储电容器。相关电平移位部分包括相关电平移位电容器，其包括耦合到输出节点的第一端子。开关配置具有可以顺序控制的多个开关，以将增益级电路置于采样状态，近似输出电压存储状态，电平移位和增益状态以及输出状态。

9. 发明授权

US08035541B2 Digital-analog converter circuit, solid-state imaging device, and imaging apparatus 有权
标题翻译：数模转换器电路，固态成像装置和成像装置
公开(公告)号：US08035541B2
公开(公告)日：2011-10-11
申请号：US12511155
申请日：2009-07-29
申请人： Masatsugu Onizuka , Masaru Kikuchi
发明人： Masatsugu Onizuka , Masaru Kikuchi
IPC分类号： H03M1/62 , H03M1/84
CPC分类号： H03M1/70 , H03M1/742
摘要： A digital-analog converter circuit includes: a first digital-analog conversion part that obtains an analog output signal in response to a value of a digital input signal; and a second digital-analog conversion part that generates a control signal in response to a value of a digital gain control input signal externally input, wherein the first digital-analog conversion part adjusts a start voltage or end voltage of the analog output signal based on the digital gain control input signal for controlling the second digital-analog conversion part.
摘要翻译：数模转换器电路包括：第一数模转换部，其响应于数字输入信号的值而获得模拟输出信号; 以及第二数字 - 模拟转换部分，其响应于外部输入的数字增益控制输入信号的值产生控制信号，其中所述第一数模转换部分基于所述第一数模转换部分调整所述模拟输出信号的起始电压或结束电压用于控制第二数模转换部分的数字增益控制输入信号。

10. 发明授权

US07642941B2 Gamma reference voltages generating circuit 有权
标题翻译：伽马参考电压发生电路
公开(公告)号：US07642941B2
公开(公告)日：2010-01-05
申请号：US12165064
申请日：2008-06-30
申请人： Yao-Jen Tsai , Chi-Lun Hung
发明人： Yao-Jen Tsai , Chi-Lun Hung
IPC分类号： H03M1/84 , G09G5/10
CPC分类号： G09G3/3688 , G09G2310/027 , G09G2310/0291 , G09G2320/0276
摘要： A gamma reference voltages generating circuit is disclosed in the present invention. The gamma reference voltages generating circuit comprises a voltage provider, a plurality of first digital-to-analog converters and a plurality of second digital-to-analog converters. The voltage provider generates a plurality of first supply voltages and a plurality of second supply voltages according to a first gamma reference voltage. The first digital-to-analog converters are electrically coupled to the first supply voltages for generating a plurality of second gamma reference voltages. The second digital-to-analog converters are electrically coupled to the second supply voltages for generating a plurality of third gamma reference voltages.
摘要翻译：在本发明中公开了一种伽马参考电压产生电路。伽马参考电压产生电路包括电压提供器，多个第一数模转换器和多个第二数模转换器。电压提供器根据第一伽马参考电压产生多个第一电源电压和多个第二电源电压。第一数模转换器电耦合到第一电源电压以产生多个第二伽马参考电压。第二数模转换器电耦合到第二电源电压以产生多个第三伽马参考电压。

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