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1. 发明申请

US20100159678A1 GERMANIUM SUBSTRATE-TYPE MATERIALS AND APPROACH THEREFOR 有权
标题翻译：锗基材料及其方法
公开(公告)号：US20100159678A1
公开(公告)日：2010-06-24
申请号：US12719796
申请日：2010-03-08
申请人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
发明人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
IPC分类号： H01L21/20
CPC分类号： H01L29/518 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02587 , H01L21/0262 , H01L21/2807 , H01L21/28255 , H01L29/16 , H01L29/165 , H01L29/513 , H01L29/66575 , H01L29/94
摘要： Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices.
摘要翻译：锗电路型结构方便。在一个示例实施例中，实施多步生长和退火工艺以在包括硅（Si）或含硅材料的衬底上生长含锗（Ge）的材料，例如异质外延锗。在某些应用中，缺陷通常被限制在硅/锗界面附近，通常阻止含锗材料的上表面的缺陷穿线。这些方法适用于包括锗MOS电容器，pMOSFET和光电器件在内的各种器件。

2. 发明申请

US20090061604A1 GERMANIUM SUBSTRATE-TYPE MATERIALS AND APPROACH THEREFOR 有权
标题翻译：锗基材料及其方法
公开(公告)号：US20090061604A1
公开(公告)日：2009-03-05
申请号：US12198838
申请日：2008-08-26
申请人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
发明人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
IPC分类号： H01L21/205
CPC分类号： H01L29/518 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02587 , H01L21/0262 , H01L21/2807 , H01L21/28255 , H01L29/16 , H01L29/165 , H01L29/513 , H01L29/66575 , H01L29/94
摘要： Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices.
摘要翻译：锗电路型结构方便。在一个示例实施例中，实施多步生长和退火工艺以在包括硅（Si）或含硅材料的衬底上生长含锗（Ge）的材料，例如异质外延锗。在某些应用中，缺陷通常被限制在硅/锗界面附近，通常阻止含锗材料的上表面的缺陷穿线。这些方法适用于包括锗MOS电容器，pMOSFET和光电器件在内的各种器件。

3. 发明授权

US07495313B2 Germanium substrate-type materials and approach therefor 有权
标题翻译：锗衬底型材料及其方法
公开(公告)号：US07495313B2
公开(公告)日：2009-02-24
申请号：US11188140
申请日：2005-07-22
申请人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
发明人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
IPC分类号： H01L27/082
CPC分类号： H01L29/518 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02587 , H01L21/0262 , H01L21/2807 , H01L21/28255 , H01L29/16 , H01L29/165 , H01L29/513 , H01L29/66575 , H01L29/94
摘要： Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices.
摘要翻译：锗电路型结构方便。在一个示例实施例中，实施多步生长和退火工艺以在包括硅（Si）或含硅材料的衬底上生长含锗（Ge）的材料，例如异质外延锗。在某些应用中，缺陷通常被限制在硅/锗界面附近，通常阻止含锗材料的上表面的缺陷穿线。这些方法适用于包括锗MOS电容器，pMOSFET和光电器件在内的各种器件。

4. 发明授权

US07772078B2 Germanium substrate-type materials and approach therefor 有权
标题翻译：锗衬底型材料及其方法
公开(公告)号：US07772078B2
公开(公告)日：2010-08-10
申请号：US12198838
申请日：2008-08-26
申请人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
发明人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
IPC分类号： H01L21/76
CPC分类号： H01L29/518 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02587 , H01L21/0262 , H01L21/2807 , H01L21/28255 , H01L29/16 , H01L29/165 , H01L29/513 , H01L29/66575 , H01L29/94
摘要： Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices.
摘要翻译：锗电路型结构方便。在一个示例实施例中，实施多步生长和退火工艺以在包括硅（Si）或含硅材料的衬底上生长含锗（Ge）的材料，例如异质外延锗。在某些应用中，缺陷通常被限制在硅/锗界面附近，通常阻止含锗材料的上表面的缺陷穿线。这些方法适用于包括锗MOS电容器，pMOSFET和光电器件在内的各种器件。

5. 发明授权

US07919381B2 Germanium substrate-type materials and approach therefor 有权
标题翻译：锗衬底型材料及其方法
公开(公告)号：US07919381B2
公开(公告)日：2011-04-05
申请号：US12719796
申请日：2010-03-08
申请人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
发明人： Ammar Munir Nayfeh , Chi On Chui , Krishna C. Saraswat , Takao Yonehara
IPC分类号： H01L21/76
CPC分类号： H01L29/518 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02587 , H01L21/0262 , H01L21/2807 , H01L21/28255 , H01L29/16 , H01L29/165 , H01L29/513 , H01L29/66575 , H01L29/94
摘要： Germanium circuit-type structures are facilitated. In one example embodiment, a multi-step growth and anneal process is implemented to grow Germanium (Ge) containing material, such as heteroepitaxial-Germanium, on a substrate including Silicon (Si) or Silicon-containing material. In certain applications, defects are generally confined near a Silicon/Germanium interface, with defect threading to an upper surface of the Germanium containing material generally being inhibited. These approaches are applicable to a variety of devices including Germanium MOS capacitors, pMOSFETs and optoelectronic devices.
摘要翻译：锗电路型结构方便。在一个示例实施例中，实施多步生长和退火工艺以在包括硅（Si）或含硅材料的衬底上生长含锗（Ge）的材料，例如异质外延锗。在某些应用中，缺陷通常被限制在硅/锗界面附近，通常阻止含锗材料的上表面的缺陷穿线。这些方法适用于包括锗MOS电容器，pMOSFET和光电器件在内的各种器件。

6. 发明授权

US07271458B2 High-k dielectric for thermodynamically-stable substrate-type materials 有权
标题翻译：用于热力学稳定的衬底型材料的高k电介质
公开(公告)号：US07271458B2
公开(公告)日：2007-09-18
申请号：US10404876
申请日：2003-03-31
申请人： Chi On Chui , Krishna C. Saraswat , Baylor B. Triplett , Paul McIntyre
发明人： Chi On Chui , Krishna C. Saraswat , Baylor B. Triplett , Paul McIntyre
IPC分类号： H01L29/76
CPC分类号： H01L21/28255 , H01L29/513 , H01L29/517 , H01L29/785 , H01L29/78642 , H01L29/78684 , H01L29/78687
摘要： Excellent capacitor-voltage characteristics with near-ideal hysteresis are realized in a capacitive-like structure that uses an electrode substrate-type material with a high-k dielectric layer having a thickness of a few-to-several Angstroms capacitance-based SiO2 equivalent (“TOx, Eq”). According to one particular example embodiment, a semiconductor device structure has an electrode substrate-type material having a Germanium-rich surface material. The electrode substrate-type material is processed to provide this particular electrode surface material in a form that is thermodynamically stable with a high-k dielectric material. A dielectric layer is then formed over the electrode surface material with the high-k dielectric material at a surface that faces, lies against and is thermodynamically stable with the electrode surface material.
摘要翻译：具有接近理想滞后的良好的电容器电压特性在电容式结构中实现，其使用具有厚度为几至几埃电容的SiO 2等价物（“T Ox”，Eq ）。根据一个特定示例性实施例，半导体器件结构具有具有富锗表面材料的电极基底型材料。对电极基板型材料进行加工，以高k电介质材料的热力学稳定形式提供这种特定的电极表面材料。然后在电极表面材料上形成介电层，其中高k电介质材料在与电极表面材料相对的位置处于表面，并且与电极表面材料具有热力学稳定性。

7. 发明授权

US4673623A Layered and homogeneous films of aluminum and aluminum/silicon with titanium and tungsten for multilevel interconnects 失效
标题翻译：具有钛和钨的铝和铝/硅的分层和均匀的薄膜用于多层互连
公开(公告)号：US4673623A
公开(公告)日：1987-06-16
申请号：US731174
申请日：1985-05-06
申请人： Donald S. Gardner , Krishna C. Saraswat , Troy W. Barbee, Jr.
发明人： Donald S. Gardner , Krishna C. Saraswat , Troy W. Barbee, Jr.
IPC分类号： H01L23/532 , H01L23/48
CPC分类号： H01L23/53223 , H01L2924/0002 , Y10T428/12528 , Y10T428/12632 , Y10T428/12743
摘要： Layered structures (e.g., Al-Si/Ti/Al-Si . . . ) and homogeneous alloys of aluminum and aluminum/1 at. % silicon with titanium and tungsten and other refractory metals have been found to significantly reduce hillock densities in the films when small amounts of titanium or tungsten are homogeneously added. However, the resistivity of the films can become excessive. In addition, a new type of low density hillock can form. Layering of the films eliminates all hillocks and results in films of low resistivity. Such layered and homogeneous films made with Al-Si and Ti were found to be dry etchable. Electrical shorts in test structures with two levels of metal and LPCVD SiO.sub.2 as an interlayer dielectric have been characterized and layered films using Al-Si and Ti gave excellent results.
摘要翻译：层状结构（例如Al-Si / Ti / Al-Si ...）和铝和铝/ 1的均匀合金。已经发现，当少量的钛或钨被均匀地加入时，已经发现具有钛和钨和其它难熔金属的％硅显着降低膜中的小丘密度。然而，膜的电阻率可能变得过大。另外，可以形成一种新型的低密度小丘。膜的分层消除了所有的小丘并导致低电阻率的薄膜。发现用Al-Si和Ti制成的这种层状和均匀的膜是可干蚀刻的。已经表征了具有两层金属和LPCVD SiO2作为层间电介质的测试结构中的电短路，并且使用Al-Si和Ti的分层膜具有优异的结果。

8. 发明授权

US5469742A Acoustic temperature and film thickness monitor and method 失效
标题翻译：声温和膜厚监测及方法
公开(公告)号：US5469742A
公开(公告)日：1995-11-28
申请号：US28331
申请日：1993-03-09
申请人： Yong J. Lee , Butrus T. Khuri-Yakub , Krishna C. Saraswat
发明人： Yong J. Lee , Butrus T. Khuri-Yakub , Krishna C. Saraswat
IPC分类号： G01B17/02 , G01K11/22 , G01N29/04 , G01N29/18
CPC分类号： G01B17/025 , G01K11/22 , G01N29/041 , G01N2291/011 , G01N2291/0237 , G01N2291/02854 , G01N2291/02881 , G01N2291/0421 , G01N2291/0422 , G01N2291/105 , G01N2291/2632
摘要： An acoustic temperature and/or film thickness monitoring system for semiconductor wafers in which the velocity of acoustic waves in the wafer is employed to measure temperature and/or thickness.
摘要翻译：用于半导体晶片的声温度和/或膜厚监测系统，其中采用晶片中的声波速度来测量温度和/或厚度。

9. 发明授权

US5250818A Low temperature germanium-silicon on insulator thin-film transistor 失效
标题翻译：低温锗硅绝缘体薄膜晶体管
公开(公告)号：US5250818A
公开(公告)日：1993-10-05
申请号：US663092
申请日：1991-03-01
申请人： Krishna C. Saraswat , Tsu-Jae King
发明人： Krishna C. Saraswat , Tsu-Jae King
IPC分类号： H01L21/205 , H01L21/336 , H01L29/786 , H01L29/04 , H01L27/108 , H01L29/76 , H01L31/117
CPC分类号： H01L29/66742 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L29/78684
摘要： MOS transistors are formed in thin films of Ge/Si alloys (Ge.sub.x Si.sub.1-x). According to the process of the present invention, polycrystalline films of Ge/Si are deposited using commercially-available LPCVD equipment, which in the preferred process uses silane and germane as the sources of Ge and Si. The deposited Ge.sub.x Si.sub.1-x films are polycrystalline at temperatures for processing down to as below 400.degree. C., and the films can be doped heavily by ion implantation and annealing at temperatures as low as 600.degree. C. to give high mobility and dopant activation yielding very low resistivity. By carrying out the annealing step in the formation of the thin film transistors in the temperature range of 400.degree. to 500.degree. C., the films provide very large grain size, minimizing the impact of grain boundaries in the polycrystalline films where the thin film transistors are to be formed. As a result, thin film MOS transistors are fabricated at temperatures below 500.degree. C., and as low as 400.degree. C., by using Ge.sub.x Si.sub.1-x deposition and doping technology. The resulting transistors have significantly improved electrical characteristics compared to thin film transistors fabricated in silicon films utilizing standard processing techniques.
摘要翻译：在Ge / Si合金（GexSi1-x）的薄膜中形成MOS晶体管。根据本发明的方法，使用市售的LPCVD设备沉积Ge / Si的多晶膜，在优选的方法中使用硅烷和锗烷作为Ge和Si的源。沉积的GexSi1-x膜在待处理温度低至400℃的温度下是多晶的，并且该膜可以通过在低至600℃的温度下的离子注入和退火而大量掺杂，以产生高迁移率和掺杂剂活化产生电阻很低通过在400〜500℃的温度范围内进行薄膜晶体管的形成中的退火步骤，膜提供非常大的晶粒尺寸，最小化多晶薄膜中晶界的影响，其中薄膜晶体管将要形成。结果，通过使用GexSi1-x沉积和掺杂技术，在低于500℃，低至400℃的温度下制造薄膜MOS晶体管。与使用标准处理技术的硅膜制造的薄膜晶体管相比，所得到的晶体管具有显着改善的电特性。

10. 发明授权

US4913929A Thermal/microwave remote plasma multiprocessing reactor and method of use 失效
标题翻译：热/微波远程等离子体多重反应堆及其使用方法
公开(公告)号：US4913929A
公开(公告)日：1990-04-03
申请号：US040909
申请日：1987-04-21
申请人： Mehrdad M. Moslehi , Krishna C. Saraswat
发明人： Mehrdad M. Moslehi , Krishna C. Saraswat
IPC分类号： H01L21/31 , C23C16/44 , C23C16/48 , C23C16/511 , H01J37/32 , H01L21/205 , H01L21/285
CPC分类号： H01J37/3244 , C23C16/44 , C23C16/481 , C23C16/511 , H01J37/32357
摘要： A novel cold wall single wafer rapid thermal/microwave remote plasma multiprocessing reactor comprising a vacuum chamber having means for mounting a wafer in the chamber, means for providing optical flux mounted adjacent one wall facing the back side of the wafer for optical heating of the wafer, and ports for plasma injection such that remote plasma can be generated and pumped into the chamber. Ports are provided for gas injection both through the plasma generating chamber and for non-plasma injection. The plasma and non-plasma ports are connected through separate manifolds to a plurality of gas sources. The comprehensive reactor design is such that several wafer processing steps can be done sequentially in situ, while providing for optimization of each processing step.

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