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1. 发明授权

US08593526B1 Apparatus for measuring noise in an analog signal 有权
标题翻译：用于测量模拟信号中噪声的装置
公开(公告)号：US08593526B1
公开(公告)日：2013-11-26
申请号：US13586854
申请日：2012-08-15
申请人： Alan Hendrickson , David Trager , Zhongchun Liu
发明人： Alan Hendrickson , David Trager , Zhongchun Liu
IPC分类号： H04N17/02 , H04N5/08
CPC分类号： H04N5/213 , H04N5/21 , H04N17/045
摘要： Techniques are disclosed relating to video signal-to-noise ratio (VSNR) measurement. In one embodiment, an analog television signal receiver includes a measurement circuit configured to measure noise in a video signal over one or more intervals that correspond to a horizontal control signal of the video signal and a control unit configured to determine a VSNR based on the measurement. In another embodiment, a first noise calculation circuit is configured to determine first noise information from a video signal and a second noise calculation circuit is configured to determine second noise information from a video signal in a manner different from the first noise calculation circuit. A control unit may be configured to generate a VSNR based on one or both of the first noise information and the second noise information.
摘要翻译：公开了与视频信噪比（VSNR）测量有关的技术。在一个实施例中，模拟电视信号接收机包括测量电路，该测量电路经配置以在对应于视频信号的水平控制信号的一个或多个间隔上测量视频信号中的噪声;以及控制单元，被配置为基于测量来确定VSNR 。在另一个实施例中，第一噪声计算电路被配置为从视频信号确定第一噪声信息，并且第二噪声计算电路被配置为以与第一噪声计算电路不同的方式从视频信号确定第二噪声信息。控制单元可以被配置为基于第一噪声信息和第二噪声信息中的一个或两者来生成VSNR。

2. 发明授权

US08599312B2 Digital signal processor (DSP) architecture for a hybrid television tuner 有权
公开(公告)号：US08599312B2
公开(公告)日：2013-12-03
申请号：US12603877
申请日：2009-10-22
申请人： Alan Hendrickson , David Trager , Mitch Reid , Li Gao , John Khoury
发明人： Alan Hendrickson , David Trager , Mitch Reid , Li Gao , John Khoury
IPC分类号： H04N3/27
CPC分类号： H04N5/46 , H03J1/0008 , H04N5/455 , H04N5/50 , H04N21/4263
摘要： According to one aspect, a mixed-signal tuner for analog and digital TV reception incorporates a demodulator for analog TV, employing various features for resolving limitations of the analog circuitry and for achieving compatibility with various global TV standards. Such features, which may be present in one or more embodiments, include the use of a variable sample rate in all digital clocks for frequency planning, and use of a microcontroller (MCU) to control various circuitry of the tuner.

3. 发明申请

US20100328536A1 Digital Signal Processor (DSP) Architecture For A Hybrid Television Tuner 有权
标题翻译：混合电视调谐器的数字信号处理器（DSP）架构
公开(公告)号：US20100328536A1
公开(公告)日：2010-12-30
申请号：US12493955
申请日：2009-06-29
申请人： Alan Hendrickson , David Trager , Mitch Reid , Li Gao , John Khoury
发明人： Alan Hendrickson , David Trager , Mitch Reid , Li Gao , John Khoury
IPC分类号： H04N5/00 , H04N5/50 , H04N5/455
CPC分类号： H04N5/46 , H03J1/0008 , H04N5/455 , H04N5/50 , H04N21/4263
摘要： According to one aspect, a mixed-signal tuner for analog and digital TV reception incorporates a demodulator for analog TV, employing various features for resolving limitations of the analog circuitry and for achieving compatibility with various global TV standards. Such features, which may be present in one or more embodiments, include the use of a variable sample rate in all digital clocks for frequency planning, and use of a microcontroller (MCU) to control various circuitry of the tuner.
摘要翻译：根据一个方面，用于模拟和数字电视接收的混合信号调谐器包括用于模拟电视的解调器，其采用各种特征来解决模拟电路的限制并实现与各种全球电视标准的兼容性。可以存在于一个或多个实施例中的这些特征包括在用于频率规划的所有数字时钟中使用可变采样率，以及使用微控制器（MCU）来控制调谐器的各种电路。

4. 发明授权

US08576343B2 Digital signal processor (DSP) architecture for a hybrid television tuner 有权
标题翻译：用于混合电视调谐器的数字信号处理器（DSP）架构
公开(公告)号：US08576343B2
公开(公告)日：2013-11-05
申请号：US12493955
申请日：2009-06-29
申请人： Alan Hendrickson , David Trager , Mitch Reid , Li Gao , John Khoury
发明人： Alan Hendrickson , David Trager , Mitch Reid , Li Gao , John Khoury
IPC分类号： H04N5/44
CPC分类号： H04N5/46 , H03J1/0008 , H04N5/455 , H04N5/50 , H04N21/4263
摘要： According to one aspect, a mixed-signal tuner for analog and digital TV reception incorporates a demodulator for analog TV, employing various features for resolving limitations of the analog circuitry and for achieving compatibility with various global TV standards. Such features, which may be present in one or more embodiments, include the use of a variable sample rate in all digital clocks for frequency planning, and use of a microcontroller (MCU) to control various circuitry of the tuner.
摘要翻译：根据一个方面，用于模拟和数字电视接收的混合信号调谐器包括用于模拟电视的解调器，其采用各种特征来解决模拟电路的限制并实现与各种全球电视标准的兼容性。可以存在于一个或多个实施例中的这些特征包括在用于频率规划的所有数字时钟中使用可变采样率，以及使用微控制器（MCU）来控制调谐器的各种电路。

5. 发明申请

US20100328544A1 Digital Signal Processor (DSP) Architecture For A Hybrid Television Tuner 有权
公开(公告)号：US20100328544A1
公开(公告)日：2010-12-30
申请号：US12603877
申请日：2009-10-22
申请人： Alan Hendrickson , David Trager , Mitch Reid , Li Gao , John Khoury
发明人： Alan Hendrickson , David Trager , Mitch Reid , Li Gao , John Khoury
IPC分类号： H04N5/455 , H04L27/08
CPC分类号： H04N5/46 , H03J1/0008 , H04N5/455 , H04N5/50 , H04N21/4263
摘要： According to one aspect, a mixed-signal tuner for analog and digital TV reception incorporates a demodulator for analog TV, employing various features for resolving limitations of the analog circuitry and for achieving compatibility with various global TV standards. Such features, which may be present in one or more embodiments, include the use of a variable sample rate in all digital clocks for frequency planning, and use of a microcontroller (MCU) to control various circuitry of the tuner.

6. 发明授权

US5974584A Parity checking in a real-time digital communications system 失效
标题翻译：在实时数字通信系统中进行奇偶校验
公开(公告)号：US5974584A
公开(公告)日：1999-10-26
申请号：US974966
申请日：1997-11-20
申请人： Alan Hendrickson , Paul Schnizlein
发明人： Alan Hendrickson , Paul Schnizlein
IPC分类号： G06F11/00 , H03L7/093 , H03L7/099 , H03L7/107 , H03L7/14 , H03M13/00 , H04B1/707 , H04L1/24 , H04L7/033 , H04L27/00 , H04L27/22 , H04L27/227
CPC分类号： H04L27/2275 , H03L7/0991 , H03L7/107 , H03L7/146 , H04B1/707 , H04L1/24 , H04L27/22 , H04L27/2273 , H04L27/2277 , H03L7/093 , H04L2027/0028 , H04L2027/0046 , H04L2027/0067 , H04L2027/0069 , H04L7/0334
摘要： In a digital communication system for voice signals, a system and method for improving the quality of a received signal. The invention comprises a system for arranging the data and parity bits in a data frame and a corresponding method for analyzing and using the received frames. In the present invention, the data are conveyed in short independent segments, such as one or a few ADPCM nibbles. The length of each segment is chosen to be short enough that the loss of one segment of data from the received signal does not significantly degrade the quality of the output analog signal. The transmitter generates a parity bit for each of these segments and composes transmit frames by alternating data segments with their corresponding parity bits. The receiver then receives each data segment along with its corresponding parity bit. This arrangement allows the receiver to identify specific received segments that contain errors, and minimizes the receiver's delay between receiving the segment and determining if contains an error. The invention also comprises a system and method for detecting such an erroneous segment and blanking it. If a received frame contains more than a threshold number of erroneous segments, then the remaining segments of the frame can be muted. Subsequent frames can then also be muted until one of the subsequent frames contains fewer than a second threshold number of errors.
摘要翻译：在用于语音信号的数字通信系统中，提供接收信号质量的系统和方法。本发明包括一种用于在数据帧中布置数据和奇偶校验位的系统以及用于分析和使用所接收帧的相应方法。在本发明中，数据在短的独立段中传送，例如一个或几个ADPCM半字节。每个段的长度被选择为足够短，使得来自接收信号的一段数据的丢失不会显着降低输出模拟信号的质量。发射机为这些段中的每一个生成一个奇偶校验位，并通过交替的数据段与它们对应的奇偶校验位组成发送帧。然后接收器接收每个数据段及其对应的奇偶校验位。这种布置允许接收机识别包含错误的特定接收段，并且最小化接收机在接收段之间的延迟并确定是否包含错误。本发明还包括用于检测这样的错误段并将其消隐的系统和方法。如果接收到的帧包含多于阈值数量的错误段，则帧的剩余段可以被静音。随后的帧也可以被静音，直到后续帧之一包含少于第二阈值数量的错误。

7. 发明授权

US5266950A Programmable keypad monitor 失效
标题翻译：可编程键盘监视器
公开(公告)号：US5266950A
公开(公告)日：1993-11-30
申请号：US942359
申请日：1992-09-09
申请人： Dale Gulick , Alan Hendrickson
发明人： Dale Gulick , Alan Hendrickson
IPC分类号： G06F3/023 , H04M1/26 , H03M11/00
CPC分类号： H04M1/26 , G06F3/0238
摘要： A keypad monitor implemented in an integrated circuit monitors the closure of a plurality of keypad switches coupled to input terminals of the integrated circuit. The keypad monitor is operative in a first mode for monitoring a first number of the input terminals and a second mode for monitoring a lesser number of input terminals. When in the second mode, the unmonitored input terminals are converted for a use not related to keypad monitoring.
摘要翻译：在集成电路中实现的键盘监视器监视耦合到集成电路的输入端的多个键盘开关的闭合。键盘监视器在第一模式下操作，用于监视第一数量的输入端子和用于监视较少数量的输入端子的第二模式。当处于第二模式时，不受监控的输入端子被转换为与键盘监视无关的使用。

8. 发明申请

US20060179047A1 Resistor identification configuration circuitry and associated method 有权
公开(公告)号：US20060179047A1
公开(公告)日：2006-08-10
申请号：US11334862
申请日：2006-01-19
申请人： David Bresemann , Alan Hendrickson , Robert Wagner
发明人： David Bresemann , Alan Hendrickson , Robert Wagner
IPC分类号： G06F17/30
CPC分类号： H01L23/544 , G05B2219/23336 , G06F9/4411 , H01L2223/54433 , H01L2223/5444 , H01L2924/0002 , H01L2924/00
摘要： Programmable on-chip identification circuitry and associated method are disclosed that provide integrated circuits with the ability to select and report from multiple different vendor and system identification configurations. The integrated circuit device includes programmable circuitry that utilizes vendor identification, system identification, configuration or other device information provided or selected at least in part based upon selection information from a source external to the integrated circuit. The selection information may be provided through one or more externally generated digital and/or analog control signals that are then processed within the integrated circuit device to select, access and utilize desired identification information stored in an on-chip database. For example, one or more analog control signals can be generated using resistor circuits for which specific selectable resistor configurations map to particular information stored in a look-up table or other database structure within the integrated circuit. The analog control signals are converted to digital values within the integrated circuit, and these digital values are used to select device information from the on-chip database. Furthermore, the selected device information can be stored in on-chip device information registers. And the digital values themselves can be stored and used as identification, configuration or other device information.

9. 发明授权

US6125139A Narrowband digital cordless telephone 失效
标题翻译：窄带数字无绳电话
公开(公告)号：US6125139A
公开(公告)日：2000-09-26
申请号：US760883
申请日：1996-12-06
申请人： Alan Hendrickson , Paul Schnizlein , Jacqueline Mullins , Peter E. Sheldon
发明人： Alan Hendrickson , Paul Schnizlein , Jacqueline Mullins , Peter E. Sheldon
IPC分类号： H04B7/26 , H04M11/06
CPC分类号： H04M1/725 , G06F2213/0038 , H04M1/60
摘要： A digital cordless telecommunications unit that serves for communications when paired with a similar unit and connected with a network is disclosed. The unit receives analog receive voice signals and transmits analog transmit voice signals. In addition, the unit transmits digital baseband transmit signals and receives digital formatted baseband receive signals. The unit includes a baseband chip, as well as an audio functions circuit and a system control functions circuit. The audio functions circuit comprises an audio front end for receiving the analog receive voice signals and transmitting the analog transmit voice signals, and an adaptive differential pulse code modulator codec, connected to the audio front end, for converting the analog receive voice signals to the digital transmit signals and converting the digital formatted baseband receive signals to the analog transmit voice signals. The system control functions circuit comprises a microcontroller, connected to the codec, for controlling the baseband chip, a memory accessible by the microcontroller for storing control instructions, an interrupt controller connected to the microcontroller, a parallel port connected to the interrupt controller, a wake-up timer connected to the interrupt controller, a clock generator connected to the microcontroller, and a synchronous serial port connected to the interrupt controller.
摘要翻译：公开了一种数字无绳电信单元，用于在与类似单元配对并与网络连接时用于通信。该单元接收模拟接收语音信号并传输模拟传输语音信号。此外，该单元发射数字基带发射信号并接收数字格式的基带接收信号。该单元包括基带芯片，以及音频功能电路和系统控制功能电路。音频功能电路包括用于接收模拟接收语音信号并发送模拟发送语音信号的音频前端，以及连接到音频前端的自适应差分脉冲编码调制器编解码器，用于将模拟接收语音信号转换成数字发送信号并将数字格式的基带接收信号转换成模拟发送语音信号。系统控制功能电路包括连接到编解码器的微控制器，用于控制基带芯片，由微控制器访问的用于存储控制指令的存储器，连接到微控制器的中断控制器，连接到中断控制器的并行端口，唤醒 - 连接到中断控制器的定时器，连接到微控制器的时钟发生器和连接到中断控制器的同步串行端口。

10. 发明授权

US06307480B1 Integrated circuit reset incorporating battery monitor and watchdog timer 失效
标题翻译：集成电路复位，并入电池监视器和看门狗定时器
公开(公告)号：US06307480B1
公开(公告)日：2001-10-23
申请号：US08914017
申请日：1997-08-01
申请人： Peter Sheldon , Paul Schnizlein , Alan Hendrickson
发明人： Peter Sheldon , Paul Schnizlein , Alan Hendrickson
IPC分类号： G08B2100
CPC分类号： G06F1/28 , G06F1/24 , G06F1/30 , G06F11/0757 , H03K17/22
摘要： A reset circuit that incorporates a battery monitor and watchdog timer in an integrated circuit is disclosed. A battery monitor having an output indicative of a charge state of a battery and a watchdog timer having an output indicative of an operational state of software being executed by the integrated circuit are connected to reset logic having a reset signal output, wherein the reset logic generates a reset signal on the reset signal output if either the battery monitor output or the watchdog timer output is active.
摘要翻译：公开了一种在集成电路中并入电池监视器和看门狗定时器的复位电路。具有指示电池的充电状态的输出的电池监视器和具有指示由集成电路执行的软件的操作状态的输出的看门狗定时器被连接到具有复位信号输出的复位逻辑，其中复位逻辑产生如果电池监视器输出或看门狗定时器输出有效，则复位信号输出上的复位信号。

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