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1. 发明申请

US20110092050A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20110092050A1
公开(公告)日：2011-04-21
申请号：US12901005
申请日：2010-10-08
申请人： Akihisa SHIMOMURA , Naoki OKUNO , Masaki KOYAMA , Yasuhiro JINBO
发明人： Akihisa SHIMOMURA , Naoki OKUNO , Masaki KOYAMA , Yasuhiro JINBO
IPC分类号： H01L21/762
CPC分类号： H01L21/76254 , H01L27/1229 , H01L27/1251 , H01L27/1262 , H01L27/1266 , H01L29/66772
摘要： A first embrittlement layer is formed by doping a first single-crystal semiconductor substrate with a first ion; a second embrittlement layer is formed by doping a second single-crystal semiconductor substrate with a second ion; the first and second single-crystal semiconductor substrates are bonded to each other; the first single-crystal semiconductor film is formed over the second single-crystal semiconductor substrate by a first heat treatment; an insulating substrate is bonded over the first single-crystal semiconductor film; and the first and second single-crystal semiconductor films are formed over the insulating substrate by a second heat treatment. A dose of the first ion is higher than that of the second ion and a temperature of the first heat treatment is lower than that of the second heat treatment.
摘要翻译：通过用第一离子掺杂第一单晶半导体衬底形成第一脆化层; 通过用第二离子掺杂第二单晶半导体衬底形成第二脆化层; 第一和第二单晶半导体衬底彼此接合; 通过第一热处理在第二单晶半导体衬底上形成第一单晶半导体膜; 绝缘基板接合在第一单晶半导体膜上; 并且通过第二热处理在绝缘基板上形成第一和第二单晶半导体膜。第一离子的剂量高于第二离子，第一热处理的温度低于第二热处理的温度。

2. 发明申请

US20100120224A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20100120224A1
公开(公告)日：2010-05-13
申请号：US12615613
申请日：2009-11-10
申请人： Akihisa SHIMOMURA , Masaki KOYAMA , Yasuhiro JINBO , Naoki OKUNO
发明人： Akihisa SHIMOMURA , Masaki KOYAMA , Yasuhiro JINBO , Naoki OKUNO
IPC分类号： H01L21/46
CPC分类号： H01L21/84 , H01L21/76254
摘要： An object is to provide a method for manufacturing an SOI substrate including a single crystal silicon film whose plane orientation is (100) and a single crystal silicon film whose plane orientation is (110) with high yield. A first single crystal silicon substrate whose plane orientation is (100) is doped with first ions to form a first embrittlement layer. A second single crystal silicon substrate whose plane orientation is (110) is doped with second ions to selectively form a second embrittlement layer. Only part of the first single crystal silicon substrate is separated along the first embrittlement layer by first heat treatment, thereby forming a first single crystal silicon film. A region of the second single crystal silicon substrate, in which the second embrittlement layer is not formed, is removed. Part of the second single crystal silicon substrate is separated along the second embrittlement layer by second heat treatment, thereby forming a second single crystal silicon film.
摘要翻译：本发明的目的是提供一种制造包括其平面取向为（100）的单晶硅膜和具有高产率的平面取向为（110）的单晶硅膜的SOI衬底的方法。其平面取向为（100）的第一单晶硅衬底被掺杂有第一离子以形成第一脆化层。其平面取向为（110）的第二单晶硅衬底被掺杂有第二离子以选择性地形成第二脆化层。通过第一热处理，仅第一单晶硅衬底的一部分沿着第一脆化层分离，从而形成第一单晶硅膜。除去未形成第二脆性层的第二单晶硅衬底的区域。通过第二热处理沿第二脆化层分离第二单晶硅衬底的一部分，从而形成第二单晶硅膜。

3. 发明申请

US20120007078A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20120007078A1
公开(公告)日：2012-01-12
申请号：US13239853
申请日：2011-09-22
申请人： Akihisa SHIMOMURA , Hidekazu MIYAIRI , Fumito ISAKA , Yasuhiro JINBO , Junya MARUYAMA
发明人： Akihisa SHIMOMURA , Hidekazu MIYAIRI , Fumito ISAKA , Yasuhiro JINBO , Junya MARUYAMA
IPC分类号： H01L27/12
CPC分类号： H01L21/02683 , H01L21/02422 , H01L21/02532 , H01L21/02592 , H01L21/02686 , H01L21/2026 , H01L27/1214 , H01L27/1266 , H01L27/1285 , H01L29/66757 , H01L29/78603 , H01L29/78675
摘要： It is an object to provide a method of manufacturing a crystalline silicon device and a semiconductor device in which formation of cracks in a substrate, a base protective film, and a crystalline silicon film can be suppressed. First, a layer including a semiconductor film is formed over a substrate, and is heated. A thermal expansion coefficient of the substrate is 6×10−7/° C. to 38×10−7/° C., preferably 6×10−7/° C. to 31.8×10−7/° C. Next, the layer including the semiconductor film is irradiated with a laser beam to crystallize the semiconductor film so as to form a crystalline semiconductor film. Total stress of the layer including the semiconductor film is −500 N/m to +50 N/m, preferably −150 N/m to 0 N/m after the heating step.
摘要翻译：本发明的目的是提供一种制造晶体硅器件和半导体器件的方法，其中可以抑制衬底，基底保护膜和晶体硅膜中的裂纹的形成。首先，在基板上形成包含半导体膜的层，并加热。基板的热膨胀系数为6×10-7 /℃至38×10-7 /℃，优选为6×10-7 /℃至31.8×10-7 /℃。接下来，用激光束照射包含半导体膜的层，使半导体膜结晶化，形成结晶半导体膜。包括半导体膜的层的总应力在加热步骤之后为-500N / m至+ 50N / m，优选为-150N / m至0N / m。

4. 发明申请

US20110312165A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20110312165A1
公开(公告)日：2011-12-22
申请号：US13222076
申请日：2011-08-31
申请人： Akihisa SHIMOMURA , Hidekazu MIYAIRI , Yasuhiro JINBO
发明人： Akihisa SHIMOMURA , Hidekazu MIYAIRI , Yasuhiro JINBO
IPC分类号： H01L21/20
CPC分类号： H01L21/02678 , B23K26/0732 , B23K26/0738 , H01L21/02422 , H01L21/02532 , H01L21/02686 , H01L21/268 , H01L27/1218 , H01L27/1285
摘要： A layer including a semiconductor film is formed over a glass substrate and is heated. A thermal expansion coefficient of the glass substrate is greater than 6×10−7/° C. and less than or equal to 38×10−7/° C. The heated layer including the semiconductor film is irradiated with a pulsed ultraviolet laser beam having a width of less than or equal to 100 μm, a ratio of width to length of 1:500 or more, and a full width at half maximum of the laser beam profile of less than or equal to 50 μm, so that a crystalline semiconductor film is formed. As the layer including the semiconductor film formed over the glass substrate, a layer whose total stress after heating is −500 N/m to +50 N/m, inclusive is formed.
摘要翻译：在玻璃基板上形成包含半导体膜的层，并加热。玻璃基板的热膨胀系数大于6×10-7 /℃，小于或等于38×10-7 /℃。包含半导体膜的加热层用脉冲紫外激光束具有小于或等于100μm的宽度，宽度与长度的比为1:500或更大，激光束轮廓的全宽度小于或等于50μm，使得结晶形成半导体膜。作为包含在玻璃基板上形成的半导体膜的层，形成加热后的总应力为-500N / m以上且+ 50N / m以下的层。

5. 发明申请

US20110014780A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US20110014780A1
公开(公告)日：2011-01-20
申请号：US12887597
申请日：2010-09-22
申请人： Akihisa SHIMOMURA , Hidekazu MIYAIRI , Yasuhiro JINBO
发明人： Akihisa SHIMOMURA , Hidekazu MIYAIRI , Yasuhiro JINBO
IPC分类号： H01L21/268
CPC分类号： H01L21/02678 , B23K26/0732 , B23K26/0738 , H01L21/02422 , H01L21/02532 , H01L21/02686 , H01L21/268 , H01L27/1218 , H01L27/1285
摘要： A layer including a semiconductor film is formed over a glass substrate and is heated. A thermal expansion coefficient of the glass substrate is greater than 6×10−7/° C. and less than or equal to 38×10−7/° C. The heated layer including the semiconductor film is irradiated with a pulsed ultraviolet laser beam having a width of less than or equal to 100 μm, a ratio of width to length of 1:500 or more, and a full width at half maximum of the laser beam profile of less than or equal to 50 μM, so that a crystalline semiconductor film is formed. As the layer including the semiconductor film formed over the glass substrate, a layer whose total stress after heating is −500 N/m to +50 N/m, inclusive is formed.
摘要翻译：在玻璃基板上形成包含半导体膜的层，并加热。玻璃基板的热膨胀系数大于6×10-7 /℃，小于或等于38×10-7 /℃。包含半导体膜的加热层用脉冲紫外激光束具有小于或等于100μm的宽度，宽度与长度之比为1:500或更大，以及激光束轮廓的半宽度小于或等于50μM，使得结晶形成半导体膜。作为包含在玻璃基板上形成的半导体膜的层，形成加热后的总应力为-500N / m以上且+ 50N / m以下的层。

6. 发明申请

US20120298999A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120298999A1
公开(公告)日：2012-11-29
申请号：US13477353
申请日：2012-05-22
申请人： Yasuhiro JINBO , Koji DAIRIKI , Hidekazu MIYAIRI , Tomohiro KIMURA , Yoshitaka YAMAMOTO
发明人： Yasuhiro JINBO , Koji DAIRIKI , Hidekazu MIYAIRI , Tomohiro KIMURA , Yoshitaka YAMAMOTO
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/04 , H01L29/78618 , H01L29/78648 , H01L29/78678
摘要： An object is to reduce off-state leakage current between a source electrode and a drain electrode. One embodiment of the present invention is a semiconductor device including a gate electrode, gate insulating films and formed to cover the gate electrode, an active layer formed over the gate insulating films and located above the gate electrode, silicon layers and formed over side surfaces of the active layer and the gate insulating films, and a source electrode and a drain electrode formed over the silicon layers. The active layer is not in contact with each of the source electrode and the drain electrode.
摘要翻译：目的是减少源极和漏电极之间的截止状态漏电流。本发明的一个实施例是一种半导体器件，包括栅电极和栅极绝缘膜，形成为覆盖栅电极，形成在栅极绝缘膜上并位于栅电极上方的有源层，硅层并形成在有源层和栅极绝缘膜，以及形成在硅层上的源电极和漏电极。有源层不与源电极和漏电极中的每一个接触。

7. 发明申请

US20120298997A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120298997A1
公开(公告)日：2012-11-29
申请号：US13473643
申请日：2012-05-17
申请人： Hidekazu MIYAIRI , Koji DAIRIKI , Yasuhiro JINBO , Tomohiro KIMURA , Yoshitaka YAMAMOTO
发明人： Hidekazu MIYAIRI , Koji DAIRIKI , Yasuhiro JINBO , Tomohiro KIMURA , Yoshitaka YAMAMOTO
IPC分类号： H01L29/786
CPC分类号： H01L29/04 , H01L29/41733 , H01L29/78618 , H01L29/78672 , H01L29/78678 , H01L29/78696
摘要： One embodiment of the present invention is a semiconductor device which includes a gate electrode; a gate insulating film formed to cover the gate electrode; a semiconductor layer formed over the gate insulating film and placed above the gate electrode; a second insulating film formed over the semiconductor layer; a first insulating film formed over a top surface and a side surface of the second insulating film, a side surface of the semiconductor layer, and the gate insulating film; silicon layers and which are formed over the first insulating film and electrically connected to the semiconductor layer; and a source electrode and a drain electrode which are formed over the silicon layers. The source electrode and the drain electrode are electrically separated from each other over the first insulating film. The semiconductor layer is not in contact with each of the source electrode and the drain electrode.
摘要翻译：本发明的一个实施例是包括栅电极的半导体器件; 形成为覆盖所述栅电极的栅极绝缘膜; 形成在所述栅极绝缘膜上并位于所述栅极电极上方的半导体层; 形成在所述半导体层上的第二绝缘膜; 形成在第二绝缘膜的顶表面和侧表面上的第一绝缘膜，半导体层的侧表面和栅极绝缘膜; 硅层，其形成在第一绝缘膜上并电连接到半导体层; 以及形成在硅层上的源电极和漏电极。源电极和漏电极在第一绝缘膜上彼此电分离。半导体层不与源电极和漏电极中的每一个接触。

8. 发明申请

US20110278582A1 METHOD FOR MANUFACTURING MICROCRYSTALLINE SEMICONDUCTOR FILM AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：制造微晶半导体膜的方法和制造半导体器件的方法
公开(公告)号：US20110278582A1
公开(公告)日：2011-11-17
申请号：US13102386
申请日：2011-05-06
申请人： Sachiaki TEZUKA , Yasuhiro JINBO , Toshinari SASAKI , Hidekazu MIYAIRI
发明人： Sachiaki TEZUKA , Yasuhiro JINBO , Toshinari SASAKI , Hidekazu MIYAIRI
IPC分类号： H01L29/786 , H01L21/336 , H01L21/20
CPC分类号： H01L29/78648 , C23C16/24 , H01L21/02422 , H01L21/0245 , H01L21/02505 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L29/04 , H01L29/66765 , H01L29/78678 , H01L29/78696
摘要： A method for manufacturing a semiconductor device having favorable electric characteristics with high productivity is provided. A first microcrystalline semiconductor film is formed over an oxide insulating film under a first condition that mixed phase grains with high crystallinity are formed at a low particle density. After that, a second microcrystalline semiconductor film is stacked over the first microcrystalline semiconductor film under a second condition that a space between the mixed phase grains are filled by the crystal growth of the mixed phase grains of the first microcrystalline semiconductor film.
摘要翻译：提供了一种制造具有高生产率的良好电特性的半导体器件的方法。在氧化物绝缘膜上形成第一微晶半导体膜，第一条件是以低的颗粒密度形成具有高结晶度的混相晶粒。之后，在第一微晶半导体膜上，通过第一微晶半导体膜的混晶相的晶体生长填充混合相晶粒之间的间隔，在第一微晶半导体膜上层叠第二微晶半导体膜。

9. 发明申请

US20100096631A1 THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：薄膜晶体管及其制造方法
公开(公告)号：US20100096631A1
公开(公告)日：2010-04-22
申请号：US12423111
申请日：2009-04-14
申请人： Hidekazu MIYAIRI , Koji DAIRIKI , Yuji EGI , Yasuhiro JINBO , Toshiyuki ISA
发明人： Hidekazu MIYAIRI , Koji DAIRIKI , Yuji EGI , Yasuhiro JINBO , Toshiyuki ISA
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/1288 , H01L27/1214 , H01L29/04 , H01L29/41733 , H01L29/66765 , H01L29/78621 , H01L29/78669 , H01L29/78678 , H01L29/78696
摘要： A thin film transistor includes, over a substrate having an insulating surface, a gate insulating layer covering a gate electrode; a semiconductor layer which includes a plurality of crystalline regions in an amorphous structure and which forms a channel formation region, in contact with the gate insulating layer; a semiconductor layer including an impurity element imparting one conductivity type, which forms source and drain regions; and a buffer layer including an amorphous semiconductor between the semiconductor layer and the semiconductor layer including an impurity element imparting one conductivity type. The crystalline regions have an inverted conical or inverted pyramidal crystal particle which grows approximately radially in a direction in which the semiconductor layer is deposited, from a position away from an interface between the gate insulating layer and the semiconductor layer.
摘要翻译：薄膜晶体管包括在具有绝缘表面的衬底上，覆盖栅电极的栅绝缘层; 半导体层，其包括与所述栅极绝缘层接触的非晶结构中的多个结晶区域，并形成沟道形成区域; 包含赋予一种导电类型的杂质元素的半导体层，其形成源区和漏区; 以及包括在半导体层和半导体层之间的非晶半导体的缓冲层，其包括赋予一种导电类型的杂质元素。晶体区域具有从远离栅极绝缘层和半导体层之间的界面的位置沿着沉积半导体层的方向大致径向生长的倒锥形或倒棱锥晶体颗粒。

10. 发明申请

US20090072237A1 METHOD FOR MANUFACTURING THIN FILM TRANSISTOR AND DISPLAY DEVICE INCLUDING THE THIN FILM TRANSISTOR 有权
标题翻译：制造薄膜晶体管的方法和包括薄膜晶体管的显示器件
公开(公告)号：US20090072237A1
公开(公告)日：2009-03-19
申请号：US12208867
申请日：2008-09-11
申请人： Shunpei YAMAZAKI , Yasuhiro JINBO , Makoto FURUNO
发明人： Shunpei YAMAZAKI , Yasuhiro JINBO , Makoto FURUNO
IPC分类号： H01L29/04 , H01L21/336
CPC分类号： H01L29/04 , H01L21/02422 , H01L21/02532 , H01L21/0262 , H01L21/02658 , H01L29/41733 , H01L29/4908 , H01L29/66765 , H01L29/78696
摘要： To provide a method for manufacturing a thin film transistor with excellent electric characteristics and high reliability and a display device including the thin film transistor. A gate insulating film is formed over a gate electrode, crystal nuclei is formed over the gate insulating film using fluorosilane and silane, and crystal growth is generated using the crystal nuclei as nuclei to form a microcrystalline semiconductor film, so that crystallinity at an interface between the gate insulating film and the microcrystalline semiconductor film is improved. Next, a thin film transistor is manufactured using the microcrystalline semiconductor film having crystallinity improved at the interface between the gate insulating film and the microcrystalline semiconductor film as a channel formation region.
摘要翻译：提供一种具有优异的电特性和高可靠性的薄膜晶体管的制造方法以及包括薄膜晶体管的显示装置。在栅电极上形成栅极绝缘膜，使用氟硅烷和硅烷在栅极绝缘膜上形成晶体核，并且使用晶核作为核产生晶体生长以形成微晶半导体膜，使得在晶界处的结晶度在提高了栅极绝缘膜和微晶半导体膜。接下来，使用在栅极绝缘膜和微晶半导体膜之间的界面处具有改善结晶度的微晶半导体膜作为沟道形成区域来制造薄膜晶体管。

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