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    • 4. 发明授权
    • Anti-reflection film and display device
    • 防反射膜和显示装置
    • US08467023B2
    • 2013-06-18
    • US13323892
    • 2011-12-13
    • Jiro NishidaYuji EgiTakeshi NishiShunpei Yamazaki
    • Jiro NishidaYuji EgiTakeshi NishiShunpei Yamazaki
    • G02F1/1335
    • G02B1/118G02B1/14G02F1/133502G02F2201/38
    • An anti-reflection film that can provide high visibility and has an anti-reflection function by which reflection of incident light from external can be further reduced, and a display device having such an anti-reflection film. A plurality of contiguous pyramidal projections is arranged in a geometric pattern, so that reflection of incident light is prevented. In addition, a protective layer formed of a material having a lower refractive index than the pyramidal projections is provided so as to fill a space between the plurality of pyramidal projections. The plurality of pyramidal projections has a hexagonal shape and can be densely arranged with no space therebetween. Further, since six sides of each pyramidal projection are provided at a different angle from the base, light can be effectively scattered in many directions.
    • 可以提供高可见度并具有抗反射功能的防反射膜,通过该反射功能可以进一步减少来自外部的入射光的反射,以及具有这种防反射膜的显示装置。 多个相邻的金字塔形突起以几何图案布置,从而防止入射光的反射。 此外,提供由折射率低于金字塔形突起的材料形成的保护层,以填充多个锥体状突起之间的空间。 多个金字塔状突起具有六边形形状,并且可以密集地布置,其间没有间隙。 此外,由于每个金字塔形突起的六个侧面以与基部不同的角度设置,所以可以在许多方向上有效地散射光。
    • 7. 发明申请
    • THIN FILM TRANSISTOR AND MANUFACTURING METHOD THEREOF
    • 薄膜晶体管及其制造方法
    • US20100096637A1
    • 2010-04-22
    • US12423829
    • 2009-04-15
    • Shunpei YamazakiYuji EgiShinya SasagawaMotomu Kurata
    • Shunpei YamazakiYuji EgiShinya SasagawaMotomu Kurata
    • H01L29/786H01L21/336
    • H01L27/1288H01L27/1214H01L29/04H01L29/41733H01L29/78696
    • Off current of a thin film transistor is reduced, and on current of the thin film transistor is increased, and variation in electric characteristics is reduced. As a structure of semiconductor layers which form a channel formation region of a thin film transistor, a first semiconductor layer including a plurality of crystalline regions is provided on a gate insulating layer side; a second semiconductor layer having an amorphous structure is provided on a source region and drain region side; an insulating layer with a thickness small enough to allow carrier travel is provided between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer is in contact with the gate insulating layer. The second semiconductor layer is provided on an opposite side to a face of the first semiconductor layer which is in contact with the gate insulating layer.
    • 薄膜晶体管的截止电流减小,薄膜晶体管的导通电流增大,电特性的变化也降低。 作为形成薄膜晶体管的沟道形成区域的半导体层的结构,在栅极绝缘层侧设置包括多个结晶区域的第一半导体层, 在源区和漏区侧设置具有非晶结构的第二半导体层; 在第一半导体层和第二半导体层之间设置具有足够小以允许载流子行进的厚度的绝缘层。 第一半导体层与栅极绝缘层接触。 第二半导体层设置在与栅极绝缘层接触的与第一半导体层的面相反的一侧。