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1. 发明申请

US20150077163A1 DYNAMIC FREQUENCY DIVIDER CIRCUIT 有权
标题翻译：动态频率分路电路
公开(公告)号：US20150077163A1
公开(公告)日：2015-03-19
申请号：US14394116
申请日：2012-04-20
申请人： Akbar Ghazinour , Saverio Trotta
发明人： Akbar Ghazinour , Saverio Trotta
IPC分类号： H03B19/14 , H03L7/00
CPC分类号： H03B19/14 , H03F1/0205 , H03F3/45085 , H03F3/60 , H03F3/602 , H03F2200/423 , H03F2200/513 , H03F2200/543 , H03F2203/45612 , H03F2203/45652 , H03F2203/45668 , H03F2203/45702 , H03K23/667 , H03L7/00
摘要： The invention relates to a Frequency Divider Circuit for dividing an input RF signal to a frequency divided RF signal. The circuit comprises a RF pair, a switching-quad pair coupled in series with a transimpedance amplifier and a double pair of emitter followers. The circuit comprises coupling elements for providing first DC paths to first amplifier paths of the RF pair and for providing second DC paths to second amplifier paths of the series arrangement of the switching-quad pair and the transimpedance amplifier. The first DC paths are independent of the second DC paths. RF connections are provided to couple the first and the second amplifier paths for transferring a signal from the first amplifier paths to the second amplifier paths.
摘要翻译：本发明涉及一种用于将输入RF信号划分为分频RF信号的分频器电路。该电路包括RF对，与跨阻放大器和双对发射极跟随器串联耦合的开关四极对。该电路包括用于向RF对的第一放大器路径提供第一DC路径的耦合元件，以及用于向开关四对和跨阻放大器的串联布置的第二放大器路径提供第二DC路径。第一DC路径独立于第二DC路径。提供RF连接以耦合第一和第二放大器路径，用于将信号从第一放大器路径传送到第二放大器路径。

2. 发明申请

US20150009747A1 PHASE SWITCHABLE BISTABLE MEMORY DEVICE, A FREQUENCY DIVIDER AND A RADIO FREQUENCY TRANSCEIVER 审中-公开
标题翻译：相位可切换的双向存储器件，频率分配器和无线电频率收发器
公开(公告)号：US20150009747A1
公开(公告)日：2015-01-08
申请号：US13933527
申请日：2013-07-02
申请人： Akbar Ghazinour , Saverio Trotta
发明人： Akbar Ghazinour , Saverio Trotta
IPC分类号： G11C11/41
CPC分类号： H03K3/26
摘要： A phase switchable bistable memory device comprising a bistable memory component and a phase switching component is described. The bistable memory component comprises a bistable memory stage arranged to receive an input signal and a state transition stage arranged to receive a state transition signal and to cause the bistable memory stage to capture a logical state of the received input signal upon a transition from a first logical state of the state transition signal to a second logical state of the state transition signal. The phase switching component is arranged to receive a clock input signal and a phase control signal, and to output the state transition signal comprising transitions between logical states corresponding to transitions between logical states of the clock input signal and comprising a phase relative to the clock input signal based at least partly on the received phase control signal.
摘要翻译：描述了包括双稳态存储器部件和相位切换部件的相位可切换双稳态存储器件。双稳态存储器组件包括双稳态存储器级，被布置为接收输入信号和状态转移级，布置成接收状态转换信号，并且使得双稳态存储器级在从第一存储器转换到第一存储器级时，捕获所接收的输入信号的逻辑状态状态转换信号的逻辑状态变为状态转移信号的第二逻辑状态。相位切换部件被布置为接收时钟输入信号和相位控制信号，并且输出状态转换信号，该状态转换信号包括对应于时钟输入信号的逻辑状态之间的转换的逻辑状态之间的转变，并且包括相对于时钟输入的相位信号至少部分地基于所接收的相位控制信号。

3. 发明授权

US09197158B2 Dynamic frequency divider circuit 有权
标题翻译：动态分频电路
公开(公告)号：US09197158B2
公开(公告)日：2015-11-24
申请号：US14394116
申请日：2012-04-20
申请人： Akbar Ghazinour , Saverio Trotta
发明人： Akbar Ghazinour , Saverio Trotta
IPC分类号： H03B19/14 , H03F3/45 , H03F3/60 , H03K23/66 , H03L7/00
CPC分类号： H03B19/14 , H03F1/0205 , H03F3/45085 , H03F3/60 , H03F3/602 , H03F2200/423 , H03F2200/513 , H03F2200/543 , H03F2203/45612 , H03F2203/45652 , H03F2203/45668 , H03F2203/45702 , H03K23/667 , H03L7/00
摘要： The invention relates to a Frequency Divider Circuit for dividing an input RF signal to a frequency divided RF signal. The circuit comprises a RF pair, a switching-quad pair coupled in series with a transimpedance amplifier and a double pair of emitter followers. The circuit comprises coupling elements for providing first DC paths to first amplifier paths of the RF pair and for providing second DC paths to second amplifier paths of the series arrangement of the switching-quad pair and the transimpedance amplifier. The first DC paths are independent of the second DC paths. RF connections are provided to couple the first and the second amplifier paths for transferring a signal from the first amplifier paths to the second amplifier paths.
摘要翻译：本发明涉及一种用于将输入RF信号划分为分频RF信号的分频器电路。该电路包括RF对，与跨阻放大器和双对发射极跟随器串联耦合的开关四极对。该电路包括用于向RF对的第一放大器路径提供第一DC路径的耦合元件，以及用于向开关四对和跨阻放大器的串联布置的第二放大器路径提供第二DC路径。第一DC路径独立于第二DC路径。提供RF连接以耦合第一和第二放大器路径，用于将信号从第一放大器路径传送到第二放大器路径。

4. 发明授权

US09411039B2 Phased-array receiver, radar system and vehicle 有权
标题翻译：相控阵接收机，雷达系统和车辆
公开(公告)号：US09411039B2
公开(公告)日：2016-08-09
申请号：US13977087
申请日：2011-01-21
申请人： Bernhard Dehlink , Saverio Trotta
发明人： Bernhard Dehlink , Saverio Trotta
IPC分类号： G01S7/03 , G01S3/04 , G01S13/93 , G01S13/34 , G01S7/288 , G01S7/35 , H01Q3/26 , H01Q1/32
CPC分类号： G01S7/03 , G01S3/043 , G01S7/032 , G01S13/931 , G01S2007/2886 , G01S2007/358 , H01Q1/3233 , H01Q3/26
摘要： A phased-array receiver comprises a plurality of analog beamforming receive channels, each comprising an antenna element arranged to receive a radio frequency signal and a channel output arranged to provide an analog channel output signal. At least one of the plurality of analog beamforming receive channels comprises an in-phase downconversion mixing circuit connected to the antenna element and a local oscillator source and arranged to provide a downconverted in-phase signal to a phase rotation circuit, and a quadrature downconversion mixing circuit connected to the antenna element and the local oscillator source and arranged to provide a downconverted quadrature signal to the phase rotation circuit. The phase rotation circuit is arranged to provide to the channel output a phase-shifted analog output signal generated from the downconverted in-phase signal and the downconverted quadrature signal.
摘要翻译：相控阵接收机包括多个模拟波束成形接收信道，每个接收信道包括布置成接收射频信号的天线元件和布置成提供模拟信道输出信号的信道输出。多个模拟波束成形接收通道中的至少一个包括连接到天线元件的同相下变频混合电路和本地振荡器源，并且被布置成向相位旋转电路提供下变频的同相信号，并且正交下变频混频连接到天线元件和本地振荡器源并且被布置成向相位旋转电路提供下变频的正交信号。相位旋转电路被布置成向通道输出提供从下变频同相信号和下变频正交信号产生的相移模拟输出信号。

5. 发明申请

US20140232589A1 RECEIVER CIRCUIT, PHASED-ARRAY RECEIVER AND RADAR SYSTEM 有权
标题翻译：接收器电路，相位阵列接收器和雷达系统
公开(公告)号：US20140232589A1
公开(公告)日：2014-08-21
申请号：US14348241
申请日：2011-10-27
申请人： Saverio Trotta
发明人： Saverio Trotta
IPC分类号： G01S7/282 , H04B1/16 , H01Q3/34
CPC分类号： G01S7/282 , G01S7/285 , H01Q3/34 , H03D7/1433 , H03D7/1458 , H03D7/165 , H03F1/0205 , H03F1/56 , H03F3/189 , H03F3/195 , H03F3/45085 , H03F3/60 , H03F2200/06 , H03F2200/09 , H03F2200/216 , H03F2200/222 , H03F2200/255 , H03F2200/294 , H03F2200/336 , H03F2200/411 , H03F2200/423 , H03F2200/555 , H03F2203/45544 , H03F2203/45554 , H03F2203/45594 , H03F2203/45596 , H03F2203/45622 , H03F2203/45631 , H04B1/16
摘要： A receiver circuit, comprises an input balun circuit comprising a balanced balun output and being capable of receiving RF signals, an input amplification circuit comprising a balanced amplifier input and a balanced amplifier output, a single balanced in-phase mixing circuit comprising a first unbalanced RF mixer input and a balanced in-phase mixing frequency input, and a single balanced quadrature mixing circuit comprising a second unbalanced RF mixer input and a balanced quadrature mixing frequency input. The balanced amplifier input is connected to the balanced balun output, a first terminal of the balanced amplifier output is connected to provide an amplified RF signal to the first unbalanced RF mixer input and a second terminal of the balanced amplifier output is connected to provide a phase-shifted amplified RF signal to the second unbalanced RF mixer input.
摘要翻译：一种接收器电路，包括：输入平衡 - 不平衡变换电路，包括平衡不平衡变换器输出并能够接收RF信号;输入放大电路，包括平衡放大器输入和平衡放大器输出;单个平衡同相混合电路，包括第一不平衡RF 混频器输入和平衡同相混频输入，以及包括第二不平衡RF混频器输入和平衡正交混频输入的单个平衡正交混合电路。平衡放大器输入端连接到平衡不平衡变压器输出，平衡放大器输出端的第一端连接到放大的RF信号到第一个不平衡RF混频器输入，平衡放大器输出的第二端连接以提供相位转换放大的RF信号到第二不平衡RF混频器输入。

6. 发明申请

US20140077892A1 DC Power Supply Circuit, Oscillator Circuit and Method for Generating a DC Power Supply Signal 有权
标题翻译：直流电源电路，振荡器电路和直流电源信号的产生方法
公开(公告)号：US20140077892A1
公开(公告)日：2014-03-20
申请号：US13619963
申请日：2012-09-14
申请人： Saverio Trotta , Winfried Bakalski , Herbert Knapp
发明人： Saverio Trotta , Winfried Bakalski , Herbert Knapp
IPC分类号： G05F1/46
CPC分类号： G05F1/46 , H03L7/099 , H03L7/18
摘要： A DC power supply circuit comprises an output configured to provide a power supply signal to an RF element for generating an RF output signal. Furthermore, the DC power supply circuit comprises an input configured to receive the RF output signal. The DC power supply circuit is configured to generate the DC power supply signal based on the received RF output signal.
摘要翻译：直流电源电路包括被配置为向RF元件提供电源信号以产生RF输出信号的输出。此外，直流电源电路包括被配置为接收RF输出信号的输入。直流电源电路被配置为基于接收到的RF输出信号生成直流电源信号。

7. 发明申请

US20130141175A1 PUSH-PUSH OSCILLATOR CIRCUIT 有权
标题翻译：推压振荡器电路
公开(公告)号：US20130141175A1
公开(公告)日：2013-06-06
申请号：US13814764
申请日：2010-08-26
申请人： Yi Yin , Hao Li , Saverio Trotta
发明人： Yi Yin , Hao Li , Saverio Trotta
IPC分类号： H02M7/5383
CPC分类号： H02M7/53835 , H03B5/1209 , H03B5/1218 , H03B5/1231 , H03B5/124 , H03B5/1847 , H03B25/00 , H03B2200/007
摘要： A push-push oscillator circuit with a first oscillation branch with a first active device and a first tank adapted to provide a signal having a fundamental frequency f0, a second oscillation branch with a second active device and a second tank symmetrical to the first oscillation branch and adapted to provide a signal having the fundamental frequency f0. Output branches are coupled to the first oscillation branch and the second oscillation branch to provide signals having the second harmonic frequency 2f0 of the fundamental signal based on the signals having the fundamental frequency f0 and/or to provide signals having the fundamental frequency f0; The push-push oscillator circuit further comprises at least one terminal branch with a terminal adapted to provide a component of a differential signal having the second harmonic frequency 2f0 or the fundamental frequency f0. The at least one terminal branch comprises a RF stub.
摘要翻译：一种具有第一振荡分支的推挽振荡器电路，具有第一有源器件和适于提供具有基频f0的信号的第一振荡器，具有第二有源器件的第二振荡分支和与第一振荡分支对称的第二振荡器并且适于提供具有基频f0的信号。输出分支耦合到第一振荡分支和第二振荡分支，以基于具有基频f0的信号和/或提供具有基频f0的信号来提供具有基波信号的二次谐波频率2f0的信号; 推挽振荡器电路还包括至少一个终端分支，其具有适于提供具有二次谐波频率2f0或基频f0的差分信号的分量的终端。至少一个终端分支包括RF短截线。

8. 发明授权

US08994463B2 Push-push oscillator circuit 有权
标题翻译：推挽式振荡电路
公开(公告)号：US08994463B2
公开(公告)日：2015-03-31
申请号：US13814764
申请日：2010-08-26
申请人： Yin Yi , Hao Li , Saverio Trotta
发明人： Yin Yi , Hao Li , Saverio Trotta
IPC分类号： H03B5/18 , H02M7/5383 , H03B25/00 , H03B5/12
CPC分类号： H02M7/53835 , H03B5/1209 , H03B5/1218 , H03B5/1231 , H03B5/124 , H03B5/1847 , H03B25/00 , H03B2200/007
摘要： A push-push oscillator circuit with a first oscillation branch with a first active device and a first tank adapted to provide a signal having a fundamental frequency f0, a second oscillation branch with a second active device and a second tank symmetrical to the first oscillation branch and adapted to provide a signal having the fundamental frequency f0. Output branches are coupled to the first oscillation branch and the second oscillation branch to provide signals having the second harmonic frequency 2f0 of the fundamental signal based on the signals having the fundamental frequency f0 and/or to provide signals having the fundamental frequency f0; The push-push oscillator circuit further comprises at least one terminal branch with a terminal adapted to provide a component of a differential signal having the second harmonic frequency 2f0 or the fundamental frequency f0. The at least one terminal branch comprises a RF stub.
摘要翻译：一种具有第一振荡分支的推挽振荡器电路，具有第一有源器件和适于提供具有基频f0的信号的第一振荡器，具有第二有源器件的第二振荡分支和与第一振荡分支对称的第二振荡器并且适于提供具有基频f0的信号。输出分支耦合到第一振荡分支和第二振荡分支，以基于具有基频f0的信号和/或提供具有基频f0的信号来提供具有基波信号的二次谐波频率2f0的信号; 推挽振荡器电路还包括至少一个终端分支，其具有适于提供具有二次谐波频率2f0或基频f0的差分信号的分量的终端。至少一个终端分支包括RF短截线。

9. 发明申请

US20140191377A1 INTEGRATED CIRCUIT PACKAGE 有权
标题翻译：集成电路封装
公开(公告)号：US20140191377A1
公开(公告)日：2014-07-10
申请号：US14240765
申请日：2011-08-31
申请人： Ralf Reuter , Saverio Trotta
发明人： Ralf Reuter , Saverio Trotta
IPC分类号： H01L23/66
CPC分类号： H01L23/66 , H01L23/49822 , H01L24/13 , H01L24/16 , H01L2223/6627 , H01L2223/6677 , H01L2224/131 , H01L2224/16225 , H01L2924/19032 , H01L2924/19051 , H01P3/003 , H01P5/10 , H01L2924/014
摘要： An integrated circuit package comprising a substrate and at least one semiconductor die is described. A connection unit may provide electrical connections between the substrate and the semiconductor die. The connection unit may comprise a stack of conduction layers and isolation layers stacked atop each other. The stack may include a microstrip line or a coplanar waveguide. The microstrip line or the coplanar waveguide may be part of a balun, a power divider, or a directional coupler.
摘要翻译：描述了包括基板和至少一个半导体管芯的集成电路封装。连接单元可以在基板和半导体管芯之间提供电连接。连接单元可以包括彼此顶层堆叠的导电层和隔离层。堆叠可以包括微带线或共面波导。微带线或共面波导可以是巴伦，功率分配器或定向耦合器的一部分。

10. 发明授权

US08478219B2 Heterodyne receiver 有权
标题翻译：外差接收机
公开(公告)号：US08478219B2
公开(公告)日：2013-07-02
申请号：US13055474
申请日：2008-07-25
申请人： Saverio Trotta , Ralf Reuter
发明人： Saverio Trotta , Ralf Reuter
IPC分类号： H04B1/18
CPC分类号： H03D7/163
摘要： A down-conversion module for a heterodyne receiver comprises a first mixer circuit, a second mixer circuit and an interconnection. The first mixer circuit includes first and second differential control terminals and is arranged to produce a first down-converted differential voltage signal at a first down-converted frequency as a function of a first RF differential input signal applied to the first differential control terminals and of a first RF differential reference frequency signal applied to the second differential control terminals. The second mixer circuit includes two differential pairs of second amplifier elements and the second amplifier elements comprise second differential control terminals and cross-connected pairs of second amplifier output paths for producing a second down-converted differential voltage signal at a second down-converted frequency as a function of the first down-converted differential voltage signal and of a second RF differential reference frequency signal applied to the second differential control terminals. The interconnection includes transmission line elements and is arranged to apply a differential current signal which is a function of the first down-converted differential voltage signal to differential input terminals of the second mixer circuit common to respective pairs of the second amplifier elements.
摘要翻译：用于外差接收器的下变频模块包括第一混频器电路，第二混频器电路和互连。第一混频器电路包括第一和第二差分控制端子，并且被布置成根据施加到第一差分控制端子的第一RF差分输入信号产生第一下变频频率的第一下变频差分电压信号，以及施加到第二差分控制端子的第一RF差分参考频率信号。第二混频器电路包括两个差分对的第二放大器元件，第二放大器元件包括第二差分控制端子和交叉连接的第二放大器输出路径对，用于以第二下变频频率产生第二下变频差分电压信号，第一下变频差分电压信号和施加到第二差分控制端子的第二RF差分参考频率信号的功能。互连包括传输线路元件，并且被布置成将作为第一下变频差分电压信号的函数的差分电流信号施加到相应对的第二放大器元件共同的第二混频器电路的差分输入端子。

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