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1. 发明授权

US07471340B1 Video quality adaptive variable-rate buffering method and system for stabilizing a sampled video signal 有权
标题翻译：用于稳定采样视频信号的视频质量自适应可变速率缓冲方法和系统
公开(公告)号：US07471340B1
公开(公告)日：2008-12-30
申请号：US11088447
申请日：2005-03-24
申请人： Ahsan Chowdhury , Rahul Singh , John L. Melanson , James A. Antone
发明人： Ahsan Chowdhury , Rahul Singh , John L. Melanson , James A. Antone
IPC分类号： H03M1/12 , H03L7/00 , H04N9/64
CPC分类号： H03L7/1974 , H03L7/08 , H03L7/0805 , H03L2207/50 , H04N5/12 , H04N5/213 , H04N5/765 , H04N5/85 , H04N7/0132 , H04N9/8042 , H04N9/896 , H04N21/4325 , H04N21/44004
摘要： A video quality adaptive variable-rate buffering method and system for stabilizing a sampled video signal reduces the buffer size required to compensate for line-to-line variations in an unstable video source. A video signal is sampled at a predetermined rate and decimated by a selectable decimation factor prior to buffering. By selecting different decimation factors, the effective length of the buffer is changed from short duration for stable input signals and to longer duration for unstable input signals. A video signal quality detector is employed to provide a selection input that adjusts the decimation factor and also the loop bandwidth of a clock generator that provides the output clock for the buffer, which is generated from the input signal via a phase-lock loop (PLL). The operation of the system automatically varies from highly responsive for stable video input signals to less responsive for unstable video input signals, providing improved stability in the video output.
摘要翻译：用于稳定采样视频信号的视频质量自适应可变速率缓冲方法和系统降低了补偿不稳定视频源中的线间变化所需的缓冲器大小。以预定的速率对视频信号进行采样，并在缓冲之前用可选择的抽取因子进行抽取。通过选择不同的抽取因子，缓冲器的有效长度从稳定输入信号的短持续时间改变为不稳定输入信号的持续时间。采用视频信号质量检测器来提供选择输入，其调节抽取因子以及时钟发生器的环路带宽，该时钟发生器提供缓冲器的输出时钟，该时钟发生器通过锁相环（PLL）从输入信号产生）。系统的操作自动变化，从稳定的视频输入信号的高度响应到对不稳定的视频输入信号的响应不足，提高了视频输出的稳定性。

2. 发明授权

US07339628B2 Method and apparatus to improve decoding of composite video signals 有权
标题翻译：改善复合视频信号解码的方法和装置
公开(公告)号：US07339628B2
公开(公告)日：2008-03-04
申请号：US10964547
申请日：2004-10-13
申请人： Daniel Gudmondson , John L. Melanson , Rahul Singh , James A. Antone , Ahsan Habib Chowdhury , Krishnan Subramoniam
发明人： Daniel Gudmondson , John L. Melanson , Rahul Singh , James A. Antone , Ahsan Habib Chowdhury , Krishnan Subramoniam
IPC分类号： H03M1/12
CPC分类号： H04N5/4401 , H04N5/602 , H04N5/76 , H04N5/781 , H04N9/8042 , H04N11/20 , H04N21/4147 , H04N21/4305
摘要： Video decoder systems in which both the analog-to-digital converter and the composite decoder are driven by the stable sample clock, such as a crystal source. The outputs of the composite decoder are provided to a source rate converter, having an output that is provided to a digital output formatter. The digital output formatter is driven by the output clock, which may be locked to the source clock if desired. The output clock is developed by a clock generator which may be one of several different types, including a fractional N synthesizer, a direct digital synthesizer or a puncture clock.
摘要翻译：视频解码器系统，其中模数转换器和复合解码器均由诸如晶体源的稳定采样时钟驱动。复合解码器的输出被提供给源速率转换器，其具有提供给数字输出格式器的输出。数字输出格式化器由输出时钟驱动，如果需要，可以将其锁定到源时钟。输出时钟由时钟发生器开发，时钟发生器可以是几种不同类型之一，包括分数N合成器，直接数字合成器或穿孔时钟。

3. 发明授权

US07499106B1 Method and system for synchronizing video information derived from an asynchronously sampled video signal 有权
标题翻译：用于同步从异步采样的视频信号导出的视频信息的方法和系统
公开(公告)号：US07499106B1
公开(公告)日：2009-03-03
申请号：US11082346
申请日：2005-03-17
申请人： Daniel Gudmunson , John Melanson , Rahul Singh , Ahsan Chowdhury
发明人： Daniel Gudmunson , John Melanson , Rahul Singh , Ahsan Chowdhury
IPC分类号： H04L7/00
CPC分类号： H03L7/1974 , H03L7/08 , H03L7/0805 , H03L2207/50 , H04N5/12 , H04N5/213 , H04N5/765 , H04N5/85 , H04N7/0132 , H04N9/8042 , H04N9/896 , H04N21/4325 , H04N21/44004
摘要： A method and system for synchronizing video information derived from an asynchronously sampled video signals provide a mechanism for using asynchronous sampling in the front-end of digital video capture systems. A ratio between the sampling clock frequency and the source video clock frequency is computed via an all digital phase-lock loop (ADPLL) and either a video clock is generated from the ratio by another PLL, a number to clock converter or the ratio is used directly to provide digital synchronization information to downstream processing blocks. A sample rate converter (SRC) is provided in an interpolator that either acts as a sample position corrector at the same line rate as the received video, or by introducing an offset in the ADPLL, the video data can be converted to another line rate via the SRC.
摘要翻译：用于同步从异步采样的视频信号导出的视频信息的方法和系统提供了在数字视频采集系统的前端中使用异步采样的机制。通过全数字锁相环（ADPLL）计算采样时钟频率和源视频时钟频率之间的比例，并且视频时钟由另一个PLL的比率，数字到时钟转换器或使用的比率产生直接向下游处理块提供数字同步信息。在内插器中提供采样率转换器（SRC），其作为采样位置校正器以与接收的视频相同的线路速率，或者通过在ADPLL中引入偏移量，视频数据可以通过 SRC。

4. 发明申请

US20060078054A1 Method and apparatus to improve decoding of composite video signals 有权
标题翻译：改善复合视频信号解码的方法和装置
公开(公告)号：US20060078054A1
公开(公告)日：2006-04-13
申请号：US10964547
申请日：2004-10-13
申请人： Daniel Gudmundson , John Melanson , Rahul Singh , James Antone , Ahsan Chowdhury , Krishnan Subramoniam
发明人： Daniel Gudmundson , John Melanson , Rahul Singh , James Antone , Ahsan Chowdhury , Krishnan Subramoniam
IPC分类号： H04N11/02 , H04N11/04 , H04N7/12 , H04B1/66
CPC分类号： H04N5/4401 , H04N5/602 , H04N5/76 , H04N5/781 , H04N9/8042 , H04N11/20 , H04N21/4147 , H04N21/4305
摘要： Video decoder systems in which both the analog-to-digital converter and the composite decoder are driven by the stable sample clock, such as a crystal source. The outputs of the composite decoder are provided to a source rate converter, having an output that is provided to a digital output formatter. The digital output formatter is driven by the output clock, which may be locked to the source clock if desired. The output clock is developed by a clock generator which may be one of several different types, including a fractional N synthesizer, a direct digital synthesizer or a puncture clock.
摘要翻译：视频解码器系统，其中模数转换器和复合解码器均由诸如晶体源的稳定采样时钟驱动。复合解码器的输出被提供给源速率转换器，其具有提供给数字输出格式器的输出。数字输出格式化器由输出时钟驱动，如果需要，可以将其锁定到源时钟。输出时钟由时钟发生器开发，时钟发生器可以是几种不同类型之一，包括分数N个合成器，直接数字合成器或穿孔时钟。

5. 发明申请

US20060077296A1 Inverse tracking over two different clock domains 失效
标题翻译：反向跟踪两个不同的时钟域
公开(公告)号：US20060077296A1
公开(公告)日：2006-04-13
申请号：US10964556
申请日：2004-10-13
申请人： Daniel Gudmundson , John Melanson , Rahul Singh , Ahsan Chowdhury
发明人： Daniel Gudmundson , John Melanson , Rahul Singh , Ahsan Chowdhury
IPC分类号： H04N11/00
CPC分类号： H03L7/06 , H03L7/0991 , H03L2207/50 , H04L7/005 , H04L7/0331 , H04N5/126
摘要： A video decoder in which the video source clock is generated entirely in the digital domain is disclosed herein. By creating a virtual version of the source clock in a numeric oscillator, the amount of noise in the system is substantially reduced. Furthermore, by transferring the digitized video signal, sampled with an asynchronous crystal clock, into the source clock domain, the accuracy of the brightness (amplitude) and color (phase) information can be greatly enhanced.
摘要翻译：本文公开了视频源时钟完全在数字域中生成的视频解码器。通过在数字振荡器中创建源时钟的虚拟版本，系统中的噪声量显着降低。此外，通过将用异步晶体时钟采样的数字化视频信号传送到源时钟域，可以大大提高亮度（幅度）和颜色（相位）信息的精度。

6. 发明授权

US07474724B1 Method and system for video-synchronous audio clock generation from an asynchronously sampled video signal 有权
标题翻译：用于从异步采样的视频信号产生视频同步音频时钟的方法和系统
公开(公告)号：US07474724B1
公开(公告)日：2009-01-06
申请号：US11082347
申请日：2005-03-17
申请人： Daniel Gudmunson , John Melanson , Rahul Singh , Ahsan Chowdhury
发明人： Daniel Gudmunson , John Melanson , Rahul Singh , Ahsan Chowdhury
IPC分类号： H03D3/24
CPC分类号： H03L7/1974 , H03L7/08 , H03L7/0805 , H03L2207/50 , H04N5/12 , H04N5/213 , H04N5/765 , H04N5/85 , H04N7/0132 , H04N9/8042 , H04N9/896 , H04N21/4325 , H04N21/44004
摘要： A method and system for video-synchronous audio clock generation from an asynchronously sampled video signal provides a mechanism for maintaining synchronization of audio sampling in digital video-audio systems. A ratio between the sampling clock frequency and an audio reference frequency clock is computed via an all digital phase-lock loop (ADPLL) and an audio clock is generated from the ratio by another PLL or a number to clock converter. In systems where a sampling clock to source video clock ratio has been computed for recovering a video signal, the audio ratio can be computed directly from the video ratio.
摘要翻译：用于从异步采样的视频信号产生视频同步音频时钟的方法和系统提供了一种用于维持数字视频 - 音频系统中音频采样同步的机制。通过全数字锁相环（ADPLL）计算采样时钟频率和音频参考频率时钟之间的比例，并且通过另一PLL或数字到时钟转换器从该比率产生音频时钟。在已经计算了用于恢复视频信号的源视频时钟比的采样时钟的系统中，可以从视频比率直接计算音频比。

7. 发明授权

US07158045B1 Method and apparatus for maintaining an ideal frequency ratio between numerically-controlled frequency sources 有权
标题翻译：用于维持数控频率源之间的理想频率比的方法和装置
公开(公告)号：US07158045B1
公开(公告)日：2007-01-02
申请号：US11088446
申请日：2005-03-24
申请人： Daniel Gudmunson , John Melanson , Rahul Singh , Ahsan Chowdhury
发明人： Daniel Gudmunson , John Melanson , Rahul Singh , Ahsan Chowdhury
IPC分类号： H04L7/00
CPC分类号： H03L7/0994 , H03L7/07 , H03L7/0805 , H03L7/197
摘要： A method and apparatus for maintaining an ideal frequency ratio between numerically-controlled frequency sources provides a mechanism for maintaining coherence between multiple synchronization references where a known ideal rational relationship between the sources is known. Multiple numerically controlled oscillators (NCOs) generate the multiple synchronization references, which may be clock signals or numeric phase representations and the outputs of the NCOs are compared with a ratiometric frequency comparator that determines whether there is an error in the ratio between the NCO outputs. The frequency of one of the NCOs is then adjusted with a frequency correction factor provided by the ratiometric frequency comparator. The NCO inputs can represent ratios of the synchronization reference frequencies to a fixed reference clock and the NCOs clocked by the fixed reference clock.
摘要翻译：用于在数控频率源之间保持理想频率比的方法和装置提供了一种维持多个同步参考之间的相干性的机制，其中已知的源之间的理想的理性关系是已知的。多个数控振荡器（NCO）产生多个同步参考，其可以是时钟信号或数字相位表示，并且将NCO的输出与比较率频率比较器进行比较，其确定NCO输出之间的比率是否存在误差。然后用比例式频率比较器提供的频率校正因子来调整NCO之一的频率。 NCO输入可以表示同步参考频率与固定参考时钟的比率和由固定参考时钟计时的NCO。

8. 发明授权

US07400362B1 Method and apparatus to interface video signals to a decoder to compensate for droop 有权
标题翻译：将视频信号连接到解码器以补偿下垂的方法和装置
公开(公告)号：US07400362B1
公开(公告)日：2008-07-15
申请号：US11015756
申请日：2004-12-16
申请人： Daniel Gudmundson , Shyam Somayajula , Ahsan Habib Chowdhury , James A. Antone , Rahul Singh
发明人： Daniel Gudmundson , Shyam Somayajula , Ahsan Habib Chowdhury , James A. Antone , Rahul Singh
IPC分类号： H04N7/01 , G05F1/40
CPC分类号： H04N5/21
摘要： A system in which drooping of the video levels due to leakage currents and proper DC bias level is addressed by providing a charge into the video signal to offset the leakage currents and to provide DC bias. To determine the leakage current level, measurements are made measuring the voltages of the syncs and the blanking intervals. To determine the DC bias, a measurement is made of the sync. Over a series of video lines these measurements are averaged. If the average is below the desired level, a charge is provided via a current source to the incoming signal. By having the current source provide charge during each video line, droop is reduced and the proper DC bias is provided.
摘要翻译：通过向视频信号中提供电荷来补偿泄漏电流并提供DC偏压来解决由泄漏电流和适当的DC偏置电平引起的视频电平下降的系统。为了确定泄漏电流电平，可以测量同步电压和消隐间隔。为了确定直流偏置，测量同步。通过一系列视频线对这些测量进行平均。如果平均值低于所需的电平，则通过电流源向输入信号提供电荷。通过使电流源在每个视频行期间提供电荷，降低下降并提供适当的DC偏压。

9. 发明授权

US07310119B1 Adaptive circuit for Y-C separation 有权
标题翻译： Y-C分离自适应电路
公开(公告)号：US07310119B1
公开(公告)日：2007-12-18
申请号：US10862685
申请日：2004-06-07
申请人： Rahul Singh , Daniel O. Gudmundson , James A. Antone
发明人： Rahul Singh , Daniel O. Gudmundson , James A. Antone
IPC分类号： H04N9/78
CPC分类号： H04N9/78
摘要： An adaptive circuit and method for separating luminance and chrominance components from a composite video signal by deriving three input lines from the composite video signal, determining whether any luminance similarity exists among the three input lines, and then selectively enabling a component filter based on any luminance similarity. If no luminance similarity exists among all three of the input lines, then a subtractive comb filter is enabled to maintain high vertical luminance resolution. If luminance similarity exists among all three of the input lines, then an additive comb filter is enabled. The additive comb filter performs three-line averaging when a high degree of similarity exists among all three consecutive input lines to minimize cross-chroma artifacts on lines that are similar. Chrominance similarity among the three input lines can also be determined by generating first and second chrominance values using different pairs of the three input lines, computing a difference of the first and second chrominance values, and comparing the chroma difference to a threshold value. If no luminance similarity exists between any of the three input lines or no chrominance similarity exists (i.e., there is vertical chroma transition), then a notch filter incorporated into the subtractive comb filter can be enabled.
摘要翻译：一种通过从复合视频信号中导出三条输入线从复合视频信号中分离亮度和色度分量的自适应电路和方法，确定在三条输入线之间是否存在任何亮度相似度，然后基于任何亮度选择性地使能分量滤波器相似。如果在所有三条输入线之间不存在亮度相似性，则使减法梳状滤波器能够保持高的垂直亮度分辨率。如果在所有三条输入线之间存在亮度相似性，则启用加性梳状滤波器。当所有三条连续的输入线之间存在高度相似度时，加法梳状滤波器进行三线平均，以使相似线上的交叉色度伪影最小化。也可以通过使用三条输入线的不同对产生第一和第二色度值，计算第一和第二色度值的差异以及将色度差与阈值进行比较来确定三条输入线之间的色度相似度。如果在三条输入线中的任何一条线之间不存在亮度相似性，或者不存在色度相似性（即存在垂直色度转换），则可以启用并入减法梳状滤波器的陷波滤波器。

10. 发明授权

US07423697B1 Method and apparatus for AC coupling a signal while restoring DC levels 有权
标题翻译：用于在恢复DC电平时交流耦合信号的方法和装置
公开(公告)号：US07423697B1
公开(公告)日：2008-09-09
申请号：US11015728
申请日：2004-12-16
申请人： Daniel Gudmundson , Ahsan Habib Chowdury , James A. Antone , Rahul Singh
发明人： Daniel Gudmundson , Ahsan Habib Chowdury , James A. Antone , Rahul Singh
IPC分类号： H04N7/18
CPC分类号： H04N5/165 , H04N5/18
摘要： A system in which drooping of the video levels due to leakage currents and proper DC bias level is addressed by providing a charge into the video signal to offset the leakage currents and to provide DC bias. To determine the leakage current level, measurements are made measuring the voltages of the syncs and the blanking intervals. To determine the DC bias, a measurement is made of the sync. Over a series of video lines these measurements are averaged. If the average is below the desired level, a charge is provided via a current source to the incoming signal. By having the current source provide charge during each video line, droop is reduced and the proper DC bias is provided.
摘要翻译：通过向视频信号中提供电荷来补偿泄漏电流并提供DC偏压来解决由泄漏电流和适当的DC偏置电平引起的视频电平下降的系统。为了确定泄漏电流电平，可以测量同步电压和消隐间隔。为了确定直流偏置，测量同步。通过一系列视频线对这些测量进行平均。如果平均值低于所需的电平，则通过电流源向输入信号提供电荷。通过使电流源在每个视频行期间提供电荷，降低下降并提供适当的DC偏压。

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