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1. 发明申请

US20150095705A1 Instruction and Logic for Machine Checking Communication 有权
标题翻译：机器检查通信的指令和逻辑
公开(公告)号：US20150095705A1
公开(公告)日：2015-04-02
申请号：US14040092
申请日：2013-09-27
申请人： ASHOK RAJ , MOHAN J. KUMAR , JOSE A. VARGAS , WILLIAM G. AULD , CAMERON B. MCNAIRY , THEODROS YIGZAW , JAMES B. CROSSLAND , ANTHONY E. LUCK
发明人： ASHOK RAJ , MOHAN J. KUMAR , JOSE A. VARGAS , WILLIAM G. AULD , CAMERON B. MCNAIRY , THEODROS YIGZAW , JAMES B. CROSSLAND , ANTHONY E. LUCK
IPC分类号： G06F11/07
CPC分类号： G06F11/0772 , G06F11/0712 , G06F11/0724 , G06F11/0784 , G06F11/0793
摘要： A processor includes a logic to determine an error condition reported in an error bank. The error bank is communicatively coupled to the processor and is associated with logical processors of the processor. The processor includes another logic to generate an interrupt indicating the error condition. The processor includes yet another logic to selectively send the interrupt to a single one of the logical processors associated with the error bank.
摘要翻译：处理器包括用于确定在错误库中报告的错误状况的逻辑。错误组通信地耦合到处理器并且与处理器的逻辑处理器相关联。处理器包括产生指示错误状况的中断的另一逻辑。该处理器还包括用于选择性地将中断发送到与错误库相关联的单个逻辑处理器的另一逻辑。

2. 发明申请

US20180276137A1 APPARATUS AND METHOD FOR SYSTEM PHYSICAL ADDRESS TO MEMORY MODULE ADDRESS TRANSLATION 审中-公开
公开(公告)号：US20180276137A1
公开(公告)日：2018-09-27
申请号：US15465560
申请日：2017-03-21
申请人： ASHOK RAJ , SREENIVAS MANDAVA , SARATHY JAYAKUMAR , MOHAN J. KUMAR , THEODROS YIGZAW , RONALD N. STORY
发明人： ASHOK RAJ , SREENIVAS MANDAVA , SARATHY JAYAKUMAR , MOHAN J. KUMAR , THEODROS YIGZAW , RONALD N. STORY
IPC分类号： G06F12/1009 , G06F12/06 , G06F12/02 , G06F9/26
CPC分类号： G06F12/1009 , G06F9/268 , G06F9/3004 , G06F12/0215 , G06F12/0292 , G06F12/063 , G06F13/24 , G06F13/364 , G06F2212/65 , G06F2212/654
摘要： An apparatus and method are described for system physical address to memory module address translation. For example, one embodiment of an apparatus comprises: a fetch circuit of a core to fetch a system physical address (SPA) translate instruction from memory; a decode circuit of the core to decode the SPA translate instruction; a first register to store an SPA associated with the SPA translate instruction; a memory controller comprising one or more channel controllers to initiate a translation using the SPA, the memory controller to transmit a translation request to a first channel controller; the first channel controller to synthesize a response including dual in-line memory module (DIMM) address information; and a second register to store the DIMM address information to be used to identify the DIMM during subsequent memory transactions.

3. 发明申请

US20150317892A1 CONTEXT BASED ALERT SYSTEM 有权
标题翻译：基于语境的警报系统
公开(公告)号：US20150317892A1
公开(公告)日：2015-11-05
申请号：US14266386
申请日：2014-04-30
申请人： ASHOK RAJ
发明人： ASHOK RAJ
IPC分类号： G08B21/18
CPC分类号： G06Q10/1093 , G06Q10/103 , G08B21/18 , H04M3/436 , H04M2203/2072
摘要： An embodiment allows for context based alerts/alarms. For example, an embodiment may automatically determine that a user is in a meeting with another person based on a meeting entry in the user's calendar. In such a situation the embodiment may divert an incoming phone call, which would ordinarily result in a ring tone, to go directly to voice mail based on the calendar entry. In an embodiment the alert may be delayed until the meeting concludes. Unlike conventional systems, various embodiments do not require a user to change notification rules, manually flip a hardware switch, or create a “Do Not Disturb” setting that allows just a single “silent” time during the day. An embodiment allows data in a calendar to automatically drive the behavior of how a notification panel operates. Other embodiments are described herein.
摘要翻译：一个实施例允许基于上下文的警报/警报。例如，实施例可以基于用户日历中的会议条目自动地确定用户与另一个人会面。在这种情况下，该实施例可以转移通常导致铃声的呼入电话直接基于该日历项进入语音邮件。在一个实施例中，警报可能被延迟直到会议结束。与常规系统不同，各种实施例不需要用户改变通知规则，手动翻转硬件开关，或创建允许在白天仅一个“静音”时间的“不要打扰”设置。实施例允许日历中的数据自动地驱动通知面板如何操作的行为。本文描述了其它实施例。

4. 发明申请

US20120254582A1 TECHNIQUES AND MECHANISMS FOR LIVE MIGRATION OF PAGES PINNED FOR DMA 审中-公开
标题翻译：用于DMA的PIN移动的技术和机制
公开(公告)号：US20120254582A1
公开(公告)日：2012-10-04
申请号：US13076731
申请日：2011-03-31
申请人： ASHOK RAJ , RAJESH M. SANKARAN
发明人： ASHOK RAJ , RAJESH M. SANKARAN
IPC分类号： G06F12/10
CPC分类号： G06F12/1081 , G06F13/28 , G06F2212/654
摘要： Techniques for migrating data from a first range of physical memory locations to a second range of physical memory locations. The second range of physical memory locations is allocated for migration of data from the first range of physical memory locations Pending transactions for the first range of physical memory locations are flushed. One or more address translation entries are reprogrammed. Data is migrated from the first range of physical memory locations to the second range of physical memory locations. Subsequent memory transactions are processed to cause the transactions to be directed to the second range of physical memory locations.
摘要翻译：用于将数据从第一范围的物理存储器位置迁移到物理存储器位置的第二范围的技术。物理存储器位置的第二范围被分配用于从物理存储器位置的第一范围的数据的迁移。待处理的物理存储器位置的第一范围的事务被刷新。一个或多个地址转换条目被重新编程。数据从物理内存位置的第一个范围迁移到物理内存位置的第二个范围。处理随后的内存事务以使事务被引导到物理内存位置的第二范围。

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