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1. 发明申请

US20220270858A1 METHODS OF TUNING TO IMPROVE PLASMA STABILITY 有权
公开(公告)号：US20220270858A1
公开(公告)日：2022-08-25
申请号：US17630878
申请日：2019-08-28
申请人： Applied Materials, Inc.
发明人： Shouqian SHAO , Jianhua ZHOU , Tae Kyung WON
IPC分类号： H01J37/32 , C23C16/505
摘要： Embodiments described herein relate to methods of tuning within semiconductor processes to improve plasma stability. In these embodiments, multiple matching networks are provided. Each of the matching networks couple a radio frequency (RF) source to one of multiple connection points located on an electrode. Based on tuning parameter information and physical geometry information, a controller determines a tuning sequence for the multiple matching networks. As such, some of the matching networks are tuned while the other matching networks are locked. Using multiple matching networks leads to a more uniform plasma within the process volume of the process chamber. Improved plasma uniformity leads to less substrate defects and better device performance. Additionally, in these embodiments, the ability to tune each of the matching networks in a sequence decreases or prevents interference from occurring between the matching networks.

2. 发明申请

US20210210737A1 THIN-FILM ENCAPSULATION 有权
公开(公告)号：US20210210737A1
公开(公告)日：2021-07-08
申请号：US17212920
申请日：2021-03-25
申请人： Applied Materials, Inc.
发明人： Tae Kyung WON , Soo Young CHOI , Sanjay D. YADAV
IPC分类号： H01L51/56 , C23C16/34 , C23C16/505 , H01L51/52
摘要： A method of encapsulating an organic light emitting diode (OLED) is provided. The method includes generating a first plasma in a process chamber, the first plasma having an electron density of at least 1011 cm−3 when an OLED device is positioned within the process chamber. The OLED device includes a substrate and an OLED formed on the substrate. The method further includes pretreating one or more surfaces of the OLED and substrate with the first plasma; depositing a first barrier layer comprising silicon and nitrogen over the OLED by generating a second plasma comprising silicon and nitrogen in the process chamber, the second plasma having an electron density of at least 1011 cm−3, and depositing a buffer layer over the first barrier layer; and depositing a second barrier layer comprising silicon and nitrogen over the buffer layer by generating a third plasma comprising silicon and nitrogen in the process chamber.

3. 发明申请

US20170362712A1 SUBSTRATE TEMPERATURE MONITORING 审中-公开
公开(公告)号：US20170362712A1
公开(公告)日：2017-12-21
申请号：US15188693
申请日：2016-06-21
申请人： Applied Materials, Inc.
发明人： Sanjay D. YADAV , Shreesha Y. RAO , Tae Kyung WON , Umesha ACHARY , Himanshu JOSHI
IPC分类号： C23C16/52 , C23C16/50 , G01J5/08 , C23C16/458 , G01J5/00
CPC分类号： C23C16/52 , C23C14/541 , C23C16/4583 , C23C16/463 , C23C16/5096 , G01J5/0007 , G01J5/041 , G01J5/0806 , G01J2005/0081 , H01L21/67248
摘要： Embodiments disclosed herein generally relate to a substrate temperature monitoring system in a substrate support assembly. In one embodiment, the substrate support assembly includes a support plate and a substrate temperature monitoring system. The support plate has a top surface configured to support a substrate. The substrate temperature monitoring system is disposed in the substrate support plate. The substrate temperature monitoring system is configured to measure a temperature of the substrate from a bottom surface of the substrate. The substrate temperature monitoring system includes a window, a body, and a temperature sensor. The window is integrally formed in a top surface of the support plate. The body is embedded in the support plate, through the bottom surface. The body defines an interior passage. The temperature sensor is disposed in the interior passage beneath the window. The temperature sensor is configured to measure the temperature of the substrate.

4. 发明申请

US20160240312A1 LOW TEMPERATURE MULTILAYER DIELECTRIC FILM FOR PASSIVATION AND CAPACITOR 有权
标题翻译：低温多层电介质薄膜，用于钝化和电容
公开(公告)号：US20160240312A1
公开(公告)日：2016-08-18
申请号：US14970228
申请日：2015-12-15
申请人： Applied Materials, Inc.
发明人： Dapeng WANG , Yixuan WU , Gaku FURUTA , Tae Kyung WON , Beom Soo PARK
IPC分类号： H01G4/06 , H05K1/18 , H05K5/00 , H01G4/30 , H01G4/012
CPC分类号： H01G4/06 , H01G4/012 , H01G4/085 , H01G4/30 , H05K1/162 , H05K2201/0195
摘要： The present disclosure generally relates to capacitors having a multilayer dielectric material between two electrodes. The multilayer dielectric material can have a small thickness with little to no breakdown strength reduction. By utilizing a multilayer dielectric structure in a capacitor, not only can the breakdown strength remain at an acceptable level, but the collective thickness of the capacitor may be reduced to accommodate the higher density pixels for display devices or any device that utilizes a capacitor.
摘要翻译：本发明一般涉及在两个电极之间具有多层电介质材料的电容器。多层电介质材料可以具有很小的厚度，几乎没有甚至没有击穿强度的降低。通过在电容器中利用多层电介质结构，不仅可以将击穿强度保持在可接受的水平，而且还可以减小电容器的总体厚度以适应显示装置或使用电容器的任何器件的较高密度像素。

5. 发明申请

US20160013320A1 MULTILAYER PASSIVATION OR ETCH STOP TFT 有权
标题翻译：多层钝化或蚀刻停止TFT
公开(公告)号：US20160013320A1
公开(公告)日：2016-01-14
申请号：US14773209
申请日：2014-03-04
申请人： APPLIED MATERIALS INC.
发明人： Dong-kil YIM , Tae Kyung WON , Seon-Mee CHO , John M. WHITE
IPC分类号： H01L29/786 , H01L29/66 , H01L29/24
CPC分类号： H01L29/66969 , H01L21/467 , H01L29/24 , H01L29/78603 , H01L29/78606 , H01L29/7869
摘要： The present invention generally relates to TFTs and methods for fabricating TFTs. For either back channel etch TFTs or for etch stop TFTs, multiple layers for the passivation layer or the etch stop layers permits a very dense capping layer to be formed over a less dense back channel protection layer. The capping layer can be sufficiently dense so that few pin holes are present and thus, hydrogen may not pass through to the semiconductor layer. As such, hydrogen containing precursors may be used for the capping layer deposition.
摘要翻译：本发明一般涉及TFT和TFT的制造方法。对于背沟道蚀刻TFT或蚀刻停止TFT，用于钝化层或蚀刻停止层的多个层允许在较不致密的背沟道保护层上形成非常密集的覆盖层。封盖层可以是足够密实的，从而存在很少的针孔，因此氢不能通过半导体层。因此，含氢前体可以用于覆盖层沉积。

6. 发明申请

US20220122876A1 SUBSTRATE SUPPORT FOR CHUCKING OF MASK FOR DEPOSITION PROCESSES 有权
公开(公告)号：US20220122876A1
公开(公告)日：2022-04-21
申请号：US17423689
申请日：2020-01-17
申请人： Applied Materials, Inc.
发明人： Jrjyan Jerry CHEN , Sanjay D. YADAV , Tae Kyung WON , Jun LI , Shouqian SHAO , Surendra Kanimihally SETTY
IPC分类号： H01L21/683 , H01L21/687 , H01J37/32 , C23C16/50 , C23C16/458 , C23C16/04
摘要： Embodiments of the disclosure include methods and apparatus for electrostatically coupling a mask to a substrate support in a deposition chamber. In one embodiment, a substrate support is disclosed that includes a substrate receiving surface, a recessed portion disposed about a periphery of the substrate receiving surface, an electrostatic chuck disposed below the substrate receiving surface, and a plurality of compressible buttons disposed within a respective opening formed in the recessed portion that form an electrical circuit with the electrostatic chuck.

7. 发明申请

US20200047222A1 REMOTE PLASMA SOURCE CLEANING NOZZLE FOR PLASMA ENHANCED CVD CHAMBERS 审中-公开
公开(公告)号：US20200047222A1
公开(公告)日：2020-02-13
申请号：US16102560
申请日：2018-08-13
申请人： Applied Materials, Inc.
发明人： Tae Kyung WON , Young Dong LEE , Chien-Teh KAO , Soo Young CHOI , Sanjay D. YADAV
IPC分类号： B08B7/00 , C23C16/44 , C23C16/452
摘要： The present disclosure relates to a chemical vapor deposition system for processing large area substrates. The chemical vapor deposition system includes a chemical vapor deposition chamber comprising a chamber body having a plurality of sidewalls, a lid assembly, and a bottom. A substrate support extends upward from the bottom within the chamber body. A gas distribution plate is located within the lid assembly. One or more cleaning gas injector ports coupled to corresponding one or more inlets in the plurality of sidewalls. Each of the one or more cleaning gas injector ports has a substantially oval-shaped or circular-shaped cleaning gas nozzle configured to provide reactive species from a remote plasma source to clean an underside of the gas distribution plate.

8. 发明申请

US20180025890A1 PLASMA UNIFORMITY CONTROL BY GAS DIFFUSER HOLE DESIGN 审中-公开
公开(公告)号：US20180025890A1
公开(公告)日：2018-01-25
申请号：US15719465
申请日：2017-09-28
申请人： Applied Materials, Inc.
发明人： Soo Young CHOI , John M. WHITE , Qunhua WANG , Li HOU , Ki Woon KIM , Shinichi KURITA , Tae Kyung WON , Suhail ANWAR , Beom Soo PARK , Robin L. TINER
IPC分类号： H01J37/32 , C23C16/455 , C23C16/509 , C23C16/34
CPC分类号： H01J37/3244 , C23C16/345 , C23C16/455 , C23C16/45565 , C23C16/5096 , H01J37/32082 , H01J37/32091 , H01J37/32541 , H01J37/32596 , H01J2237/327 , H01J2237/3321 , H01J2237/3323 , H01J2237/3325 , Y10T29/49885 , Y10T29/49996
摘要： Embodiments of a method of depositing a thin film on a substrate is provided that includes placing a substrate on a substrate support that is mounted in a processing region of a processing chamber, flowing a process fluid through a plurality of gas passages in a diffuser plate toward the substrate supported on the substrate support, wherein the diffuser plate has an upstream side and a downstream side and the downstream side has a substantially concave curvature, and each of the gas passages are formed between the upstream side and the downstream side, and creating a plasma between the downstream side of the diffuser plate and the substrate support.

9. 发明申请

US20170012064A1 SiON GRADIENT CONCEPT 有权
标题翻译： SiON梯度概念
公开(公告)号：US20170012064A1
公开(公告)日：2017-01-12
申请号：US15202070
申请日：2016-07-05
申请人： Applied Materials, Inc.
发明人： Soo Young CHOI , Tae Kyung WON , Dong-Kil YIM , Yi CUI , Xuena ZHANG
IPC分类号： H01L27/12
CPC分类号： H01L27/1248 , H01L27/3262
摘要： Embodiments of the present disclosure generally relate to methods and devices for use of low temperature polysilicon (LTPS) thin film transistors in liquid crystal display (LCD) and organic light-emitting diode (OLED) displays.
摘要翻译：本公开的实施例一般涉及在液晶显示器（LCD）和有机发光二极管（OLED）显示器中使用低温多晶硅（LTPS）薄膜晶体管的方法和装置。

10. 发明申请

US20150221507A1 INDIUM GALLIUM ZINC OXIDE LAYERS FOR THIN FILM TRANSISTORS 有权
标题翻译：用于薄膜晶体管的氮化镓锌氧化物层
公开(公告)号：US20150221507A1
公开(公告)日：2015-08-06
申请号：US14599696
申请日：2015-01-19
申请人： Applied Materials, Inc.
发明人： Tae Kyung WON , John M. WHITE , Soo Young CHOI , Jung-Chi (Eric) LU
IPC分类号： H01L21/02
CPC分类号： H01L21/02565 , C23C16/407 , C23C16/45574 , C23C16/5096 , H01L21/02472 , H01L21/02483 , H01L21/02554 , H01L21/0262 , H01L29/66969 , H01L29/7869 , H01L29/78693 , H01L29/78696
摘要： Embodiments of the present disclosure generally provide a method and apparatus for forming an IGZO active layer within a thin film transistor (TFT) device. In one embodiment, a method is provided for forming an IGZO active layer on a dielectric surface using a PECVD deposition process. In one embodiment, a method is provided for pretreating and passivating the dielectric surface for receiving the PECVD formed IGZO layer. In another embodiment, a method is provided for treating a PECVD formed IGZO layer after depositing said layer. In another embodiment, a method is provided for forming a multi-layer or complex layering structure of IGZO, within a PECVD processing chamber, for optimizing TFT electrical characteristics such as carrier density, contact resistance, and gate dielectric interfacial properties. In yet another embodiment, a method is provided for forming integrated layers for a TFT including IGZO within an in-situ environment of a cluster tool.
摘要翻译：本公开的实施例通常提供了用于在薄膜晶体管（TFT）器件内形成IGZO有源层的方法和装置。在一个实施例中，提供了一种使用PECVD沉积工艺在电介质表面上形成IGZO有源层的方法。在一个实施例中，提供了一种用于预处理和钝化用于接收形成PECVD的IGZO层的电介质表面的方法。在另一个实施例中，提供了一种在沉积所述层之后处理形成的PECVD层的方法。在另一个实施例中，提供了一种用于在PECVD处理室内形成IGZO的多层或复合分层结构的方法，用于优化诸如载流子密度，接触电阻和栅介质界面性质的TFT电特性。在另一个实施例中，提供了一种用于在集群工具的原位环境内形成用于包括IGZO的TFT的集成层的方法。

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