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1. 发明授权

US07403583B1 System and method for predictive synchronization for locating interleaving frames and demodulation training sequences 失效
标题翻译：用于定位交织帧和解调训练序列的预测同步的系统和方法
公开(公告)号：US07403583B1
公开(公告)日：2008-07-22
申请号：US10369229
申请日：2003-02-19
申请人： Kent R. Bruening , Zachary C. Bagley , Vaughn L. Mower
发明人： Kent R. Bruening , Zachary C. Bagley , Vaughn L. Mower
IPC分类号： H04L7/00
CPC分类号： H04B1/7075
摘要： A system and method for using Psuedo-Noise (PN) phase to determine frame start of a data frame is provided. The system and method includes at least two PN component codes, wherein the at least two PN component codes are relatively prime. A received PN composite encoded signal is correlated with at least one of the PN component codes and a frame start is determined. With reference to frame start at least one training sequence bit is located. The training bits may be overwritten on FEC encoded frame data such that a FEC decoder may be used to recover data overwritten by the training sequence bit(s).
摘要翻译：提供了一种使用Psuedo-Noise（PN）相位来确定数据帧的帧起始的系统和方法。该系统和方法包括至少两个PN分量代码，其中至少两个PN分量代码是相对素数。接收的PN复合编码信号与PN分量代码中的至少一个相关，并且确定帧起始。参考帧开始，至少定位一个训练序列位。可以在FEC编码的帧数据上覆盖训练比特，使得FEC解码器可以用于恢复由训练序列比特重写的数据。

2. 发明授权

US08456374B1 Antennas, antenna systems and methods providing randomly-oriented dipole antenna elements 有权
标题翻译：天线，天线系统和提供随机取向的偶极天线元件的方法
公开(公告)号：US08456374B1
公开(公告)日：2013-06-04
申请号：US12589770
申请日：2009-10-28
申请人： Zachary C. Bagley , Marc J. Russon , David G. Landon
发明人： Zachary C. Bagley , Marc J. Russon , David G. Landon
IPC分类号： H01Q21/10 , H01Q9/28
CPC分类号： H01Q9/28 , H01Q21/062
摘要： In one exemplary embodiment, an antenna arrangement includes: a substrate; and a plurality of dipole antenna elements disposed on the substrate, wherein the plurality of dipole antenna elements are randomly-oriented with respect to each other. In further exemplary embodiments, the plurality of dipole antenna elements includes at least six dipoles that are all electrically fed and do not need to be magnetically fed in order to generate and detect an arbitrary polarization. In still further exemplary embodiments, each dipole element has a fractal shape.
摘要翻译：在一个示例性实施例中，天线装置包括：基板; 以及设置在基板上的多个偶极天线元件，其中所述多个偶极天线元件相对于彼此随机取向。在另外的示例性实施例中，多个偶极子天线元件包括至少六个偶极子，其全部是电馈电的，并且不需要被磁性馈送以产生和检测任意偏振。在另外的示例性实施例中，每个偶极子元件具有分形形状。

3. 发明授权

US07715485B1 MIMO communication using interference cancellation and unequal transmit power distribution 有权
标题翻译：使用干扰消除和不等发射功率分配的MIMO通信
公开(公告)号：US07715485B1
公开(公告)日：2010-05-11
申请号：US11651171
申请日：2007-01-08
申请人： Christian Schlegel , Zachary C. Bagley
发明人： Christian Schlegel , Zachary C. Bagley
IPC分类号： H04K1/10 , H04L27/28
CPC分类号： H04K1/10 , H04B7/0413 , H04B7/0697 , H04L25/03006 , H04L2025/03426 , H04W52/42
摘要： Communication of data over a multiple-input multiple-output (MIMO) channel includes allocating transmission power unequally to the different data streams. The transmission power allocation is performed without regard to a state of a changing channel response of the MIMO channel. A relatively low complexity interference cancelling receiver can therefore decode the data streams.
摘要翻译：通过多输入多输出（MIMO）信道的数据通信包括不同地分配不同数据流的传输功率。在不考虑MIMO信道的信道响应变化的状态的情况下进行发送功率分配。因此，相对低复杂度的干扰消除接收机可以对数据流进行解码。

4. 发明授权

US06721371B1 One sample per symbol high rate programmable parallel architecture for digital demodulation 有权
标题翻译：每个符号的一个采样高速可编程并行架构用于数字解调
公开(公告)号：US06721371B1
公开(公告)日：2004-04-13
申请号：US09477882
申请日：2000-01-05
申请人： Steven T Barham , Zachary C Bagley , Lyman D Horne
发明人： Steven T Barham , Zachary C Bagley , Lyman D Horne
IPC分类号： H04L2722
CPC分类号： H03H17/0294 , H04L25/03006
摘要： A high speed demodulator system is comprised of an analog to digital converter (ADC); a high speed demultiplexer connected to an input of the ADC; a bank of parallel programmable demodulators connected to an output of the high speed demultiplexer; a timing interface connected to the bank of parallel programmable demodulators; and a phase reference interface connected to the bank of parallel programmable demodulators and a data processor. A parallel programmable demodulator includes a reconfigurable FIR filter, has an input port for receiving digital input signals and an output coupled to a coherent signal processor and a coherent memory. The programmable FIR filter provides filtered signals to the coherent signal processor for storage in the coherent memory. The integrated circuit further includes a sequential weight processor having an input coupled to an output of the coherent memory. The sequential weight processor includes a weight memory and operates to output symbol soft decision data resulting from processing the digital input signals. The integrated circuit is programmable into one of a plurality of operating modes, including at least one of a received signal acquisition mode, a channel estimator mode, an adaptive equalizer mode, and a channel-wise differential mode.
摘要翻译：高速解调器系统由模数转换器（ADC）组成; 连接到ADC的输入的高速解复用器; 一组并行可编程解调器，连接到高速解复用器的输出端; 连接到并行可编程解调器组的定时接口; 以及连接到并行可编程解调器组的相位参考接口和数据处理器。并行可编程解调器包括可重构FIR滤波器，具有用于接收数字输入信号的输入端口和耦合到相干信号处理器和相干存储器的输出。可编程FIR滤波器将滤波信号提供给相干信号处理器，以存储在相干存储器中。集成电路还包括具有耦合到相干存储器的输出的输入的顺序权重处理器。顺序加权处理器包括权重存储器，并且操作以输出由处理数字输入信号得到的符号软判决数据。集成电路可编程为多种操作模式之一，包括接收信号采集模式，信道估计模式，自适应均衡器模式和频道方式差分模式中的至少一种。

5. 发明授权

US07522653B2 System and method for PN correlation and symbol synchronization 有权
标题翻译：用于PN相关和符号同步的系统和方法
公开(公告)号：US07522653B2
公开(公告)日：2009-04-21
申请号：US11046361
申请日：2005-01-27
申请人： Dan M. Griffin , Richard B. Ertel , Johnny M. Harris , Kenneth C. Bark , Zachary C. Bagley
发明人： Dan M. Griffin , Richard B. Ertel , Johnny M. Harris , Kenneth C. Bark , Zachary C. Bagley
IPC分类号： H04B1/00
CPC分类号： H04B1/7077
摘要： A method is disclosed for PN correlation and symbol synchronization of a spread spectrum signal at a receiver when a symbol boundary of the spread spectrum signal is not on a PN epoch or is otherwise unknown. The method includes the operation of modulating the spread spectrum signal with a PN code to form a potentially despread signal. The potentially despread signal can be integrated for a plurality of symbol times at a rate of N integrations per symbol time to form N symbol energies per symbol for a plurality of symbols. Each of the N symbol energies can correspond to a different symbol time hypothesis. The N symbol energies from the plurality of symbols can be added respectively to form N summed symbol time hypotheses. The Nth summed symbol time hypothesis having maximum power can be found. The Nth summed symbol time hypothesis can relate to a location of the symbol boundary.
摘要翻译：当扩展频谱信号的符号边界不在PN纪元上时，公开了一种在接收机处的扩频信号的PN相关和符号同步的方法，或者以其他方式未知。该方法包括利用PN码对扩展频谱信号进行调制以形成潜在的解扩信号。潜在去扩展信号可以以每个符号时间的N个积分的速率被整合为多个符号时间，以对于多个符号形成每个符号的N个符号能量。 N个符号能量中的每一个可以对应于不同的符号时间假设。可以分别添加来自多个符号的N个符号能量以形成N个相加的符号时间假设。可以找到具有最大功率的第N个和符号时间假设。第N个和符号时间假设可以与符号边界的位置有关。

6. 发明授权

US08509711B1 Wireless terminals, systems, and methods using interlaced diplexers 有权
标题翻译：使用隔行双工器的无线终端，系统和方法
公开(公告)号：US08509711B1
公开(公告)日：2013-08-13
申请号：US12987823
申请日：2011-01-10
申请人： Zachary C. Bagley , Thomas R. Giallorenzi , Radivoje Zarubica , Robert G. Rebolledo , Richard G. Edwards , Robert M. Gillespie , Linda J. McMillin , Stephen M. Dudley
发明人： Zachary C. Bagley , Thomas R. Giallorenzi , Radivoje Zarubica , Robert G. Rebolledo , Richard G. Edwards , Robert M. Gillespie , Linda J. McMillin , Stephen M. Dudley
IPC分类号： H04B1/50 , H04B1/00
CPC分类号： H04B1/525
摘要： Wireless terminals, systems, and methods use interlaced diplexers. A first diplexer can provide a first pair of bands separated by a first separation band, and a second diplexer can provide a second pair of bands separated by a second separation band. The first separation band and the second separation band can overlap. Transceivers (comprising transmitters and receivers) can be coupled to the diplexers to provide frequency-division duplex communications using one or both of the pairs of bands.
摘要翻译：无线终端，系统和方法使用隔行双工器。第一双工器可以提供由第一分离带分离的第一对频带，而第二双工器可以提供由第二分离带分离的第二对频带。第一分离带和第二分离带可以重叠。收发器（包括发射机和接收机）可以耦合到双工器，以使用频带对中的一个或两个来提供频分双工通信。

7. 发明授权

US07496080B1 System and method for priority communication management in a hybrid TDMA-SS system 有权
标题翻译：在混合TDMA-SS系统中优先通信管理的系统和方法
公开(公告)号：US07496080B1
公开(公告)日：2009-02-24
申请号：US10619864
申请日：2003-07-14
申请人： Vaughn L. Mower , Merle L. Keller , Zachary C. Bagley
发明人： Vaughn L. Mower , Merle L. Keller , Zachary C. Bagley
IPC分类号： H04B7/212 , H04B7/216 , H04L12/403 , H04L12/43 , H04J3/02
CPC分类号： H04L12/4035
摘要： A method and system for managing Priority Messages in a hybrid TDMA-Spread Spectrum (TDMA-SS) communication system is provided. The method and system include a HUB for generating a HUB TDMA epoch, wherein the HUB TDMA epoch includes at least one Priority Message (PM) slot. The PM slot includes a plurality of assignable PM sub-slots. The method and system also include at least one SPOKE, wherein the at least one SPOKE is adapted to transmit a Priority Message during its assigned PM sub-slot within the HUB TDMA epoch.
摘要翻译：提供了一种用于管理混合TDMA扩频（TDMA-SS）通信系统中的优先级消息的方法和系统。该方法和系统包括用于产生HUB TDMA时期的HUB，其中HUB TDMA时期包括至少一个优先级消息（PM）时隙。 PM时隙包括多个可分配的PM子时隙。所述方法和系统还包括至少一个SPOKE，其中所述至少一个SPOKE适于在所述HUB TDMA时段内的其分配的PM子时隙期间发送优先级消息。

8. 发明授权

US07822157B2 Acquisition and tracking of burst code signals 有权
标题翻译：突发代码信号的采集和跟踪
公开(公告)号：US07822157B2
公开(公告)日：2010-10-26
申请号：US10334191
申请日：2002-12-31
申请人： Merle L. Keller , Samuel Charles Kingston , Steven Barham , Alan Earl Lundquist , Zachary C. Bagley , Warren Paul Willes , Raied N. Mazahreh , Steven J. McEntire
发明人： Merle L. Keller , Samuel Charles Kingston , Steven Barham , Alan Earl Lundquist , Zachary C. Bagley , Warren Paul Willes , Raied N. Mazahreh , Steven J. McEntire
IPC分类号： H04L7/00 , H04L7/04 , H04B7/15 , H04B7/185
CPC分类号： H04B1/7075 , H04B2201/70715
摘要： A digital communication system includes a generator for generating a plurality of pulse trains, each having a different timing, and pre-compensation circuitry for synchronizing the plurality of pulse trains to a timing signal. The system also includes comparison circuitry for simultaneously comparing a received burst code signal to each of the plurality of pulse trains, where the burst code signal is synchronized to the timing signal, and a detector for detecting which of the pulse trains is a closest temporal match to the burst code signal. The pre-compensation circuitry operates to reduce acquisition time and keep PN code uncertainties within the range of the comparison circuitry.
摘要翻译：数字通信系统包括用于产生每个具有不同定时的多个脉冲串的发生器和用于将多个脉冲序列同步到定时信号的预补偿电路。该系统还包括比较电路，用于同时比较所接收的脉冲串码信号与多个脉冲串中的每个脉冲序列，其中突发码信号与定时信号同步，以及检测器，用于检测哪个脉冲序列是最接近的时间匹配到突发码信号。预补偿电路用于减少采集时间并将PN码不确定度保持在比较电路的范围内。

9. 发明授权

US07486747B1 Digital timing recovery operable at very low or less than zero dB Eb/No 有权
标题翻译：数字定时恢复可操作在非常低或小于零dB Eb / No
公开(公告)号：US07486747B1
公开(公告)日：2009-02-03
申请号：US10888280
申请日：2004-07-09
申请人： Zachary C. Bagley , Christian Schlegel
发明人： Zachary C. Bagley , Christian Schlegel
IPC分类号： H04L27/00
CPC分类号： H04L27/0014 , H04B1/7093 , H04L7/0029 , H04L7/0054 , H04L25/0206 , H04L25/024 , H04L2027/003 , H04L2027/0053 , H04L2027/0067
摘要： A receiver (20) for performing timing recovery over at least one complex channel at low or less than zero SNR (signal power to noise power, in dB) has at least one receive element such as an antenna, an analog-to-digital converter 21 (ADC), a fractional interpolation filter 23, a matched filter 24, and a timing correction loop 26. The timing correction loop 26 selects a minimum mean square error from the output of the matched filter 24 to determine a timing signal output to the interpolation filter 23, and provides one-bit weights to the matched filter 24. Preferably, the timing correction loop 26 includes a magnitude detector 26c, a moving average filter 26b, and a timing error detector 26a that outputs an integer m and fractional μ timing factor to the interpolation filter 23. Within a phase correction loop 27 is a maximum likelihood channel estimator 27b and a phase error detector 27a that controls a phase rotator 22 disposed between the ADC 21 and the interpolation filter 23.
摘要翻译：用于在低或小于零SNR（信噪比功率，以dB为单位）的至少一个复信道上执行定时恢复的接收机（20）具有至少一个接收元件，例如天线，模数转换器 21（ADC），分数内插滤波器23，匹配滤波器24和定时校正环路26.定时校正回路26从匹配滤波器24的输出中选择最小均方误差，以确定输出到内插滤波器23，并且向匹配滤波器24提供一位加权。优选地，定时校正回路26包括幅度检测器26c，移动平均滤波器26b和定时误差检测器26a，其输出整数m和分数μ定时在相位校正环路27中，最大似然信道估计器27b和相位误差检测器27a控制设置在ADC 21和插值滤波器23之间的相位旋转器22。

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