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1. 发明授权

US08867696B2 Fractional frequency divider 有权
标题翻译：分数分频器
公开(公告)号：US08867696B2
公开(公告)日：2014-10-21
申请号：US13172491
申请日：2011-06-29
申请人： Nicolas Regimbal , Franck Badets , Yann Deval , Jean-Baptiste Begueret
发明人： Nicolas Regimbal , Franck Badets , Yann Deval , Jean-Baptiste Begueret
IPC分类号： H03K21/00 , H03K5/156 , H03K21/10 , H03K23/66 , H03K23/68
CPC分类号： H03K5/156 , H03K21/10 , H03K23/662 , H03K23/68
摘要： A fractional frequency divider including a frequency division unit for generating a reduced frequency timing signal having j pulses for every k pulses of an original timing signal, wherein j and k are each integers; and phase correction circuitry adapted to selectively shift each jth pulse of the reduced frequency timing signal by a first fixed time period.
摘要翻译：一种分数分频器，包括用于产生具有针对原始定时信号的每k个脉冲具有j个脉冲的降频定时信号的分频单元，其中j和k各自是整数; 以及相位校正电路，其适于选择性地将所述降频定时信号的第j个脉冲移位第一固定时间段。

2. 发明申请

US20110200152A1 Continuous Time Analogue/Digital Converter 有权
标题翻译：连续时间模拟/数字转换器
公开(公告)号：US20110200152A1
公开(公告)日：2011-08-18
申请号：US13024729
申请日：2011-02-10
申请人： Didier Belot , Jean-Baptiste Begueret , Yann Deval , Dominique Dallet , Andre Mariano
发明人： Didier Belot , Jean-Baptiste Begueret , Yann Deval , Dominique Dallet , Andre Mariano
IPC分类号： H04B1/10 , H03M3/02 , H03M1/00
CPC分类号： H03M3/458 , H03M3/402 , H03M3/484 , H03M3/50
摘要： Continuous time analogue/digital converter, comprising a sigma delta modulator (MSD1) configured to receive an analogue input signal (x(t)) and comprising high-pass filtering means (MF) the chopping frequency of which is equal to half of the sampling frequency (Fs) of the quantization means (QTZ) of the modulator (MSD1).
摘要翻译：连续时间模拟/数字转换器，包括被配置为接收模拟输入信号（x（t））并且包括其斩波频率等于采样的一半的高通滤波装置（MF）的Σ-Δ调制器（MSD1）调制器（MSD1）的量化装置（QTZ）的频率（Fs）。

3. 发明申请

US20110018637A1 RADIOFREQUENCY SIGNAL POWER AMPLIFICATION METHOD AND DEVICE 有权
标题翻译：无线电信号功率放大方法和装置
公开(公告)号：US20110018637A1
公开(公告)日：2011-01-27
申请号：US12841803
申请日：2010-07-22
申请人： Didier Belot , Laurent Leyssenne , Eric Kerherve , Yann Deval
发明人： Didier Belot , Laurent Leyssenne , Eric Kerherve , Yann Deval
IPC分类号： H03G3/30 , H03F3/04
CPC分类号： H03F3/245 , H03F1/0266 , H03F1/0272 , H03F2200/102 , H03F2200/451
摘要： A radiofrequency signal power amplification circuit may include a signal input for receiving the radiofrequency signal, an amplification stage coupled to the signal input and having at least one power transistor, a biasing stage for delivering a bias voltage to the amplification stage, and a processing stage. The processing stage may include a processing input coupled to the signal input, a processing output for delivering a bias current modulated at least in amplitude to the biasing stage, and an amplitude modulator coupled between the processing input and the processing output and configured to determine an envelope signal representative of the envelope of the radiofrequency signal, for modulating the amplitude of the envelope signal based on a variable voltage setpoint and for generating the amplitude-modulated bias current based on the modulated envelope signal.
摘要翻译：射频信号功率放大电路可以包括用于接收射频信号的信号输入，耦合到信号输入并具有至少一个功率晶体管的放大级，用于将偏置电压传送到放大级的偏置级，以及处理级。处理阶段可以包括耦合到信号输入的处理输入，用于将至少以幅度调制的偏置电流传送到偏置级的处理输出以及耦合在处理输入和处理输出之间的幅度调制器，并被配置为确定信号代表射频信号的包络线，用于基于可变电压设定点调制包络信号的幅度，并且用于基于经调制的包络信号产生幅度调制的偏置电流。

4. 发明申请

US20100060386A1 BULK ACOUSTIC WAVE RESONATOR WITH ADJUSTABLE RESONANCE FREQUENCY AND USE OF SUCH A RESONATOR IN THE FIELD OF TELEPHONY 有权
标题翻译：具有可调谐共振频率的大容量声波谐振器和在电话领域中使用这种谐振器
公开(公告)号：US20100060386A1
公开(公告)日：2010-03-11
申请号：US12523299
申请日：2008-01-15
申请人： Didier Belot , Andrea Cathelin , Yann Deval , Moustapha El Hassan , Eric Kerherve , Alexandre Shirakawa
发明人： Didier Belot , Andrea Cathelin , Yann Deval , Moustapha El Hassan , Eric Kerherve , Alexandre Shirakawa
IPC分类号： H03H9/17
CPC分类号： H03H9/172 , H03H9/0547 , H03H2003/0428 , H03H2009/02181 , H03H2009/241
摘要： A bulk acoustic wave resonator has an adjustable resonance frequency. A piezoelectric element is provided having first and second electrodes. A switching element is provided in the form of a MEMS structure which is deformable between a first and second position. The switching element forms an additional electrode that is selectively disposed on top of, and in contact with, one of the first and second electrodes. This causes a total thickness of the electrode of the resonator to be changed resulting in a modification of the resonance frequency of the resonator.
摘要翻译：体声波谐振器具有可调节的共振频率。提供具有第一和第二电极的压电元件。开关元件以MEMS结构的形式提供，其可在第一和第二位置之间变形。开关元件形成附加电极，其被选择性地设置在第一和第二电极中的一个的顶部并与之接触。这导致谐振器的电极的总厚度变化，导致谐振器的谐振频率的改变。

5. 发明授权

US08115547B2 Reconfigurable power amplifier and use of such amplifier for making a multi-standard amplification stage for mobile phone communications 有权
标题翻译：可重构功率放大器和这种放大器的使用，用于制作用于手机通信的多标准放大级
公开(公告)号：US08115547B2
公开(公告)日：2012-02-14
申请号：US12523367
申请日：2008-01-14
申请人： Didier Belot , Yann Deval , Eric Kerherve , Nathalie Deltimple , Pierre Jarry
发明人： Didier Belot , Yann Deval , Eric Kerherve , Nathalie Deltimple , Pierre Jarry
IPC分类号： H03G3/20
CPC分类号： H03F1/0266 , H03F1/565 , H03F3/19 , H03F3/217 , H03F3/68
摘要： A reconfigurable power amplifier includes at least one amplification circuit (E1, E2), and a circuit (6) for controlling the amplification circuit so as to adapt its operation according to an applied input signal (RFin). The circuit for controlling includes a circuit (4, 5) for modifying the compression point of the amplification circuit and for adapting the gain of the amplification circuit in such a manner as to increase the power added efficiency of the circuit for the modified compression point.
摘要翻译：可重构功率放大器包括至少一个放大电路（E1，E2）和用于控制放大电路以便根据所施加的输入信号（RFin）适应其操作的电路（6）。用于控制的电路包括用于修改放大电路的压缩点并用于调整放大电路的增益的电路（4,5），以增加用于修改的压缩点的电路的功率附加效率。

6. 发明申请

US20120001665A1 FRACTIONAL FREQUENCY DIVIDER 有权
标题翻译：分数分频器
公开(公告)号：US20120001665A1
公开(公告)日：2012-01-05
申请号：US13172491
申请日：2011-06-29
申请人： Nicolas Regimbal , Franck Badets , Yann Deval , Jean-Baptiste Begueret
发明人： Nicolas Regimbal , Franck Badets , Yann Deval , Jean-Baptiste Begueret
IPC分类号： H03K21/00
CPC分类号： H03K5/156 , H03K21/10 , H03K23/662 , H03K23/68
摘要： A fractional frequency divider including a frequency division unit for generating a reduced frequency timing signal having j pulses for every k pulses of an original timing signal, wherein j and k are each integers; and phase correction circuitry adapted to selectively shift each jth pulse of the reduced frequency timing signal by a first fixed time period.
摘要翻译：一种分数分频器，包括用于产生具有针对原始定时信号的每k个脉冲具有j个脉冲的降频定时信号的分频单元，其中j和k各自是整数; 以及相位校正电路，其适于选择性地将所述降频定时信号的第j个脉冲移位第一固定时间段。

7. 发明授权

US07787853B2 Method and device for the reduction of the DC component of a signal transposed into baseband, in particular in a receiver of the direct conversion type 有权
标题翻译：用于减少转置到基带的信号的DC分量的方法和装置，特别是在直接转换类型的接收机中
公开(公告)号：US07787853B2
公开(公告)日：2010-08-31
申请号：US11774021
申请日：2007-07-06
申请人： Didier Belot , Jean-Baptiste Begueret , Yann Deval , Hervé Lapuyade
发明人： Didier Belot , Jean-Baptiste Begueret , Yann Deval , Hervé Lapuyade
IPC分类号： H04B1/16
CPC分类号： H03D3/008 , H04B1/30
摘要： A method is for reducing a DC component of an input signal transposed into baseband and being generated by a first frequency transposition stage starting from an initial signal and from a transposition signal. The method includes amplifying the transposed input signal in a first amplifier. The first amplifier receives at a DC offset compensation input, a compensation signal extracted from an output signal of a second amplifier subjected to a compensation of a offset DC voltage of the second amplifier. The method also included alternating between receiving at an input of the second amplifier, a first auxiliary signal from an auto-transposition of a transposition signal in a second frequency transposition stage and a second auxiliary signal from a transposition of the initial signal in the second frequency transposition stage with the transposition signal.
摘要翻译：一种方法是减少转换成基带的输入信号的DC分量，并且由初始信号和转置信号开始由第一频率转置级产生。该方法包括在第一放大器中放大转置的输入信号。第一放大器在DC偏移补偿输入处接收从经过补偿第二放大器的偏移DC电压的第二放大器的输出信号提取的补偿信号。该方法还包括在第二放大器的输入处接收来自第二频率转置级中的转置信号的自动转置的第一辅助信号和来自第二频率中的初始信号的转置的第二辅助信号之间的交替转置阶段与转置信号。

8. 发明申请

US20090302959A1 SYNCHRONOUS DISTRIBUTED OSCILLATOR 审中-公开
标题翻译：同步分布式振荡器
公开(公告)号：US20090302959A1
公开(公告)日：2009-12-10
申请号：US12478554
申请日：2009-06-04
申请人： Didier Belot , Thierry Taris , Jean-Baptiste Begueret , Yann Deval , Julie Cassagne , Herve Lapuyade
发明人： Didier Belot , Thierry Taris , Jean-Baptiste Begueret , Yann Deval , Julie Cassagne , Herve Lapuyade
IPC分类号： H03B28/00
CPC分类号： H03B5/1847
摘要： A distributed oscillator includes an odd number of serially connected amplifying elements. An output of a last amplifying element is looped back to an input of a first amplifying element via a first transmission line. The oscillator oscillates at a first frequency f1. The oscillator further includes circuitry for injecting a control signal onto the input of the first amplifying element. The control signal has a second frequency f2 which is a sub-multiple of the first frequency f1.
摘要翻译：分布式振荡器包括奇数个串联的放大元件。最后的放大元件的输出经由第一传输线环回到第一放大元件的输入端。振荡器以第一频率f1振荡。振荡器还包括用于将控制信号注入到第一放大元件的输入上的电路。控制信号具有作为第一频率f1的子倍数的第二频率f2。

9. 发明申请

US20080299936A1 METHOD AND DEVICE FOR THE ANALOG PROCESSING OF A RADIO SIGNAL FOR A RADIO FREQUENCY RECEIVER 有权
标题翻译：用于无线电频率接收机的无线电信号的模拟处理的方法和装置
公开(公告)号：US20080299936A1
公开(公告)日：2008-12-04
申请号：US12130538
申请日：2008-05-30
申请人： Francois Rivet , Didier Belot , Yann Deval , Jean-Baptiste Begueret , Herve Lapuyade , Thierry Taris
发明人： Francois Rivet , Didier Belot , Yann Deval , Jean-Baptiste Begueret , Herve Lapuyade , Thierry Taris
IPC分类号： H04B1/16
CPC分类号： H04B1/28 , G11C27/024 , H04B1/0007
摘要： A device processes a received radio signal. Circuitry formulates voltage samples of the radio signal. Analog processing of those samples is performed. Then, digital processing is performed on the output of the analog processing. The circuitry for formulating voltage samples is configured to ensure a processing of the samples prior to the digital processing.
摘要翻译：设备处理接收到的无线电信号。电路制定无线电信号的电压采样。进行这些样品的模拟处理。然后，对模拟处理的输出进行数字处理。用于配置电压样本的电路被配置为确保在数字处理之前处理样品。

10. 发明授权

US07315214B2 Phase locked loop 有权
标题翻译：锁相环
公开(公告)号：US07315214B2
公开(公告)日：2008-01-01
申请号：US11400062
申请日：2006-04-07
申请人： Franck Badets , Didier Belot , Vincent Lagareste , Yann Deval , Pierre Melchior , Jean-Baptiste Begueret
发明人： Franck Badets , Didier Belot , Vincent Lagareste , Yann Deval , Pierre Melchior , Jean-Baptiste Begueret
IPC分类号： H03L7/00 , H03L7/07 , H03L7/087
CPC分类号： H03L7/093 , H03L7/087 , H03L7/0893 , H03L7/18 , H03L2207/06
摘要： A phase locked loop includes a controlled oscillator for delivering an output signal at a determined output frequency, and a variable frequency divider for converting the output signal into a signal at divided frequency. The PLL is termed composite in that it includes at least one first loop having a loop filter for generating a first control signal for the oscillator on the basis of the signal at divided frequency, and a second loop having a loop filter, different from the loop filter of the first loop, for generating, on the basis of the signal at divided frequency, a second signal for additional control of the oscillator. The loop filter of the first loop and the loop filter of the second loop have different respective cutoff frequencies. The passband of the first loop, can be adapted to ensure the convergence and the stability of the PLL, while the second loop can afford extra passband increasing the speed of adaptation of the PLL in case of modification of the value of a preset for the output frequency.
摘要翻译：锁相环包括用于以确定的输出频率输出输出信号的受控振荡器和用于将输出信号转换为分频的信号的可变分频器。 PLL被称为复合，因为它包括至少一个具有环路滤波器的第一环路，该环路滤波器基于分频频率的信号产生用于振荡器的第一控制信号，以及具有不同于环路的环路滤波器的第二环路滤波器，用于基于分频后的信号产生用于对振荡器进行附加控制的第二信号。第一回路的环路滤波器和第二回路的环路滤波器具有不同的各自的截止频率。第一个环路的通带可以适应于确保PLL的收敛和稳定性，而第二个环路可以提供额外的通带，在修改输出预置值的情况下可以提高PLL的自适应速度频率。

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