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1. 发明申请

US20080122025A1 ELECTRONIC DEVICE INCLUDING A CONDUCTIVE STRUCTURE EXTENDING THROUGH A BURIED INSULATING LAYER 有权
标题翻译：电子设备，包括通过绝缘绝缘层延伸的导电结构
公开(公告)号：US20080122025A1
公开(公告)日：2008-05-29
申请号：US11556576
申请日：2006-11-03
申请人： Todd C. Roggenbauer , Vishnu K. Khemka , Ronghua Zhu , Amitava Bose , Paul Hui , Xiaoqiu Huang
发明人： Todd C. Roggenbauer , Vishnu K. Khemka , Ronghua Zhu , Amitava Bose , Paul Hui , Xiaoqiu Huang
IPC分类号： H01L27/00
CPC分类号： H01L27/105 , H01L21/76264 , H01L21/84 , H01L27/1203 , H01L27/13
摘要： An electronic device can include a substrate, a buried insulating layer overlying the substrate, and a semiconductor layer overlying the buried insulating layer, wherein the semiconductor layer is substantially monocrystalline. The electronic device can also include a conductive structure extending through the semiconductor layer and buried insulating layer and abutting the substrate, and an insulating spacer lying between the conductive structure and each of the semiconductor layer and the buried insulating layer.
摘要翻译：电子器件可以包括衬底，覆盖衬底的掩埋绝缘层和覆盖掩埋绝缘层的半导体层，其中半导体层基本上是单晶的。电子器件还可以包括延伸穿过半导体层和掩埋绝缘层并邻接衬底的导电结构，以及位于导电结构与半导体层和埋入绝缘层中的每一个之间的绝缘衬垫。

2. 发明授权

US07645651B2 LDMOS with channel stress 有权
标题翻译： LDMOS具有通道压力
公开(公告)号：US07645651B2
公开(公告)日：2010-01-12
申请号：US11951702
申请日：2007-12-06
申请人： Xiaoqiu Huang , Veeraraghavan Dhandapani , Bich-Yen Nguyen , Amanda M. Kroll , Daniel T. Pham
发明人： Xiaoqiu Huang , Veeraraghavan Dhandapani , Bich-Yen Nguyen , Amanda M. Kroll , Daniel T. Pham
IPC分类号： H01L21/00 , H01L21/84 , H01L21/337 , H01L21/8238 , H01L21/8236 , H01L21/336
CPC分类号： H01L29/7835 , H01L29/1054 , H01L29/161 , H01L29/165 , H01L29/66659 , H01L29/7781
摘要： A method of forming a metal oxide semiconductor (MOS) device comprises defining an active area in an unstrained semiconductor layer structure, depositing a hard mask overlying the active area and a region outside of the active area, patterning the hard mask to expose the active area, selectively growing a strained semiconductor layer overlying the exposed active area, and forming a remainder of the MOS device. The active area includes a first doped region of first conductivity type and a second doped region of second conductivity type. The strained semiconductor layer provides a biaxially strained channel for the MOS device. During a portion of forming the remainder of the MOS device, dopant of the first conductivity type of the first doped region of the active area and dopant of the second conductivity type of the second doped region of the active area diffuses into overlying portions of the strained semiconductor layer to create a correspondingly doped strained semiconductor layer, thereby providing corresponding doping for the biaxially strained channel.
摘要翻译：一种形成金属氧化物半导体（MOS）器件的方法包括：在非限制性半导体层结构中限定有源区，沉积覆盖有源区的硬掩模和有源区外的区域，使硬掩模图形化以暴露有源区选择性地生长覆盖暴露的有源区的应变半导体层，以及形成MOS器件的其余部分。有源区包括第一导电类型的第一掺杂区和第二导电类型的第二掺杂区。应变半导体层为MOS器件提供双向应变通道。在形成MOS器件的其余部分的部分期间，有源区的第一掺杂区的第一导电类型的掺杂剂和有源区的第二掺杂区的第二导电类型的掺杂剂扩散到应变的上覆部分以产生相应掺杂的应变半导体层，从而为双轴应变通道提供相应的掺杂。

3. 发明授权

US08188543B2 Electronic device including a conductive structure extending through a buried insulating layer 有权
标题翻译：电子器件包括延伸穿过掩埋绝缘层的导电结构
公开(公告)号：US08188543B2
公开(公告)日：2012-05-29
申请号：US11556576
申请日：2006-11-03
申请人： Todd C. Roggenbauer , Vishnu K. Khemka , Ronghua Zhu , Amitava Bose , Paul Hui , Xiaoqiu Huang
发明人： Todd C. Roggenbauer , Vishnu K. Khemka , Ronghua Zhu , Amitava Bose , Paul Hui , Xiaoqiu Huang
IPC分类号： H01L27/01
CPC分类号： H01L27/105 , H01L21/76264 , H01L21/84 , H01L27/1203 , H01L27/13
摘要： An electronic device can include a substrate, a buried insulating layer overlying the substrate, and a semiconductor layer overlying the buried insulating layer, wherein the semiconductor layer is substantially monocrystalline. The electronic device can also include a conductive structure extending through the semiconductor layer and buried insulating layer and abutting the substrate, and an insulating spacer lying between the conductive structure and each of the semiconductor layer and the buried insulating layer.
摘要翻译：电子器件可以包括衬底，覆盖衬底的掩埋绝缘层和覆盖掩埋绝缘层的半导体层，其中半导体层基本上是单晶的。电子器件还可以包括延伸穿过半导体层和掩埋绝缘层并邻接衬底的导电结构，以及位于导电结构与半导体层和埋入绝缘层中的每一个之间的绝缘衬垫。

4. 发明申请

US20080124889A1 PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A CONDUCTIVE STRUCTURE EXTENDING THROUGH A BURIED INSULATING LAYER 有权
标题翻译：形成电子器件的方法，包括通过绝缘绝缘层延伸的导电结构
公开(公告)号：US20080124889A1
公开(公告)日：2008-05-29
申请号：US11556544
申请日：2006-11-03
申请人： Todd C. ROGGENBAUER , Vishnu K. KHEMKA , Ronghua ZHU , Amitava BOSE , Paul HUI , Xiaoqiu HUANG , Van WONG
发明人： Todd C. ROGGENBAUER , Vishnu K. KHEMKA , Ronghua ZHU , Amitava BOSE , Paul HUI , Xiaoqiu HUANG , Van WONG
IPC分类号： H01L21/76
CPC分类号： H01L21/84 , H01L21/823481 , H01L21/823878 , H01L27/0617 , H01L27/08 , H01L27/088 , H01L27/1203
摘要： A process of forming an electronic device can include providing a semiconductor-on-insulator substrate including a substrate, a first semiconductor layer, and a buried insulating layer lying between the first semiconductor layer and the substrate. The process can also include forming a field isolation region within the semiconductor layer, and forming an opening extending through the semiconductor layer and the buried insulating layer to expose the substrate. The process can further include forming a conductive structure within the opening, wherein the conductive structure abuts the substrate.
摘要翻译：形成电子器件的工艺可以包括提供绝缘体上半导体衬底，其包括位于第一半导体层和衬底之间的衬底，第一半导体层和掩埋绝缘层。该工艺还可以包括在半导体层内形成场隔离区域，以及形成延伸穿过半导体层和掩埋绝缘层的开口以露出衬底。该方法还可以包括在开口内形成导电结构，其中导电结构邻接衬底。

5. 发明公开

US20240374914A1 INTELLIGENT PHOTO-BIOLOGICAL TREATMENT DEVICE FOR EYES AND EYE TRAINING METHOD 审中-公开
公开(公告)号：US20240374914A1
公开(公告)日：2024-11-14
申请号：US18270502
申请日：2023-04-11
申请人： Xiaoqiu HUANG
发明人： Xiaoqiu HUANG
IPC分类号： A61N5/06 , A61M21/00
CPC分类号： A61N5/0613 , A61M21/00 , A61M2021/0027 , A61N2005/063 , A61N2005/0648 , A61N2005/0651 , A61N2005/0659 , A61N2005/0666
摘要： The present disclosure provides an intelligent photo-biological treatment device for eyes and eye training method. The intelligent photo-biological treatment device for eyes includes a device body, where the device body includes a first cover and a second cover; a side of each of the first cover and the second cover facing a human eye is provided with a first cavity and a second cavity; the first cavity is provided therein with an infrared emission module; the second cavity is provided therein with a photo-biological training room; an assembly groove of a rubber-iron element of the infrared emission module is provided therein with a reflective film, a light guide plate, a diffusive film, a lower brightness enhancement film, an upper brightness enhancement film, and a black-black double-sided tape in order from bottom to top; an infrared light-emitting diode (LED) point light source is located at one side of the light guide plate; the infrared LED point light source is configured to emit 600-750 nm infrared light; and the device body is provided therein with a controller electrically connected with the infrared LED point light source. The present disclosure can stimulate cone and rod cells in the retinas of human eyes to improve the uncorrected visual acuity (UCVA). The present disclosure allows the human eyes to observe different colored light environments created by the treatment device for a long time so as to relax ciliary muscles, ensuring normal refractive adjustment of the human eyes.

6. 发明申请

US20210272652A1 Method of finding structural variants for identifying and differentiating species, strains and cells in normal and pathological conditions 有权
公开(公告)号：US20210272652A1
公开(公告)日：2021-09-02
申请号：US16805783
申请日：2020-03-01
申请人： Xiaoqiu Huang
发明人： Xiaoqiu Huang
IPC分类号： G16B30/10 , G16B20/20
摘要： Large whole-genome datasets of short reads from species and strains in normal and pathological conditions are processed to find species-, strain- and condition-specific structural variants along with their estimated genome-wide copy numbers. These structural variants provide huge pools of genetic targets with molecular approaches to accurate & fast detection and identification of eukaryotic pathogens such as fungal pathogens and to precise diagnosis and accurate assessment of clinical conditions such as cancer, dementia, Parkinson's disease, Asperger's syndrome.

7. 发明授权

US07820519B2 Process of forming an electronic device including a conductive structure extending through a buried insulating layer 有权
标题翻译：形成包括延伸穿过掩埋绝缘层的导电结构的电子器件的工艺
公开(公告)号：US07820519B2
公开(公告)日：2010-10-26
申请号：US11556544
申请日：2006-11-03
申请人： Todd C. Roggenbauer , Vishnu K. Khemka , Ronghua Zhu , Amitava Bose , Paul Hui , Xiaoqiu Huang , Van Wong
发明人： Todd C. Roggenbauer , Vishnu K. Khemka , Ronghua Zhu , Amitava Bose , Paul Hui , Xiaoqiu Huang , Van Wong
IPC分类号： H01L21/331
CPC分类号： H01L21/84 , H01L21/823481 , H01L21/823878 , H01L27/0617 , H01L27/08 , H01L27/088 , H01L27/1203
摘要： A process of forming an electronic device can include providing a semiconductor-on-insulator substrate including a substrate, a first semiconductor layer, and a buried insulating layer lying between the first semiconductor layer and the substrate. The process can also include forming a field isolation region within the semiconductor layer, and forming an opening extending through the semiconductor layer and the buried insulating layer to expose the substrate. The process can further include forming a conductive structure within the opening, wherein the conductive structure abuts the substrate.
摘要翻译：形成电子器件的工艺可以包括提供绝缘体上半导体衬底，其包括位于第一半导体层和衬底之间的衬底，第一半导体层和掩埋绝缘层。该工艺还可以包括在半导体层内形成场隔离区域，以及形成延伸穿过半导体层和掩埋绝缘层的开口以露出衬底。该方法还可以包括在开口内形成导电结构，其中导电结构邻接衬底。

8. 发明申请

US20090146180A1 LDMOS WITH CHANNEL STRESS 有权
标题翻译： LDMOS与通道应力
公开(公告)号：US20090146180A1
公开(公告)日：2009-06-11
申请号：US11951702
申请日：2007-12-06
申请人： Xiaoqiu Huang , Veeraraghavan Dhandapani , Bich-Yen Nguyen , Amanda M. Kroll , Daniel T. Pham
发明人： Xiaoqiu Huang , Veeraraghavan Dhandapani , Bich-Yen Nguyen , Amanda M. Kroll , Daniel T. Pham
IPC分类号： H01L29/778 , H01L21/336
CPC分类号： H01L29/7835 , H01L29/1054 , H01L29/161 , H01L29/165 , H01L29/66659 , H01L29/7781
摘要： A method of forming a metal oxide semiconductor (MOS) device comprises defining an active area in an unstrained semiconductor layer structure, depositing a hard mask overlying the active area and a region outside of the active area, patterning the hard mask to expose the active area, selectively growing a strained semiconductor layer overlying the exposed active area, and forming a remainder of the MOS device. The active area includes a first doped region of first conductivity type and a second doped region of second conductivity type. The strained semiconductor layer provides a biaxially strained channel for the MOS device. During a portion of forming the remainder of the MOS device, dopant of the first conductivity type of the first doped region of the active area and dopant of the second conductivity type of the second doped region of the active area diffuses into overlying portions of the strained semiconductor layer to create a correspondingly doped strained semiconductor layer, thereby providing corresponding doping for the biaxially strained channel.
摘要翻译：一种形成金属氧化物半导体（MOS）器件的方法包括：在非限制性半导体层结构中限定有源区，沉积覆盖有源区的硬掩模和有源区外的区域，使硬掩模图形化以暴露有源区选择性地生长覆盖暴露的有源区的应变半导体层，以及形成MOS器件的其余部分。有源区包括第一导电类型的第一掺杂区和第二导电类型的第二掺杂区。应变半导体层为MOS器件提供双向应变通道。在形成MOS器件的其余部分的部分期间，有源区的第一掺杂区的第一导电类型的掺杂剂和有源区的第二掺杂区的第二导电类型的掺杂剂扩散到应变的上覆部分以产生相应掺杂的应变半导体层，从而为双轴应变通道提供相应的掺杂。

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