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    • 2. 发明授权
    • Region search for delay routing and signal net matching
    • 区域搜索延迟路由和信号网匹配
    • US5550748A
    • 1996-08-27
    • US216157
    • 1994-03-22
    • Xiao-Ming Xiong
    • Xiao-Ming Xiong
    • G06F17/50
    • G06F17/5077
    • A system and method performs signal net matching during delay routing. The delay router employs a region search for placing pseudo pins in a search region that will satisfy specified time delay constraints for a given signal net. The search region is an octagonal region defined by Manhattan detour lengths using derived wire length constraints as applied to a bounding box for the signal net. Any sequential router can be used to search the search region for free points. A first search phase finds delay paths to all free points in the search region from an arbitrary source pin. A second search phase then searches the search region for delay paths connecting a sink pin to one of the free points. Any delay path that connects the source and sink pin through a free point in the search region satisfies the time delay constraints. Dynamical routing can be implemented during the search phases as needed. Once all the signal nets have been routed, a group of signal nets to be matched is rerouted with the search region defined by the length of the longest routed path in the group. This ensures that all the signal nets in the group meet the specified time delay constraint.
    • 系统和方法在延迟路由期间执行信号网匹配。 延迟路由器使用区域搜索将伪引脚放置在搜索区域中,该搜索区域将满足给定信号网络的规定的时间延迟约束。 搜索区域是由曼哈顿绕道长度使用衍射线长度约束定义的八角形区域,其应用于信号网络的边界框。 任何顺序路由器都可用于搜索搜索区域的自由点。 第一个搜索阶段从任意的源引脚找到搜索区域中所有空闲点的延迟路径。 第二搜索阶段然后在搜索区域中搜索将宿针连接到自由点之一的延迟路径。 通过搜索区域中的自由点连接源极和引脚引脚的任何延迟路径都满足时间延迟约束。 动态路由可以根据需要在搜索阶段实现。 一旦所有信号网络被路由,将要匹配的一组信号网络与由组中最长路由路径的长度定义的搜索区域重新路由。 这确保组中的所有信号网满足指定的时间延迟约束。
    • 3. 发明授权
    • Design-for-test-aware hierarchical design planning
    • 设计为测试感知层次设计规划
    • US07937677B2
    • 2011-05-03
    • US12123209
    • 2008-05-19
    • Hung-Chun ChienBen MathewPadmashree TakkarsBang LiuChang-Wei TaiXiao-Ming XiongGary K. Yeap
    • Hung-Chun ChienBen MathewPadmashree TakkarsBang LiuChang-Wei TaiXiao-Ming XiongGary K. Yeap
    • G06F17/50
    • G06F17/505G06F2217/14
    • Full-chip scan data can be advantageously used during design planning to minimize top-level scan wires and scan feedthroughs. The scan cells can be reordered using a modified cost function to promote connecting all scan cells in one plan group before crossing to a scan cell in another plan group. The modified cost function can take into account penalty parameters. The penalty parameters can include at least one of: membership in a plan group or a top-level physical hierarchy, size of a plan group, FLOATING/ORDERED scan element in scan data, location of endpoints of an ORDERED list, location of endpoints of a macro, and membership in a plan group containing a STOP point. Scan data, at the block-level and at the top-level, can be automatically updated to reflect the plan groups and optimized scan chains.
    • 在设计规划期间可以有利地使用全片扫描数据,以最小化顶层扫描线和扫描馈通。 扫描单元可以使用修改的成本函数重新排序,以促进连接一个计划组中的所有扫描单元,然后再与另一个计划组中的扫描单元交叉。 修改的成本函数可以考虑惩罚参数。 惩罚参数可以包括以下中的至少一个:计划组或顶层物理层次结构中的成员身份,计划组的大小,扫描数据中的FLOATING / ORDERED扫描元素,ORDERED列表的端点的位置, 宏,以及包含STOP点的计划组中的成员资格。 可以自动更新块级和顶级的扫描数据,以反映计划组和优化的扫描链。