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    • 2. 发明授权
    • Method and apparatus for low pressure chemical vapor deposition
    • 低压化学气相沉积的方法和装置
    • US4619844A
    • 1986-10-28
    • US693401
    • 1985-01-22
    • John M. PierceWilliam I. Lehrer
    • John M. PierceWilliam I. Lehrer
    • C23C16/44C23C16/448C23C16/455C23C16/00B05C11/00
    • C23C16/4485
    • A method of introducing a controlled flow of vapor from a high pressure sublimation chamber into a low pressure vapor deposition reactor, said vapor being derived from solid source material preferably, but not necessarily, having a vapor pressure above about one (1) Torr at a temperature not exceeding about 350.degree. C. The method comprises controllably heating the source material to a temperature sufficient to produce vapor therefrom at a desired pressure, and then controllably transferring the vapor through vapor transmission means to the vapor deposition reactor. During such transfer, the transmission means is maintained at a temperature sufficient to prevent condensation of the vapor therein during transfer. The vapor is delivered to the reactor in a pure state and is not mixed with any carrier medium.
    • 将受控的蒸汽流从高压升华室引入低压气相沉积反应器的方法,所述蒸汽源自固体源材料,优选但不一定具有高于约一(1)乇的蒸气压, 温度不超过约350℃。该方法包括可控地将源材料加热到足以在所需压力下产生蒸汽的温度,然后通过蒸气传输装置将蒸汽可控地转移到气相沉积反应器。 在这种转移期间,传动装置保持在足以防止在传送期间蒸气冷凝的温度。 蒸汽以纯的状态输送到反应器中,并且不与任何载体介质混合。
    • 8. 发明授权
    • Method of forming a dielectric layer on a semiconductor device
    • 在半导体器件上形成电介质层的方法
    • US4619839A
    • 1986-10-28
    • US680878
    • 1984-12-12
    • William I. Lehrer
    • William I. Lehrer
    • H01L21/316H01L21/768
    • H01L21/316H01L21/76819
    • A method for forming a substantially planar inorganic dielectric layer over a predetermined pattern of electrical interconnects comprises the steps of reacting phosphoric acid and a trivalent metallic halide compound with an aliphatic solvent to form a coating fluid. The coating fluid is then spun onto the semiconductor device to form a layer over the electrical interconnect. The resultant device is then baked at a first temperature to drive off the solvent and then baked at a second, higher temperature, in order to promote the glass forming reaction. This process is repeated as required to form a coating layer having a thickness which exhibits levelling characteristics of such high quality that fine topography can be carried out on succeeding layers of metal in order to form additional interconnect layers with precision.
    • 在预定的电互连图案上形成基本平面的无机介电层的方法包括使磷酸和三价金属卤化物与脂肪族溶剂反应形成涂布液的步骤。 然后将涂布液旋转到半导体器件上以在电互连上形成层。 然后将所得装置在第一温度下烘烤以驱除溶剂,然后在第二个较高温度下烘烤,以促进玻璃形成反应。 根据需要重复该过程以形成具有如下高质量的平整特性的涂层的涂层,从而可以在后续的金属层上进行精细的形貌,以便精确地形成附加的互连层。
    • 10. 发明授权
    • Formation of patterned film over semiconductor structure
    • 半导体结构上的图案化膜的形成
    • US4420365A
    • 1983-12-13
    • US474866
    • 1983-03-14
    • William I. Lehrer
    • William I. Lehrer
    • H01L21/027H01L21/288H01L21/311H05K3/00H05K3/18B44C1/22C03C15/00C03C25/06
    • H05K3/184H01L21/0272H01L21/288H01L21/31144H05K3/0017Y10S438/903
    • A novel process is disclosed for the selective etching of a protective layer over a substrate according to a predetermined pattern, which does not involve the use of chemical vapor deposition or vacuum techniques. The process incorporates the techniques of electroless metal deposition after first applying a mask which is positive with respect to the predetermined pattern. In alternative embodiments, the application to the masked protective layer of an agent catalytic to the reception of electroless metal deposition is followed by either immersion in an electroless plating bath and subsequent mask removal, or by mask removal and subsequent immersion in the electroless plating bath. In either embodiment, the protective layer is effectively masked and patterned for plasma etching. The process is useful in forming openings in the protective layer to permit selective doping of the underlying substrate.
    • 公开了一种根据不涉及使用化学气相沉积或真空技术的预定图案在衬底上选择性地蚀刻保护层的新方法。 该方法在首先施加相对于预定图案为正的掩模之后,结合无电金属沉积技术。 在替代实施例中,对接触化学镀金属沉积的催化剂的掩蔽保护层的应用之后是浸入无电解镀浴中并随后进行掩模去除,或通过掩模去除并随后浸入化学镀浴中。 在任一实施例中,对于等离子体蚀刻,保护层被有效地掩蔽和图案化。 该方法可用于在保护层中形成开口以允许选择性掺杂下面的衬底。