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    • 1. 发明授权
    • Device performance enhancement
    • 设备性能提升
    • US09142630B2
    • 2015-09-22
    • US13557479
    • 2012-07-25
    • Chang-Yu WuChih-Chiang ChangShang-Chih HsiehWei-Chih Hsieh
    • Chang-Yu WuChih-Chiang ChangShang-Chih HsiehWei-Chih Hsieh
    • H01L21/28H01L29/423H01L29/78
    • H01L29/4238H01L21/28123H01L29/78
    • Among other things, one or more techniques for enhancing device (e.g., transistor) performance are provided herein. In one embodiment, device performance is enhanced by forming an extended dummy region at an edge of a region of a device and forming an active region at a non-edge of the region. Limitations associated with semiconductor fabrication processing present in the extended dummy region more so than in non-edge regions. Accordingly, a device exhibiting enhanced performance is formed by connecting a gate to the active region, where the active region has a desired profile because it is comprised within a non-edge of the region. A dummy device (e.g., that may be less responsive) may be formed to include the extended dummy region, where the extended dummy region has a less than desired profile due to limitations associated with semiconductor fabrication processing, for example.
    • 除此之外,本文提供了用于增强器件(例如,晶体管)性能的一种或多种技术。 在一个实施例中,通过在器件的区域的边缘处形成延伸的虚拟区域并在该区域的非边缘处形成有源区域来增强器件性能。 与非边缘区域相比,扩展虚拟区域中存在与半导体制造处理相关的限制。 因此,通过将栅极连接到有源区域来形成表现出增强的性能的器件,其中有源区域具有期望的形状,因为它包括在该区域的非边缘内。 例如,由于与半导体制造处理相关的限制,可以形成虚拟设备(例如,可能较不响应的)以包括扩展的虚拟区域,其中扩展的虚拟区域具有小于期望的轮廓。
    • 2. 发明申请
    • DEVICE PERFORMANCE ENHANCEMENT
    • 设备性能提升
    • US20140027821A1
    • 2014-01-30
    • US13557479
    • 2012-07-25
    • Chang-Yu WuChih-Chiang ChangShang-Chih HsiehWei-Chih Hsieh
    • Chang-Yu WuChih-Chiang ChangShang-Chih HsiehWei-Chih Hsieh
    • H01L21/28H01L29/78
    • H01L29/4238H01L21/28123H01L29/78
    • Among other things, one or more techniques for enhancing device (e.g., transistor) performance are provided herein. In one embodiment, device performance is enhanced by forming an extended dummy region at an edge of a region of a device and forming an active region at a non-edge of the region. Limitations associated with semiconductor fabrication processing present in the extended dummy region more so than in non-edge regions. Accordingly, a device exhibiting enhanced performance is formed by connecting a gate to the active region, where the active region has a desired profile because it is comprised within a non-edge of the region. A dummy device (e.g., that may be less responsive) may be formed to include the extended dummy region, where the extended dummy region has a less than desired profile due to limitations associated with semiconductor fabrication processing, for example.
    • 除此之外,本文提供了用于增强器件(例如,晶体管)性能的一种或多种技术。 在一个实施例中,通过在器件的区域的边缘处形成延伸的虚拟区域并在该区域的非边缘处形成有源区域来增强器件性能。 与非边缘区域相比,扩展虚拟区域中存在与半导体制造处理相关的限制。 因此,通过将栅极连接到有源区域来形成表现出增强的性能的器件,其中有源区域具有期望的形状,因为它被包括在该区域的非边缘内。 例如,由于与半导体制造处理相关的限制,可以形成虚拟设备(例如,可能较不响应的)以包括扩展的虚拟区域,其中扩展的虚拟区域具有小于期望的轮廓。
    • 3. 发明授权
    • Meta-hardened flip-flop
    • 元硬化触发器
    • US08514000B1
    • 2013-08-20
    • US13562539
    • 2012-07-31
    • Wei-Chih HsiehShang-Chih HsiehChih-Chiang Chang
    • Wei-Chih HsiehShang-Chih HsiehChih-Chiang Chang
    • H03K3/00
    • H03K3/0375H03K3/356156
    • Some embodiments relate to a flip-flop having a data input terminal, a data output terminal and a clock terminal. The flip-flop includes a master latch, a slave latch, and an isolation element coupled between the master latch output and slave latch. The isolation element is arranged to isolate capacitive loading seen by the output of the master latch that comes from the slave latch. In some embodiments, the master latch includes one or more drive enhancement elements on its feedforward and feedback paths. The slave latch can also include one or more drive enhancement elements on its feedforward and feedback paths. These drive enhancement elements, particularly in combination with the isolation element, may help to reduce the setup and hold times and enhance meta-stability resistance of the flip-flop relative to conventional implementations. Other embodiments are also disclosed.
    • 一些实施例涉及具有数据输入端,数据输出端和时钟端的触发器。 触发器包括主锁存器,从锁存器和耦合在主锁存器输出和从锁存器之间的隔离元件。 隔离元件被布置成隔离来自从锁存器的主锁存器的输出所看到的电容性负载。 在一些实施例中,主锁存器在其前馈和反馈路径上包括一个或多个驱动增强元件。 从锁存器还可以在其前馈和反馈路径上包括一个或多个驱动增强元件。 这些驱动增强元件,特别是与隔离元件组合,可以有助于减小建立和保持时间,并且增强触发器相对于传统实现方式的元稳定性。 还公开了其他实施例。
    • 6. 发明申请
    • SELF-AWARE ADAPTIVE POWER CONTROL SYSTEM AND A METHOD FOR DETERMINING THE CIRCUIT STATE
    • 自适应功率控制系统和确定电路状态的方法
    • US20090158073A1
    • 2009-06-18
    • US11971480
    • 2008-01-09
    • Wei-Chih HSIEHWei Hwang
    • Wei-Chih HSIEHWei Hwang
    • G06F11/30
    • H03K19/0016
    • The present invention provides a self-aware power control system and a method for determining the circuit state. The self-aware adaptive power control architecture comprises of a multi-mode power gating network, a current monitoring translator, a variable threshold comparator, a slack detector, and a bi-directional shift register. The multi-mode power gating network controls the amount of supply current and hence the circuit speed. The power gating network can be composed of either N-type MOSFETs for virtual ground insertion or P-type MOSFETs for virtual supply insertion. The number of MOSFETs in the multi-mode power gating network can be configured according to the supply range and step difference of the supply current. Then, by monitoring the current characteristics drained by target circuit, the circuit state can be determined. No delay matching circuit is required. Together with other peripherals, the supply current can be down controlled to a minimum acceptable level. The circuit will use up all available slack. The smaller current implies lower power consumption as well. Furthermore, the present invention is capable of self adaptation to frequency change. To summarize, the present invention can make the circuit consume least power under various frequency achieving best power efficiency.
    • 本发明提供一种用于确定电路状态的自感知功率控制系统和方法。 自感知自适应功率控制架构包括多模电源门控网络,电流监视转换器,可变阈值比较器,松弛检测器和双向移位寄存器。 多模电源门控网络控制电源电流量,从而控制电路速度。 电源门控网络可以由用于虚拟接地插入的N型MOSFET或用于虚拟电源插入的P型MOSFET组成。 多模电源门控网络中的MOSFET数量可以根据电源电流的供电范围和阶差进行配置。 然后,通过监视由目标电路排出的电流特性,可以确定电路状态。 不需要延迟匹配电路。 与其他外围设备一起,电源电流可以下调至最低可接受水平。 电路将耗尽所有可用的松弛。 较小的电流也意味着较低的功耗。 此外,本发明能够对频率变化进行自适应。 总而言之,本发明可以使电路在各种频率下消耗最小功率,实现最佳功率效率。
    • 7. 发明授权
    • Fully-on-chip temperature, process, and voltage sensor system
    • 全面的温度,过程和电压传感器系统
    • US08419274B2
    • 2013-04-16
    • US12910199
    • 2010-10-22
    • Shi-Wen ChenMing-Hung ChangWei-Chih HsiehWei Hwang
    • Shi-Wen ChenMing-Hung ChangWei-Chih HsiehWei Hwang
    • G01K7/00
    • G01K7/01G01K2219/00
    • A fully on-chip temperature, process, and voltage sensor includes a voltage sensor, a process sensor and a temperature sensor. The temperature sensor includes a bias current generator, a ring oscillator, a fixed pulse generator, an AND gate, and a first counter. The bias current generator generates an output current related to temperature according to the operating voltage of chip. The ring oscillator generates an oscillation signal according to the output current. The fixed pulse generator generates a fixed pulse signal. The AND gate is connected to the ring oscillator and the fixed pulse generator for performing a logic AND operation on the oscillation signal and the fixed pulse signal, and generating a temperature sensor signal.
    • 完全片上的温度,过程和电压传感器包括电压传感器,过程传感器和温度传感器。 温度传感器包括偏置电流发生器,环形振荡器,固定脉冲发生器,与门和第一计数器。 偏置电流发生器根据芯片的工作电压产生与温度相关的输出电流。 环形振荡器根据输出电流产生振荡信号。 固定脉冲发生器产生固定的脉冲信号。 与门连接到环形振荡器和固定脉冲发生器,用于对振荡信号和固定脉冲信号进行逻辑与运算,并产生温度传感器信号。
    • 8. 发明申请
    • SOLAR POWER MANAGEMENT SYSTEM
    • 太阳能电源管理系统
    • US20110193515A1
    • 2011-08-11
    • US12832079
    • 2010-07-08
    • CHUN-YI WUWEI-CHIH HSIEHWEI HWANG
    • CHUN-YI WUWEI-CHIH HSIEHWEI HWANG
    • H02J7/00
    • H02J7/35H02M3/07Y02E10/566Y02E10/58Y10T307/707
    • A solar power management system is provided for managing electric energy conversion by a photovoltaic cell module, supplying the converted electric energy to an external load, and storing the converted electric energy in a battery. The solar power management system comprises a multiphase maximum power tracking (MPT) module, a charging circuit, and a voltage conversion module. The multiphase MPT module regulates output current of the photovoltaic cell module to output maximum power within the high limit thereof and obtain improved solar energy conversion efficiency. The voltage conversion module converts the electric energy generated by the photovoltaic cell module into different voltage formats, such as 5.6V DC, 1.0V DC, 0.6˜0.3V DC low voltage, or −1.2V DC negative voltage, to meet different external load requirements. The solar power management system has simple circuitry and can be configured as a system on chip (SoC) at reduced cost while provides very wide applications.
    • 提供了一种太阳能发电管理系统,用于通过光伏电池模块管理电能转换,将转换的电能提供给外部负载,并将转换的电能存储在电池中。 太阳能发电管理系统包括多相最大功率跟踪(MPT)模块,充电电路和电压转换模块。 多相MPT模块调节光伏电池模块的输出电流,以在其上限内输出最大功率,并获得改进的太阳能转换效率。 电压转换模块将光伏电池模块产生的电能转换成不同的电压格式,如5.6V DC,1.0V DC,0.6〜0.3V直流低电压或-1.2V直流负电压,以满足不同的外部负载 要求。 太阳能发电管理系统具有简单的电路,可以以低成本配置为片上系统(SoC),同时提供非常广泛的应用。
    • 9. 发明授权
    • Solar power management system
    • 太阳能发电管理系统
    • US08258741B2
    • 2012-09-04
    • US12832079
    • 2010-07-08
    • Chun-Yi WuWei-Chih HsiehWei Hwang
    • Chun-Yi WuWei-Chih HsiehWei Hwang
    • H01M10/46
    • H02J7/35H02M3/07Y02E10/566Y02E10/58Y10T307/707
    • A solar power management system is provided for managing electric energy conversion by a photovoltaic cell module, supplying the converted electric energy to an external load, and storing the converted electric energy in a battery. The solar power management system comprises a multiphase maximum power tracking (MPT) module, a charging circuit, and a voltage conversion module. The multiphase MPT module regulates output current of the photovoltaic cell module to output maximum power within the high limit thereof and obtain improved solar energy conversion efficiency. The voltage conversion module converts the electric energy generated by the photovoltaic cell module into different voltage formats, such as 5.6V DC, 1.0V DC, 0.6˜0.3V DC low voltage, or −1.2V DC negative voltage, to meet different external load requirements. The solar power management system has simple circuitry and can be configured as a system on chip (SoC) at reduced cost while provides very wide applications.
    • 提供了一种太阳能发电管理系统,用于通过光伏电池模块管理电能转换,将转换的电能提供给外部负载,并将转换的电能存储在电池中。 太阳能发电管理系统包括多相最大功率跟踪(MPT)模块,充电电路和电压转换模块。 多相MPT模块调节光伏电池模块的输出电流,以在其上限内输出最大功率,并获得改进的太阳能转换效率。 电压转换模块将光伏电池模块产生的电能转换成不同的电压格式,如5.6V DC,1.0V DC,0.6〜0.3V直流低电压或-1.2V直流负电压,以满足不同的外部负载 要求。 太阳能发电管理系统具有简单的电路,可以以低成本配置为片上系统(SoC),同时提供非常广泛的应用。