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1. 发明授权

US06438061B1 Dynamic random access memory with low power consumption 有权
公开(公告)号：US06438061B1
公开(公告)日：2002-08-20
申请号：US09907449
申请日：2001-07-18
申请人： Junichi Suyama , Wataru Nagai , Akihiro Hirota , Shota Ohtsubo
发明人： Junichi Suyama , Wataru Nagai , Akihiro Hirota , Shota Ohtsubo
IPC分类号： G11C700
CPC分类号： G11C11/4074 , G11C5/147
摘要： There provides a low power consumption type dynamic random access memory (DRAM) with reduced current consumption in the DRAM by a signal from outside and without causing occurrence of malfunction at times of low current consumption. An input circuit for receiving signals, a memory array for holding data, and a peripheral circuit for controlling the memory array are driven by an internal voltage supplied by two groups of internal voltage receiving circuits while an output circuit for outputting signals is driven by an external power supply. The two groups of internal voltage receiving circuits are deactivated in response to a power supply control signal CONT inputted from outside, and the output circuit is controlled so as to be in a high impedance condition with voltage of the external power supply being applied thereto.

2. 发明申请

US20100218646A1 PRODUCING METHOD OF DIRECT REDUCED IRON 有权
标题翻译：直接还原铁的生产方法
公开(公告)号：US20100218646A1
公开(公告)日：2010-09-02
申请号：US12682935
申请日：2008-10-16
申请人： Hiroki Gofuku , Yuki Kuwauchi , Wataru Nagai , Kazuhisa Fuxuda , Takashi Sawai
发明人： Hiroki Gofuku , Yuki Kuwauchi , Wataru Nagai , Kazuhisa Fuxuda , Takashi Sawai
IPC分类号： C22B5/18 , C22B1/14 , C22B7/00
CPC分类号： C22B7/02 , C21B13/0046 , C21B13/105 , C21B13/143 , C21C5/38 , C22B1/245 , C22B1/248 , C22B5/10 , Y02P10/216
摘要： A producing method of direct reduced iron includes the steps of: drying an oxidized iron raw material selected from a group including iron ore and iron-making dust generated in an iron-making process to have a predetermined moisture content; mixing the oxidized iron raw material subjected to the drying step and a reducing material having a predetermined moisture content to obtain a mixture; pulverizing the mixture obtained in the mixing step for 80% minus-sieve to have a particle diameter of 70 μm to 500 μm; kneading the mixture after the moisture content of the mixture subjected to the pulverizing step is adjusted; agglomerating the mixture subjected to the kneading step to be agglomerate; and reducing the agglomerate obtained in the agglomerating step by a rotary hearth furnace to generate direct reduced iron.
摘要翻译：直接还原铁的制造方法包括以下步骤：将选自铁矿石中的氧化铁原料和在制铁过程中产生的铁制粉尘干燥以具有预定的水分含量; 将经过干燥步骤的氧化铁原料和具有预定水分含量的还原材料混合，得到混合物; 将混合工序中得到的混合物粉碎80％的负筛子，使其粒径为70〜500μm，调整经过粉碎步骤的混合物的水分含量之后捏合该混合物; 使经过捏合步骤的混合物凝聚成团聚物; 并且通过旋转炉床炉减少在附聚步骤中获得的附聚物以产生直接还原铁。

3. 发明授权

US06791894B2 DRAM power-source controller that reduces current consumption during standby 有权
标题翻译： DRAM电源控制器，可在待机期间降低电流消耗
公开(公告)号：US06791894B2
公开(公告)日：2004-09-14
申请号：US10252102
申请日：2002-09-23
申请人： Wataru Nagai , Akihiro Hirota , Junichi Suyama
发明人： Wataru Nagai , Akihiro Hirota , Junichi Suyama
IPC分类号： G11C700
CPC分类号： G11C7/22 , G11C11/4074 , G11C2207/2227
摘要： A power-source controller for reducing current consumption while a DRAM is in standby, includes a mode detection circuit inverting a disable signal having an L-level under the enable state and having an H-level under the disable state; an internal-power-source driver circuit having first and second transistors; and an internal-power-source reference circuit setting first and second driver control signals respectively to L-level and H-level when an L-level disable signal is input to turn on the first transistor and turn off the second transistor, supplying an external-power-source voltage as an internal-power-source voltage, setting the first driver control signal to H-level when an H-level disable signal is input, controlling the level of the second driver control signal to turn off the second transistor and control the first transistor, and supplying an internal power-source voltage lower than the external-power-source voltage.
摘要翻译：一种用于在DRAM处于待机状态时降低电流消耗的电源控制器，包括模式检测电路，使具有在使能状态下具有L电平并且处于禁用状态的H电平的禁用信号反相; 具有第一和第二晶体管的内部电源驱动器电路; 以及内部电源参考电路，当输入L电平禁止信号时，将第一和第二驱动器控制信号分别设置为L电平和H电平，以接通第一晶体管并关断第二晶体管，提供外部电源电压作为内部电源电压，当输入H电平禁止信号时将第一驱动器控制信号设置为H电平，控制第二驱动器控制信号的电平以关闭第二晶体管，以及控制第一晶体管，并提供低于外部电源电压的内部电源电压。

4. 发明授权

US08182575B2 Producing method of direct reduced iron 有权
标题翻译：直接还原铁的生产方法
公开(公告)号：US08182575B2
公开(公告)日：2012-05-22
申请号：US12682935
申请日：2008-10-16
申请人： Hiroki Gofuku , Yuki Kuwauchi , Wataru Nagai , Kazuhisa Fukuda , Takashi Sawai
发明人： Hiroki Gofuku , Yuki Kuwauchi , Wataru Nagai , Kazuhisa Fukuda , Takashi Sawai
IPC分类号： C22B1/16 , C21B13/08
CPC分类号： C22B7/02 , C21B13/0046 , C21B13/105 , C21B13/143 , C21C5/38 , C22B1/245 , C22B1/248 , C22B5/10 , Y02P10/216
摘要： A producing method of direct reduced iron includes the steps of: drying an oxidized iron raw material selected from a group including iron ore and iron-making dust generated in an iron-making process to have a predetermined moisture content; mixing the oxidized iron raw material subjected to the drying step and a reducing material having a predetermined moisture content to obtain a mixture; pulverizing the mixture obtained in the mixing step for 80% minus-sieve to have a particle diameter of 70 μm to 500 μm; kneading the mixture after the moisture content of the mixture subjected to the pulverizing step is adjusted; agglomerating the mixture subjected to the kneading step to be agglomerate; and reducing the agglomerate obtained in the agglomerating step by a rotary hearth furnace to generate direct reduced iron.
摘要翻译：直接还原铁的制造方法包括以下步骤：将选自铁矿石中的氧化铁原料和在制铁过程中产生的铁制粉尘干燥以具有预定的水分含量; 将经过干燥步骤的氧化铁原料和具有预定水分含量的还原材料混合，得到混合物; 将混合工序中得到的混合物粉碎80％的负筛子，使其粒径为70〜500μm，调整经过粉碎步骤的混合物的水分含量之后捏合该混合物; 使经过捏合步骤的混合物凝聚成团聚物; 并且通过旋转炉床炉减少在附聚步骤中获得的附聚物以产生直接还原铁。

5. 发明授权

US06574150B2 Dynamic random access memory with low power consumption 有权
标题翻译：具有低功耗的动态随机存取存储器
公开(公告)号：US06574150B2
公开(公告)日：2003-06-03
申请号：US10175859
申请日：2002-06-21
申请人： Junichi Suyama , Wataru Nagai , Akihiro Hirota , Shota Ohtsubo
发明人： Junichi Suyama , Wataru Nagai , Akihiro Hirota , Shota Ohtsubo
IPC分类号： G11C700
CPC分类号： G11C11/4074 , G11C5/147
摘要： A low power consumption type dynamic random access memory (DRAM) operable with reduced current consumption responsive to an external signal, without causing occurrence of malfunction during low current consumption. An input circuit for receiving signals, a memory array for holding data, and a peripheral circuit for controlling the memory array are driven by an internal voltage supplied by two groups of internal voltage receiving circuits, while an output circuit for outputting signals is driven by an external power supply. The two groups of internal voltage receiving circuits are deactivated in response to an externally provided power supply control signal, and the output circuit is controlled so as to be in a high impedance condition with voltage of the external power supply being applied thereto.
摘要翻译：低功耗型动态随机存取存储器（DRAM），可以响应于外部信号而以可减小的电流消耗进行操作，而不会在低电流消耗期间发生故障。用于接收信号的输入电路，用于保持数据的存储器阵列和用于控制存储器阵列的外围电路由内部电压接收电路组提供的内部电压驱动，而用于输出信号的输出电路由外部电源。两组内部电压接收电路响应于外部提供的电源控制信号被去激活，并且输出电路被控制成在施加外部电源的电压的情况下处于高阻抗状态。

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