专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20100099233A1 METHOD FOR PRODUCING STACKED AND SELF-ALIGNED COMPONENTS ON A SUBSTRATE 有权
标题翻译：在衬底上生产堆叠和自对准组件的方法
公开(公告)号：US20100099233A1
公开(公告)日：2010-04-22
申请号：US12577379
申请日：2009-10-12
申请人： Romain Wacquez , Philippe Coronel , Vincent Destefanis , Jean-Michel Hartmann
发明人： Romain Wacquez , Philippe Coronel , Vincent Destefanis , Jean-Michel Hartmann
IPC分类号： H01L21/762
CPC分类号： H01L21/84 , H01L21/76264 , H01L21/8221
摘要： The invention relates to a method for producing stacked and self-aligned components on a substrate, comprising the following steps: forming a stack of layers on one face of the substrate, the stack comprising a first sacrificial layer, a second sacrificial layer and a superficial layer, selective etching of a zone of the first sacrificial layer, the second sacrificial layer and the superficial layer forming a bridge above the etched zone of the first sacrificial layer, depositing resin in the etched zone of the first sacrificial layer and on the superficial layer, lithography of the resin to leave remaining at least one zone of resin in the etched zone of the first sacrificial layer, in alignment with at least one resin zone on the superficial layer, replacing the eliminated resin in the etched zone of the first sacrificial layer and on the superficial layer with a material for confining the remaining resin, eliminating the remaining resin zones in the etched zone of the first sacrificial layer and on the superficial layer to provide zones dedicated to the production of components, forming elements of components in the dedicated zones, selective etching of a zone of the second sacrificial layer, the superficial layer forming a bridge above the etched zone of the second sacrificial layer.
摘要翻译：本发明涉及一种用于在衬底上制备堆叠和自对准部件的方法，包括以下步骤：在衬底的一个面上形成一叠层，所述堆叠包括第一牺牲层，第二牺牲层和表面层，选择性蚀刻第一牺牲层的区域，第二牺牲层和表层在第一牺牲层的蚀刻区上形成桥，在第一牺牲层的蚀刻区和表层上沉积树脂在所述第一牺牲层的所述蚀刻区中保留至少一个树脂区域，以与所述表面层上的至少一个树脂区域对准，替换所述第一牺牲层的所述蚀刻区域中被去除的树脂，并且在表面层上具有用于限制剩余树脂的材料，消除了第一次牺牲的蚀刻区域中剩余的树脂区域提供专用于生产部件的区域，在专用区域中形成部件的元件，选择性蚀刻第二牺牲层的区域，在第二蚀刻区域的蚀刻区域之上形成桥接的表面层牺牲层。

2. 发明授权

US08993418B2 Shallow heavily doped semiconductor layer by cyclic selective epitaxial deposition process 有权
标题翻译：通过循环选择性外延沉积工艺的浅重掺杂半导体层
公开(公告)号：US08993418B2
公开(公告)日：2015-03-31
申请号：US13988436
申请日：2010-11-19
申请人： Vincent Destefanis , Nicolas Loubet
发明人： Vincent Destefanis , Nicolas Loubet
IPC分类号： H01L21/20 , H01G9/20 , H01L21/02
CPC分类号： H01L21/0226 , H01L21/02499 , H01L21/02532 , H01L21/02573 , H01L21/0262 , H01L21/02642
摘要： The deposition method comprises providing a substrate with a first mono-crystalline zone made of a semiconductor material and a second zone made of an insulating material. During a passivation step, a passivation atmosphere is applied on the substrate so as to cover the first zone with doping impurities. During a deposition step, gaseous silicon and/or germanium precursors are introduced and a doped semiconductor film is formed. The semiconductor film is mono-crystalline over the first zone and has a different texture over the second zone. During an etching step, a chloride gaseous precursor is applied on the substrate so as to remove the semiconductor layer over the second zone.
摘要翻译：沉积方法包括提供具有由半导体材料制成的第一单晶区和由绝缘材料制成的第二区的衬底。在钝化步骤期间，钝化气氛被施加在衬底上，以便用掺杂杂质覆盖第一区域。在沉积步骤期间，引入气态硅和/或锗前体并形成掺杂半导体膜。半导体膜在第一区域上是单晶的，并且在第二区域上具有不同的纹理。在蚀刻步骤期间，将氯化物气体前体施加在衬底上，以便在第二区域上移除半导体层。

3. 发明申请

US20140024203A1 SHALLOW HEAVILY DOPED SEMICONDUCTOR LAYER BY CYCLIC SELECTIVE EPITAXIAL DEPOSITION PROCESS 有权
标题翻译：通过循环选择性外延沉积工艺沉积重金属半导体层
公开(公告)号：US20140024203A1
公开(公告)日：2014-01-23
申请号：US13988436
申请日：2010-11-19
申请人： Vincent Destefanis , Nicolas Loubet
发明人： Vincent Destefanis , Nicolas Loubet
IPC分类号： H01L21/02
CPC分类号： H01L21/0226 , H01L21/02499 , H01L21/02532 , H01L21/02573 , H01L21/0262 , H01L21/02642
摘要： The deposition method comprises providing a substrate with a first mono-crystalline zone made of a semiconductor material and a second zone made of an insulating material. During a passivation step, a passivation atmosphere is applied on the substrate so as to cover the first zone with doping impurities. During a deposition step, gaseous silicon and/or germanium precursors are introduced and a doped semiconductor film is formed. The semiconductor film is mono-crystalline over the first zone and has a different texture over the second zone. During an etching step, a chloride gaseous precursor is applied on the substrate so as to remove the semiconductor layer over the second zone.
摘要翻译：沉积方法包括提供具有由半导体材料制成的第一单晶区和由绝缘材料制成的第二区的衬底。在钝化步骤期间，钝化气氛被施加在衬底上，以便用掺杂杂质覆盖第一区域。在沉积步骤期间，引入气态硅和/或锗前体并形成掺杂半导体膜。半导体膜在第一区域上是单晶的，并且在第二区域上具有不同的纹理。在蚀刻步骤期间，将氯化物气体前体施加在衬底上，以便在第二区域上移除半导体层。

4. 发明授权

US08501596B2 Method for fabricating a micro-electronic device equipped with semi-conductor zones on an insulator with a horizontal GE concentration gradient 有权
标题翻译：用于制造具有水平GE浓度梯度的绝缘体上具有半导体区的微电子器件的方法
公开(公告)号：US08501596B2
公开(公告)日：2013-08-06
申请号：US12560867
申请日：2009-09-16
申请人： Benjamin Vincent , Vincent Destefanis
发明人： Benjamin Vincent , Vincent Destefanis
IPC分类号： H01L21/20 , H01L21/36
CPC分类号： H01L21/02636 , H01L21/02381 , H01L21/02433 , H01L21/02532 , H01L21/02609 , H01L21/0262 , H01L21/02639 , H01L21/02664 , H01L29/1054 , H01L29/78618 , H01L29/78684 , H01L29/78696
摘要： A manufacturing method of a microelectronic device including at least one semi-conductor zone which rests on a support and which exhibits a germanium concentration gradient in a direction parallel to the principal pane of the support.
摘要翻译：一种微电子器件的制造方法，其包括至少一个半导体区，该半导体区位于支撑体上并且在平行于载体的主窗格的方向上显示锗浓度梯度。

5. 发明申请

US20100068869A1 METHOD FOR FABRICATING A MICRO-ELECTRONIC DEVICE EQUIPPED WITH SEMI-CONDUCTOR ZONES ON AN INSULATOR WITH A HORIZONTAL GE CONCENTRATION GRADIENT 有权
标题翻译：在具有水平GE浓度梯度的绝缘体上制造配有半导体区域的微电子器件的方法
公开(公告)号：US20100068869A1
公开(公告)日：2010-03-18
申请号：US12560867
申请日：2009-09-16
申请人： Benjamin VINCENT , Vincent DESTEFANIS
发明人： Benjamin VINCENT , Vincent DESTEFANIS
IPC分类号： H01L21/20
CPC分类号： H01L21/02636 , H01L21/02381 , H01L21/02433 , H01L21/02532 , H01L21/02609 , H01L21/0262 , H01L21/02639 , H01L21/02664 , H01L29/1054 , H01L29/78618 , H01L29/78684 , H01L29/78696
摘要： A method for the realization of a microelectronic device which includes at least one semi-conductor zone which rests on a support and which exhibits a Germanium concentration gradient in a direction parallel to the principal plane of the support, where the method involves steps for: a) The formation, on a support, of at least one oxidation masking layer which includes one or more holes, where the holes reveal at least one first semi-conductor zone which includes inclined flanks and which is based on Si, b) The formation of at least one second semi-conductor zone based on Si1-xGex (where 0
摘要翻译：一种用于实现微电子器件的方法，该微电子器件包括至少一个半导体区，该半导体区位于载体上并且在平行于载体的主平面的方向上呈现锗浓度梯度，其中所述方法涉及以下步骤：）在支撑体上形成至少一个包括一个或多个孔的氧化屏蔽层，其中孔露出至少一个第一半导体区，其包括倾斜的侧面并且基于Si，b）形成基于Si的所述第一半导体区上基于Si1-xGex（其中0

6. 发明授权

US5318785A Benzoyl peroxide to improve the performance of oxidants in breadmaking 失效
标题翻译：过氧化苯甲酰，以提高面包制作中氧化剂的性能
公开(公告)号：US5318785A
公开(公告)日：1994-06-07
申请号：US14958
申请日：1993-02-08
申请人： Vincent DeStefanis
发明人： Vincent DeStefanis
IPC分类号： A21D2/04 , A21D8/04 , A21D2/20
CPC分类号： A21D2/04 , A21D8/042
摘要： An improvement in dough compositions comprising the replacement of bromate improvers in conventional doughs with compositions comprising ascorbic acid, azodicarbonamide, and mixtures thereof in combination with peroxy compounds such as benzoyl peroxide and hydrogen peroxide in the presence or absence of fungal enzymes such as fungal alpha amylase and processes for their use are disclosed.
摘要翻译：面团组合物的改进包括在存在或不存在真菌酶如真菌α淀粉酶的过氧化物和过氧化氢等过氧化合物与过氧化合物如过氧化苯甲酰和过氧化氢的组合中替代常规面团中的溴酸盐改进剂，其中包含抗坏血酸，偶氮二甲酰胺及其混合物并且公开了它们的使用过程。

7. 发明授权

US08110460B2 Method for producing stacked and self-aligned components on a substrate 有权
标题翻译：在基板上制造层叠和自对准部件的方法
公开(公告)号：US08110460B2
公开(公告)日：2012-02-07
申请号：US12577379
申请日：2009-10-12
申请人： Romain Wacquez , Philippe Coronel , Vincent Destefanis , Jean-Michel Hartmann
发明人： Romain Wacquez , Philippe Coronel , Vincent Destefanis , Jean-Michel Hartmann
IPC分类号： H01L21/8238
CPC分类号： H01L21/84 , H01L21/76264 , H01L21/8221
摘要： A method for producing stacked and self-aligned components on a substrate, including: providing a substrate made of monocrystalline silicon having one face enabling production of components, forming a stack of layers on the face of the substrate, selective etching by a gaseous mixture comprising gaseous HCl conveyed by a carrier gas and at a temperature between 450° C. and 900° C., depositing resin, implementing lithography of the resin, replacing resin eliminated during the lithography with a material for confining remaining resin, and forming elements of the components.
摘要翻译：一种用于在衬底上制备堆叠和自对准部件的方法，包括：提供由单晶硅制成的衬底，其具有能够生产部件的一个面，在衬底的表面上形成一叠层，通过气体混合物进行选择性蚀刻，所述气体混合物包括通过载气输送的气态HCl，在450℃和900℃之间的温度下，沉积树脂，实现树脂的光刻，在光刻期间用用于限制剩余树脂的材料替代消除的树脂，并形成元素组件。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式