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1. 发明申请

US20060118947A1 Thermal expansion compensating flip chip ball grid array package structure 审中-公开
标题翻译：热膨胀补偿倒装芯片球栅阵列封装结构
公开(公告)号：US20060118947A1
公开(公告)日：2006-06-08
申请号：US11002192
申请日：2004-12-03
申请人： Tsorng-Dih Yuan , Chung-Yi Lin , Hsin-Yu Pan
发明人： Tsorng-Dih Yuan , Chung-Yi Lin , Hsin-Yu Pan
IPC分类号： H01L23/34
CPC分类号： H01L23/36 , H01L23/3735 , H01L2224/16 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/15311 , H01L2924/16195 , H01L2224/0401
摘要： A flip chip ball grid array package is provided. In one embodiment, a flip chip ball grid array package comprises an inorganic substrate, a die disposed on the substrate, the die having a coefficient of thermal expansion approximately equal to the coefficient of thermal expansion of the substrate, a heat spreader disposed over the die, the heat spreader having a coefficient of thermal expansion approximately equal to the coefficients of thermal expansion of the die and the substrate, and at least one stiffener disposed between the substrate and the heat spreader, the stiffener having a coefficient of thermal expansion approximately equal to the coefficients of thermal expansion of the die, substrate, and the heat spreader, whereby warpages in the flip chip ball grid array package are reduced.
摘要翻译：提供倒装芯片球栅阵列封装。在一个实施例中，倒装芯片球栅阵列封装包括无机衬底，设置在衬底上的管芯，所述管芯的热膨胀系数近似等于衬底的热膨胀系数，设置在管芯上的散热器散热器的热膨胀系数近似等于模具和基板的热膨胀系数，以及设置在基板和散热器之间的至少一个加强件，加强件的热膨胀系数近似等于模具，衬底和散热器的热膨胀系数减小，从而降低了倒装芯片球栅阵列封装中的翘曲。

2. 发明申请

US20060113663A1 Heat stud for stacked chip package 有权
标题翻译：堆叠芯片封装的热钉
公开(公告)号：US20060113663A1
公开(公告)日：2006-06-01
申请号：US11001385
申请日：2004-12-01
申请人： Tsorng-Dih Yuan , Hsin-Yu Pan , Chung-Yi Lin
发明人： Tsorng-Dih Yuan , Hsin-Yu Pan , Chung-Yi Lin
IPC分类号： H01L23/06
CPC分类号： H01L23/4334 , H01L21/563 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/48227 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2225/0651 , H01L2225/06517 , H01L2225/06562 , H01L2225/06589 , H01L2924/00014 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor package assembly is presented. The assembly comprises a first chip and a second chip. The back surfaces of the first and the second chips are thermally attached through a die attach material. The front surface of the first chip is attached to a substrate through bumps. A heat spreader extends from a surface of the semiconductor package assembly into the semiconductor package assembly and thermally attaches to the back surface of the first chip or the front surface of the second chip. Depending on the sizes of the chips and the location of the bonding pads, the heat spreader may be attached to the back surface of the first chip or the front surface of the second chip.
摘要翻译：提出了半导体封装组件。组件包括第一芯片和第二芯片。第一和第二芯片的背面通过管芯附着材料热附着。第一芯片的前表面通过凸块附接到基板。散热器从半导体封装组件的表面延伸到半导体封装组件中并热连接到第一芯片的背面或第二芯片的前表面。取决于芯片的尺寸和接合焊盘的位置，散热器可以附接到第一芯片的背面或第二芯片的前表面。

3. 发明申请

US20060060952A1 Heat spreader for non-uniform power dissipation 审中-公开
标题翻译：散热器散热不均匀
公开(公告)号：US20060060952A1
公开(公告)日：2006-03-23
申请号：US10947593
申请日：2004-09-22
申请人： Tsorng-Dih Yuan , Hsin-Yu Pan
发明人： Tsorng-Dih Yuan , Hsin-Yu Pan
IPC分类号： H01L23/495 , H01L23/34
CPC分类号： H01L23/4334 , H01L23/3128 , H01L23/36 , H01L23/42 , H01L2224/16 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/15311 , H01L2924/16152 , H01L2224/0401
摘要： A heat spreader has first and second regions. The second region lies substantially in a plane. At least a portion of the first region of the heat spreader has an out-of-plane dimension greater than an out-of-plane dimension of the second region. The heat spreader is sized and shaped to be placed with the first region of the heat spreader proximate to a first region of a semiconductor die that dissipates more power than a second region of the die during operation.
摘要翻译：散热器具有第一和第二区域。第二区域基本上位于平面中。散热器的第一区域的至少一部分具有大于第二区域的面外尺寸的面外尺寸。散热器的尺寸和形状被设置成与散热器的第一区域靠近半导体管芯的第一区域放置，其在操作期间消耗比模具的第二区域更多的功率。

4. 发明申请

US20050227480A1 Low dielectric semiconductor device and process for fabricating the same 失效
标题翻译：低介电半导体器件及其制造方法
公开(公告)号：US20050227480A1
公开(公告)日：2005-10-13
申请号：US10817179
申请日：2004-04-02
申请人： Lawrence Clevenger , Louis Hsu , Christy Tyberg , Tsorng-Dih Yuan
发明人： Lawrence Clevenger , Louis Hsu , Christy Tyberg , Tsorng-Dih Yuan
IPC分类号： H01L21/31 , H01L21/4763 , H01L21/768 , H01L23/52 , H01L23/522 , H01L23/532
CPC分类号： H01L23/5222 , H01L21/76829 , H01L21/76835 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A process for fabricating a low dielectric constant semiconductor comprising the steps of: depositing a first metal layer on a substrate; patterning the first metal layer to produce a patterned first metal wiring; applying a first insulating material onto the patterned first metal wiring to form a support structure; patterning the first insulating material by a contact printing process; depositing a second insulating material of lower dielectric constant onto the support structure; planarizing the second insulating material; depositing a polish-stop film layer over the planarized second insulating material, thereby forming a plurality of metal studs; depositing a second metal layer onto the polish-stop film layer forming interconnects with said studs; and patterning the metal layer to produce a second metal wiring interconnecting to the first wiring via the metal studs.
摘要翻译：一种制造低介电常数半导体的方法，包括以下步骤：在衬底上沉积第一金属层; 图案化第一金属层以产生图案化的第一金属布线; 将第一绝缘材料施加到所述图案化的第一金属布线上以形成支撑结构; 通过接触印刷方法图案化第一绝缘材料; 将较低介电常数的第二绝缘材料沉积到所述支撑结构上; 平面化第二绝缘材料; 在平坦化的第二绝缘材料上沉积抛光停止膜层，从而形成多个金属螺柱; 将第二金属层沉积到所述抛光 - 停止膜层上，形成与所述螺柱的互连; 以及图案化所述金属层以产生经由所述金属螺柱与所述第一布线互连的第二金属布线。

5. 发明授权

US06337513B1 Chip packaging system and method using deposited diamond film 有权
公开(公告)号：US06337513B1
公开(公告)日：2002-01-08
申请号：US09449886
申请日：1999-11-30
申请人： Lawrence A. Clevenger , Louis L. Hsu , Li-Kong Wang , Tsorng-Dih Yuan
发明人： Lawrence A. Clevenger , Louis L. Hsu , Li-Kong Wang , Tsorng-Dih Yuan
IPC分类号： H01L2348
CPC分类号： H01L23/473 , H01L23/3677 , H01L23/3732 , H01L25/0657 , H01L2224/05001 , H01L2224/05009 , H01L2224/051 , H01L2224/05548 , H01L2224/0557 , H01L2224/16145 , H01L2225/06513 , H01L2225/06517 , H01L2225/06586 , H01L2225/06589 , H01L2924/00014 , H01L2924/01019 , H01L2924/10253 , Y10S257/93 , H01L2924/00 , H01L2224/05599
摘要： A chip packaging system and method for providing enhanced thermal cooling including a first embodiment wherein a diamond thin film is used to replace at least the surface layer of the existing packaging material in order to form a highly heat conductive path to an associated heat sink. An alternative embodiment provides diamond thin film layers disposed on adjacent surfaces of the chip and the chip package. Yet another alternative embodiment includes diamond thin film layers on adjacent chip surfaces in a chip-to-chip packaging structure. A final illustrated embodiment provides for the use of an increased number of solder balls disposed in at least one diamond thin film layer on at least one of a chip and a chip package joined with standard C4 technology.

6. 发明授权

US08466486B2 Thermal management system for multiple heat source devices 有权
标题翻译：多个热源设备的热管理系统
公开(公告)号：US08466486B2
公开(公告)日：2013-06-18
申请号：US12870164
申请日：2010-08-27
申请人： Tsorng-Dih Yuan
发明人： Tsorng-Dih Yuan
IPC分类号： H01L33/00
CPC分类号： H01L25/167 , H01L33/54 , H01L33/641 , H01L33/642 , H01L33/648 , H01L2924/0002 , H01L2933/0075 , H01L2924/00
摘要： The present disclosure provides systems and methods for forming a semiconductor device. The semiconductor device includes a substrate having a first side and a second side opposite the first side. A first heat producing element is formed on the first side of the substrate. A second heat producing element is formed on the first side of substrate co-planar with, but not touching the first heat producing element. A heat spreader is coupled to the second side of the substrate using a thermal interface material. The heat spreader includes a first and second vapor chambers. The first vapor chamber is embedded in the heat spreader substantially opposite the first heat producing element. The second vapor chamber is embedded in the heat spreader substantially opposite the second heat producing element. As an example, the first heat producing element may be a light-emitting diode (LED) and the second heat producing element may be a driver circuit for the LED.
摘要翻译：本公开提供了用于形成半导体器件的系统和方法。半导体器件包括具有第一侧和与第一侧相对的第二侧的衬底。第一发热元件形成在基板的第一侧上。第二发热元件形成在与第一发热元件共同但不接触第一发热元件的基板的第一侧上。散热器使用热界面材料耦合到衬底的第二侧。散热器包括第一和第二蒸气室。第一蒸气室与第一发热元件基本上相对地嵌入散热器中。第二蒸气室与第二发热元件大致相对地嵌入散热器中。作为示例，第一发热元件可以是发光二极管（LED），第二发热元件可以是LED的驱动电路。

7. 发明授权

US07514775B2 Stacked structures and methods of fabricating stacked structures 有权
标题翻译：堆叠结构和制造堆叠结构的方法
公开(公告)号：US07514775B2
公开(公告)日：2009-04-07
申请号：US11539814
申请日：2006-10-09
申请人： Clinton Chao , Tsorng-Dih Yuan , Hsin-Yu Pan , Kim Chen , Mark Shane Peng , Tjandra Winata Karta
发明人： Clinton Chao , Tsorng-Dih Yuan , Hsin-Yu Pan , Kim Chen , Mark Shane Peng , Tjandra Winata Karta
IPC分类号： H01L23/498
CPC分类号： H01L25/0657 , H01L24/97 , H01L25/50 , H01L2224/0554 , H01L2224/05573 , H01L2224/13025 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2224/97 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06562 , H01L2225/06565 , H01L2225/06589 , H01L2225/06596 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/04941 , H01L2924/04953 , H01L2924/12041 , H01L2924/14 , H01L2924/15311 , H01L2924/19043 , H01L2924/30105 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A stacked structure includes a first die coupled to a first substrate and having a first conductive structure formed through the first die. A second die is mounted over the first die. The second die is coupled to the first substrate by the first conductive structure. At least one first support structure formed from a second substrate is provided over the first substrate, adjacent to at least one of the first die and the second die. A top surface of the first support structure is substantially coplanar with a top surface of at least one of the first and second dies adjacent to the first support structure. The stacked structure further includes a heat spreader mounted over the second die.
摘要翻译：层叠结构包括耦合到第一衬底并具有通过第一裸片形成的第一导电结构的第一管芯。第二模具安装在第一模具上。第二管芯通过第一导电结构耦合到第一衬底。从第二基板形成的至少一个第一支撑结构设置在第一基板上，与第一模具和第二模具中的至少一个相邻。第一支撑结构的顶表面与邻近第一支撑结构的第一和第二模具中的至少一个的顶表面基本共面。层叠结构还包括安装在第二模具上的散热器。

8. 发明授权

US07138300B2 Structural design for flip-chip assembly 有权
标题翻译：倒装芯片组装的结构设计
公开(公告)号：US07138300B2
公开(公告)日：2006-11-21
申请号：US10947592
申请日：2004-09-22
申请人： Tsorng-Dih Yuan , Hsin-Yu Pan , Chung-Yi Lin
发明人： Tsorng-Dih Yuan , Hsin-Yu Pan , Chung-Yi Lin
IPC分类号： H01L21/50
CPC分类号： H01L22/20 , H01L23/3121 , H01L23/34 , H01L23/367 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2924/00011 , H01L2924/00014 , H01L2924/01019 , H01L2924/014 , H01L2924/15311 , H01L2924/16152 , H01L2924/16195 , H01L2924/00 , H01L2224/0401
摘要： An integrated circuit package comprises a semiconductor die located on a substrate in a flip-chip configuration, an encapsulant layer overlying the non-active surface of the semiconductor die and at least a portion of the surface of the substrate adjacent the die, and a heat spreader comprising a thermally conductive material. The heat spreader directly interfaces to a top surface of the encapsulant layer overlying the die and the substrate. This package provides physical protection during handling and reduced die stress and warpage.
摘要翻译：集成电路封装包括以倒装芯片配置位于衬底上的半导体管芯，覆盖半导体管芯的非有效表面的密封剂层和邻近管芯的衬底表面的至少一部分，以及热散热器包括导热材料。散热器直接与覆盖在管芯和衬底上的密封剂层的顶表面接合。该包装在处理过程中提供物理保护，减少模具应力和翘曲。

9. 发明授权

US07134484B2 Increased efficiency in liquid and gaseous planar device cooling technology 失效
公开(公告)号：US07134484B2
公开(公告)日：2006-11-14
申请号：US09732117
申请日：2000-12-07
申请人： Lawrence Shungwei Mok , Tsorng-Dih Yuan
发明人： Lawrence Shungwei Mok , Tsorng-Dih Yuan
IPC分类号： H05K7/20 , F28F3/12
CPC分类号： H01L23/473 , F28F3/12 , H01L2924/0002 , H01L2924/00
摘要： A two loop heat conversion system for high heat density planar devices in which high density heat in an area adjacent to a surface is transferred into a liquid cooling medium closed loop in a radiated heat to liquid heat transfer component positioned in contact with the surface that is connected, to a liquid to gas medium, heat exchanger in a first loop and a gas medium second loop is arranged to carry away all radiated heat from the assembly and all heat extracted from the liquid in the liquid to gas heat exchanger and exhaust it to the ambient. The radiated heat transfer component of the invention provides a transition in manufacturing that is practiced employing the planar type tools in fabrication which usually can neither be practiced manually or observed without substantial magnification.

10. 发明申请

US20060118969A1 Flip chip ball grid array package assemblies and electronic devices with heat dissipation capability 审中-公开
标题翻译：倒装芯片球栅阵列封装组件和具有散热能力的电子器件
公开(公告)号：US20060118969A1
公开(公告)日：2006-06-08
申请号：US11002240
申请日：2004-12-03
申请人： Tsorng-Dih Yuan
发明人： Tsorng-Dih Yuan
IPC分类号： H01L23/48
CPC分类号： H01L23/16 , H01L23/36 , H01L23/49816 , H01L2224/73253 , H01L2924/01019 , H01L2924/15311 , H01L2924/16195 , H01L2924/3011
摘要： Flip chip ball grid array package assemblies. A chip is disposed on a substrate. A plurality of flip chip balls is connected between the chip and the substrate. A heat spreader is disposed on the chip and includes a first surface and a second surface opposite thereto. The first surface is connected to the chip, and the second surface includes at least one protrusion. A heat sink is connected to the heat spreader and includes at least one recess. The profile of the recess is complementary to that of the protrusion of the heat spreader. The protrusion is positioned in the recess. A plurality of ball grid array electrodes is disposed under the substrate.
摘要翻译：倒装芯片球栅阵列封装组件。芯片设置在基板上。在芯片和基板之间连接多个倒装芯片球。散热器设置在芯片上，并且包括与其相对的第一表面和第二表面。第一表面连接到芯片，第二表面包括至少一个突起。散热器连接到散热器并且包括至少一个凹部。凹槽的轮廓与散热器的突起的轮廓互补。突起部位于凹部内。多个球栅阵列电极设置在基板的下方。

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