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    • 2. 发明申请
    • Light Emitting Diode (LED) Die Having Recessed Electrode And Light Extraction Structures And Method Of Fabrication
    • 具有凹陷电极和光提取结构的发光二极管(LED)模具及其制造方法
    • US20130248816A1
    • 2013-09-26
    • US13426705
    • 2012-03-22
    • Jiunn-Yi CHUTrung TRI DOAN
    • Jiunn-Yi CHUTrung TRI DOAN
    • H01L33/04
    • H01L21/461H01L21/44H01L33/22H01L33/382H01L2933/0016
    • A light emitting diode (LED) die includes a semiconductor substrate having an n-type confinement layer, a multiple quantum well (MQW) layer in electrical contact with the n-type confinement layer configured to emit electromagnetic radiation, a p-type confinement layer in electrical contact with the multiple quantum well (MQW) layer; multiple light extraction structures on the n-type confinement layer configured to scatter the electromagnetic radiation; and an electrode in a recess embedded in the n-type confinement layer proximate to the light extraction structures. A method of fabrication includes: forming the semiconductor substrate; forming a recess in the n-type confinement layer having sidewalls and a planar bottom surface; forming an electrode in the recess comprising a conductive material conforming to the sidewalls and to the bottom surface of the recess; planarizing the electrode; and forming a plurality of light extraction structures in the n-type confinement layer proximate to the electrode.
    • 发光二极管(LED)裸片包括具有n型限制层的半导体衬底,与被配置为发射电磁辐射的n型限制层电接触的多量子阱(MQW)层,p型限制层 与多量子阱(MQW)层电接触; n型限制层上的多个光提取结构被配置成散射电磁辐射; 以及嵌入在靠近光提取结构的n型约束层中的凹槽中的电极。 一种制造方法包括:形成半导体衬底; 在具有侧壁和平坦底面的n型限制层中形成凹部; 在所述凹部中形成电极,所述电极包括符合所述侧壁和所述凹部的所述底表面的导电材料; 平面化电极; 以及在靠近电极的n型约束层中形成多个光提取结构。
    • 3. 发明授权
    • Vertical light emitting diode (VLED) die having electrode frame and method of fabrication
    • 具有电极框架和制造方法的垂直发光二极管(VLED)芯片
    • US08283652B2
    • 2012-10-09
    • US12845007
    • 2010-07-28
    • Chen-Fu ChuFeng-Hsu FanHao-Chun ChengTrung Tri Doan
    • Chen-Fu ChuFeng-Hsu FanHao-Chun ChengTrung Tri Doan
    • H01L33/04
    • H01L33/38H01L33/32H01L33/405H01L33/44H01L33/641H01L33/647
    • A vertical light emitting diode (VLED) die includes a metal base; a mirror on the metal base; a p-type semiconductor layer on the reflector layer; a multiple quantum well (MQW) layer on the p-type semiconductor layer configured to emit light; and an n-type semiconductor layer on the multiple quantum well (MQW) layer. The vertical light emitting diode (VLED) die also includes an electrode and an electrode frame on the n-type semiconductor layer, and an organic or inorganic material contained within the electrode frame. The electrode and the electrode frame are configured to provide a high current capacity and to spread current from the outer periphery to the center of the n-type semiconductor layer. The vertical light emitting diode (VLED) die can also include a passivation layer formed on the metal base surrounding and electrically insulating the electrode frame, the edges of the mirror, the edges of the p-type semiconductor layer, the edges of the multiple quantum well (MQW) layer and the edges of the n-type semiconductor layer.
    • 垂直发光二极管(VLED)模具包括金属基底; 金属底座上的镜子; 反射层上的p型半导体层; 配置成发光的p型半导体层上的多量子阱(MQW)层; 和多量子阱(MQW)层上的n型半导体层。 垂直发光二极管(VLED)裸片还包括在n型半导体层上的电极和电极框架,以及包含在电极框架内的有机或无机材料。 电极和电极框架被配置为提供高电流容量并且将电流从外周延伸到n型半导体层的中心。 垂直发光二极管(VLED)裸片还可以包括形成在金属基底上的钝化层,该钝化层围绕并电绝缘电极框架,反射镜的边缘,p型半导体层的边缘,多个量子的边缘 (MQW)层和n型半导体层的边缘。
    • 7. 发明申请
    • METHOD OF SEPARATING SEMICONDUCTOR DIES
    • 分离半导体器件的方法
    • US20110217799A1
    • 2011-09-08
    • US13109687
    • 2011-05-17
    • Chen-Fu ChuTrung Tri DoanHao-Chun ChengFeng-Hsu FanFu-Hsien Wang
    • Chen-Fu ChuTrung Tri DoanHao-Chun ChengFeng-Hsu FanFu-Hsien Wang
    • H01L21/786
    • H01L33/0079H01L33/0095
    • A method for the separation of multiple dies during semiconductor fabrication is described. On an upper surface of a semiconductor wafer containing multiple dies, metal layers are deposited everywhere except where a block of stop electroplating material exists. The stop electroplating material is obliterated, and a barrier layer is formed above the entire remaining structure. A sacrificial metal element is added above the barrier layer, and then the substrate is removed. After the semiconductor material between the individual dies is eradicated, any desired bonding pads and patterned circuitry are added to the semiconductor surface opposite the sacrificial metal element, a passivation layer is added to this surface, and then the sacrificial metal element is removed. Tape is added to the now exposed barrier layer, the passivation layer is removed, the resulting structure is flipped over, and the tape is expanded to separate the individual dies.
    • 描述了在半导体制造期间分离多个管芯的方法。 在包含多个模具的半导体晶片的上表面上,除了存在一块停止电镀材料之外,金属层被沉积​​。 停止电镀材料被消除,并且在整个剩余结构上方形成阻挡层。 在阻挡层上方添加牺牲金属元素,然后去除衬底。 在消除各个管芯之间的半导体材料之后,将任何期望的接合焊盘和图案化电路添加到与牺牲金属元件相对的半导体表面,在该表面上添加钝化层,然后去除牺牲金属元件。 将胶带添加到现在暴露的阻挡层中,去除钝化层,将所得结构翻转,并且将带扩展以分离各个模具。