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    • 6. 发明申请
    • DATA TRANSFER CIRCUIT AND METHOD
    • 数据传输电路和方法
    • US20110225325A1
    • 2011-09-15
    • US13034457
    • 2011-02-24
    • Keisuke NOMURATomokazu KONDOYousuke SASAKI
    • Keisuke NOMURATomokazu KONDOYousuke SASAKI
    • G06F13/28
    • G06F13/28
    • In one cycle for transferring data, a controller forming a data transfer circuit stores pointer information P_A for periodic transfer and pointer information P_B for non-periodic transfer read from a memory respectively in first and second storage areas. The controller sequentially transfers, to a communication bus, data D_A for periodic transfer and data D_B for non-periodic transfer read from the memory by referring to the P_A and P_B. If transfer by a data length indicated in the P_B has not been completed upon the transfer of the D_B, the controller updates the data length to a data length of the remaining data, and updates an address indicated in the P_B to an address on the memory of the remaining data. In the next cycle for transferring data, the controller reads the remaining data from the memory by referring to the P_B, and transfers the remaining data to the communication bus.
    • 在传送数据的一个周期中,形成数据传送电路的控制器分别存储用于周期性传送的指针信息P_A和分别从第一和第二存储区域中的存储器读取的用于非周期性传送的指针信息P_B。 控制器通过参考P_A和P_B,顺序地向通信总线传送用于周期性传送的数据D_A和用于非周期性传送的数据D_B,从存储器读取。 如果在传送D_B时在P_B中指示的数据长度的传送尚未完成,则控制器将数据长度更新为剩余数据的数据长度,并将P_B中指示的地址更新为存储器上的地址 的剩余数据。 在传送数据的下一个周期中,控制器通过参考P_B从存储器中读取剩余的数据,并将剩余的数据传送到通信总线。
    • 7. 发明授权
    • Digital VFO device
    • 数字VFO设备
    • US06833971B2
    • 2004-12-21
    • US10116934
    • 2002-04-05
    • Tomokazu Kondo
    • Tomokazu Kondo
    • G11B509
    • G11B5/09G11B5/016G11B20/1403
    • Disclosed is a digital VFO device which comprises a plurality of VFO circuits 12 and 14; synchronous counters 12a and 14a installed in each VFO circuits 12 and 14; and an adjusting circuit 110 selecting one of the VFO circuits 12 and 14 based on signals 113 and 114 representing the peak shift state of an input data 11 output from each VFO circuits. Correcting instruction signals 16 and 17 are generated to correct the synchronous counter of the other VFO circuits by substituting the counter value of the synchronous counter of the VFO circuit selected by the adjusting circuit 110 for the synchronous counter of the other VFO circuits.
    • 公开了一种包括多个VFO电路12和14的数字VFO设备; 安装在每个VFO电路12和14中的同步计数器12a和14a; 以及根据表示从每个VFO电路输出的输入数据11的峰值偏移状态的信号113和114,选择VFO电路12和14之一的调整电路110。 产生修正指令信号16和17,以通过将由调节电路110选择的VFO电路的同步计数器的计数器值替换为其它VFO电路的同步计数器来校正其它VFO电路的同步计数器。
    • 9. 发明授权
    • Periodic and non-periodic data transfer circuit analyzing pointer information
    • 周期性和非周期性数据传输电路分析指针信息
    • US08214554B2
    • 2012-07-03
    • US13034457
    • 2011-02-24
    • Keisuke NomuraTomokazu KondoYousuke Sasaki
    • Keisuke NomuraTomokazu KondoYousuke Sasaki
    • G06F13/28G06F7/00
    • G06F13/28
    • In one cycle for transferring data, a controller forming a data transfer circuit stores pointer information P_A for periodic transfer and pointer information P_B for non-periodic transfer read from a memory respectively in first and second storage areas. The controller sequentially transfers, to a communication bus, data D_A for periodic transfer and data D_B for non-periodic transfer read from the memory by referring to the P_A and P_B. If transfer by a data length indicated in the P_B has not been completed upon the transfer of the D_B, the controller updates the data length to a data length of the remaining data, and updates an address indicated in the P_B to an address on the memory of the remaining data. In the next cycle for transferring data, the controller reads the remaining data from the memory by referring to the P_B, and transfers the remaining data to the communication bus.
    • 在传送数据的一个周期中,形成数据传送电路的控制器分别存储用于周期性传送的指针信息P_A和分别从第一和第二存储区域中的存储器读取的用于非周期性传送的指针信息P_B。 控制器通过参考P_A和P_B,顺序地向通信总线传送用于周期性传送的数据D_A和用于非周期性传送的数据D_B,从存储器读取。 如果在传送D_B时在P_B中指示的数据长度的传送尚未完成,则控制器将数据长度更新为剩余数据的数据长度,并将P_B中指示的地址更新为存储器上的地址 的剩余数据。 在传送数据的下一个周期中,控制器通过参考P_B从存储器中读取剩余的数据,并将剩余的数据传送到通信总线。