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1. 发明授权

US08941354B2 Battery system 有权
标题翻译：电池系统
公开(公告)号：US08941354B2
公开(公告)日：2015-01-27
申请号：US13422970
申请日：2012-03-16
申请人： Byung-Il Song , Han-Seok Yun , Tetsuya Okada , Jong-Woon Yang , Eui-Jeong Hwang
发明人： Byung-Il Song , Han-Seok Yun , Tetsuya Okada , Jong-Woon Yang , Eui-Jeong Hwang
IPC分类号： H01M10/46 , H04Q9/00
CPC分类号： H04Q9/00 , H04Q2209/10 , H04Q2209/30
摘要： A battery system is disclosed. In one embodiment, the system includes i) a plurality of battery modules each of which is configured to store power, wherein each battery module is electrically connected to at least one other battery module and ii) a plurality of management units configured to monitor states of the battery modules. Each management unit is electrically connected to at least one other management unit and one or more of the battery modules. Each management unit may include: at least one measuring unit configured to perform the monitoring and a receiving unit configured to i) receive measurement data including the monitoring results from the measuring unit via a first communication protocol and ii) receive measurement data from another receiving unit included in another management unit via a second communication protocol different from the first communication protocol.
摘要翻译：公开了一种电池系统。在一个实施例中，系统包括i）多个电池模块，每个电池模块被配置为存储电力，其中每个电池模块电连接到至少一个其他电池模块，以及ii）多个管理单元，电池模块。每个管理单元电连接至至少一个其他管理单元和一个或多个电池模块。每个管理单元可以包括：被配置为执行监视的至少一个测量单元和被配置为i）经由第一通信协议从测量单元接收包括监视结果的测量数据，以及ii）从另一接收单元接收测量数据经由与第一通信协议不同的第二通信协议包括在另一个管理单元中。

2. 发明授权

US08513922B2 Battery pack and method of controlling charging of battery pack 有权
标题翻译：电池组及控制电池充电方法
公开(公告)号：US08513922B2
公开(公告)日：2013-08-20
申请号：US12926405
申请日：2010-11-16
申请人： Jong-Woon Yang , Susumu Segawa , In-Kyu Park , Tetsuya Okada , Jin-Wan Kim
发明人： Jong-Woon Yang , Susumu Segawa , In-Kyu Park , Tetsuya Okada , Jin-Wan Kim
IPC分类号： H02J7/04 , H02J7/00
CPC分类号： H02J7/0026 , H02J7/045 , H02J7/047
摘要： A battery pack includes a battery cell, a charge-blocking unit, a voltage sensing and balancing circuit, and a microcomputer, the microcomputer including a controller that detects at least one selected from the group of abnormal analog-to-digital conversion, abnormal voltage, and abnormal temperature of the battery cell, the controller outputting a charge control signal to the charge-blocking unit to inhibit charging of the battery cell.
摘要翻译：电池组包括电池单元，电荷阻挡单元，电压感测和平衡电路以及微型计算机，所述微型计算机包括：控制器，其检测从所述一组异常模数转换中选出的至少一个异常电压和电池单元的异常温度，控制器向充电阻断单元输出充电控制信号，以禁止电池单元的充电。

3. 发明申请

US20120179399A1 BATTERY SYSTEM AND ENERGY STORAGE SYSTEM INCLUDING THE SAME 有权
标题翻译：电池系统和能源储存系统，包括它们
公开(公告)号：US20120179399A1
公开(公告)日：2012-07-12
申请号：US13243234
申请日：2011-09-23
申请人： Han-Seok Yun , Tetsuya Okada , Jong-Woon Yang , Eui-Jeong Hwang
发明人： Han-Seok Yun , Tetsuya Okada , Jong-Woon Yang , Eui-Jeong Hwang
IPC分类号： G01R31/36 , G01N27/416
CPC分类号： H01M10/441 , H01M10/482 , H01M2010/4271 , H02J7/0021 , H04Q9/00 , H04Q2209/10 , H04Q2209/30 , Y02T10/7055
摘要： A battery system having components with reduced maximum voltage tolerance requirements is disclosed. The battery system includes a battery pack with battery modules, and measuring units, which are connected to the battery modules. The measuring units have first analog front ends (AFEs) for monitoring the at least two battery modules. Each first AFE is configured to transmit information related to the monitored characteristic via an isolator to a processor configured to control the battery pack based on the transmitted information. The isolator receives the transmitted information from an AFE which is not connected to the battery module having the least electric potential or to the battery module having the greatest electric potential.
摘要翻译：公开了具有降低的最大电压公差要求降低的部件的电池系统。电池系统包括具有电池模块的电池组和连接到电池模块的测量单元。测量单元具有用于监视至少两个电池模块的第一模拟前端（AFE）。每个第一AFE被配置为经由隔离器将与所监视的特性相关的信息发送到被配置为基于所发送的信息来控制电池组的处理器。隔离器从不与具有最小电位的电池模块连接的AFE或具有最大电位的电池模块接收从AFE发送的信息。

4. 发明申请

US20110121784A1 BATTERY PACK 失效
标题翻译：电池组
公开(公告)号：US20110121784A1
公开(公告)日：2011-05-26
申请号：US12954608
申请日：2010-11-24
申请人： Hanseok Yun , Susumu Segawa , Tetsuya Okada , Euijeong Hwang , Sesub Sim , Beomgyu Kim , Jinwan Kim
发明人： Hanseok Yun , Susumu Segawa , Tetsuya Okada , Euijeong Hwang , Sesub Sim , Beomgyu Kim , Jinwan Kim
IPC分类号： H02J7/00 , H01M10/48
CPC分类号： H02J7/0027 , H01M10/486 , H02J7/0091 , H02J2007/0037 , H02J2007/004
摘要： A battery pack is disclosed that includes a plurality of battery cells and a plurality of temperature sensors. Each of the temperature sensors is for sensing a temperature of a corresponding one or more of the battery cells to generate a temperature signal, and the temperature sensors are divided into groups of temperature sensors. A plurality of A/D converters is provided, and each of the A/D converters is coupled to a corresponding one of the groups of temperature sensors to convert the temperature signal into a digital signal. An identification signal module is coupled to the A/D converters for applying different identification signals to the plurality of A/D converters, respectively. A controller is coupled to the A/D converters for receiving the identification signals and the temperature signal, and for identifying a temperature of each of the battery cells through the identification signals.
摘要翻译：公开了一种包括多个电池单元和多个温度传感器的电池组。每个温度传感器用于感测相应的一个或多个电池单元的温度以产生温度信号，并且温度传感器被分成温度传感器组。提供多个A / D转换器，并且每个A / D转换器耦合到温度传感器组中的对应的一组，以将温度信号转换为数字信号。识别信号模块耦合到A / D转换器，用于分别向多个A / D转换器施加不同的识别信号。控制器耦合到A / D转换器，用于接收识别信号和温度信号，以及通过识别信号识别每个电池单元的温度。

5. 发明授权

US07738772B2 Apparatus and method for synchronizing video data and audio data having different predetermined frame lengths 有权
标题翻译：具有不同预定帧长度的视频数据和音频数据同步的装置和方法
公开(公告)号：US07738772B2
公开(公告)日：2010-06-15
申请号：US10559419
申请日：2004-06-03
申请人： Tetsuya Okada , Daisuke Hiranaka
发明人： Tetsuya Okada , Daisuke Hiranaka
IPC分类号： H04N5/76
CPC分类号： H04N5/9265 , H04N5/783
摘要： When a pause request occurs, an audio delay time constituted by a delay time of frames of audio data based on the video data frames is found. During the pause, a frame offset time constituted by the offset of the frame start time of the video data and the audio data is monitored. When a pause release request is issued, based on the audio delay time and the frame offset time, the audio correction time to be corrected in the pause request is calculated. Then, when it is judged that the audio data is advanced with respect to the video data based on the audio correction time cumulatively added for each pause request, the video data is delayed by one frame with respect to the audio data, while when it is judged that the audio data is delayed with respect to the video data, the audio data is delayed by one frame with respect to the video data.
摘要翻译：当发生暂停请求时，发现由基于视频数据帧的音频数据的帧的延迟时间构成的音频延迟时间。在暂停期间，监视由视频数据的帧开始时间的偏移和音频数据构成的帧偏移时间。当发出暂停释放请求时，基于音频延迟时间和帧偏移时间，计算在暂停请求中要校正的音频校正时间。然后，当基于针对每个暂停请求累积的音频校正时间判断音频数据相对于视频数据前进时，视频数据相对于音频数据被延迟一帧，而当它是判断音频数据相对于视频数据被延迟，音频数据相对于视频数据被延迟一帧。

6. 发明申请

US20090230393A1 DIODE 有权
标题翻译：二极管
公开(公告)号：US20090230393A1
公开(公告)日：2009-09-17
申请号：US12400404
申请日：2009-03-09
申请人： Seiji MIYOSHI , Tetsuya OKADA
发明人： Seiji MIYOSHI , Tetsuya OKADA
IPC分类号： H01L29/861
CPC分类号： H01L29/861 , H01L29/0619 , H01L29/402 , Y10S438/979
摘要： In a pn junction diode having a conductivity modulating element provided on a first principal surface of a semiconductor substrate, when an impurity concentration of a p type impurity region is lowered to shorten a reverse recovery time, hole injection is suppressed, thereby causing a problem that a forward voltage value is increased at a certain current point. Moreover, introduction of a life time killer to shorten the reverse recovery time leads to a problem of increased leak current. On an n− type semiconductor layer that is a single crystal silicon layer, a p type polycrystalline silicon layer (p type polysilicon layer) is provided. Since the polysilicon layer has more grain boundaries than the single crystal silicon layer, an amount of holes injected into the n− type semiconductor layer from the p type polysilicon layer in forward voltage application can be suppressed. Moreover, a natural oxide film formed between the n− type semiconductor layer and the p type polysilicon layer in formation of the p type polysilicon layer can also reduce the amount of holes injected into the n− type semiconductor layer. Thus, a time to extract the holes in reverse voltage application, that is, a reverse recovery time can be shortened without using a life time killer.
摘要翻译：在具有设置在半导体衬底的第一主表面上的导电性调制元件的pn结二极管中，当降低ap型杂质区域的杂质浓度以缩短反向恢复时间时，空穴注入被抑制，从而导致以下问题：正向电压值在某一当前点增加。此外，引入寿命杀手以缩短反向恢复时间导致泄漏电流增加的问题。在作为单晶硅层的n型半导体层上，设置p型多晶硅层（p型多晶硅层）。由于多晶硅层具有比单晶硅层更多的晶界，因此可以抑制在正向电压施加中从p型多晶硅层注入到n型半导体层中的空穴量。此外，在形成p型多晶硅层时，形成在n型半导体层和p型多晶硅层之间的自然氧化物膜也可以减少注入到n型半导体层中的空穴的量。因此，可以在不使用寿命杀手的情况下缩短在反向电压施加中提取孔的时间，即反向恢复时间。

7. 发明申请

US20080038880A1 Method of manufacturing a semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：US20080038880A1
公开(公告)日：2008-02-14
申请号：US11882883
申请日：2007-08-06
申请人： Kikuo Okada , Tetsuya Okada
发明人： Kikuo Okada , Tetsuya Okada
IPC分类号： H01L21/332
CPC分类号： H01L29/7395 , H01L29/66333
摘要： There is the need to grind a semiconductor substrate from its back surface in order to thin a drift region for forming the NPT type IGBT. A collector region is then formed on the back surface of the semiconductor substrate by performing ion-implantation, a heat treatment and the like to the back surface of the semiconductor substrate of which the strength is weakened. This causes problems of warping the semiconductor substrate and the like. In a method of manufacturing a semiconductor device of the invention, the thickness of a drift region is previously adjusted by the thickness of an epitaxial layer. A collector region is then formed only by grinding a semiconductor substrate. In particular, using a semiconductor substrate containing a low concentration of impurity provides preferable characteristics for a high-speed switching element with a short turn-off time even when the collector region is thick.
摘要翻译：为了使用于形成NPT型IGBT的漂移区域变薄，需要从其背面研磨半导体衬底。然后，通过对半导体基板的强度弱化的背面进行离子注入，热处理等，在半导体基板的背面形成集电极区域。这导致了半导体衬底翘曲等问题。在制造本发明的半导体器件的方法中，预先通过外延层的厚度调整漂移区的厚度。然后仅通过研磨半导体衬底形成集电极区域。特别是使用含有低浓度杂质的半导体衬底，即使在集电极区域较厚的情况下也能够实现具有短关断时间的高速开关元件的优选特性。

8. 发明申请

US20070034943A1 Insulated gate semiconductor device and manufacturing method thereof 有权
标题翻译：绝缘栅半导体器件及其制造方法
公开(公告)号：US20070034943A1
公开(公告)日：2007-02-15
申请号：US11496723
申请日：2006-08-01
申请人： Kazunari Kushiyama , Tetsuya Okada , Makoto Oikawa
发明人： Kazunari Kushiyama , Tetsuya Okada , Makoto Oikawa
IPC分类号： H01L29/94 , H01L21/336
CPC分类号： H01L29/7811 , H01L24/05 , H01L24/06 , H01L24/45 , H01L24/48 , H01L24/49 , H01L29/66734 , H01L29/7397 , H01L29/7808 , H01L29/7813 , H01L2224/02166 , H01L2224/04042 , H01L2224/05073 , H01L2224/05166 , H01L2224/05187 , H01L2224/05552 , H01L2224/05553 , H01L2224/05554 , H01L2224/05556 , H01L2224/05624 , H01L2224/0603 , H01L2224/45144 , H01L2224/48463 , H01L2224/48624 , H01L2224/49107 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/13055 , H01L2924/13091 , H01L2924/19043 , H01L2924/00014 , H01L2924/04941 , H01L2924/04953 , H01L2924/01074 , H01L2924/00
摘要： Two metal electrode layers are provided. A first electrode layer is patterned with a minute separation distance according to an element region as in the case of the conventional case. Meanwhile, it suffices that a second electrode layer be in contact with the first electrode layer. Thus, no problems arise even if the separation distance is elongated. Specifically, the second electrode layer can be set to have a desired thickness. Moreover, by disposing a nitride film on the first electrode layer below a wire bonding region, even when volume expansion is caused by an Au/Al eutectic layer, transmission of stress to the element region can be prevented.
摘要翻译：提供两个金属电极层。如常规情况那样，第一电极层根据元件区域以微小的间隔距离进行构图。同时，第二电极层与第一电极层接触就足够了。因此，即使分离距离延长也不会出现问题。具体地，第二电极层可以被设定为具有期望的厚度。此外，通过在引线接合区域的下方的第一电极层上设置氮化物膜，即使由Au / Al共晶层引起体积膨胀，也能够防止向元件区域施加应力。

9. 发明申请

US20060220122A1 Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060220122A1
公开(公告)日：2006-10-05
申请号：US11373488
申请日：2006-03-13
申请人： Yasuyuki Sayama , Tetsuya Okada , Makoto Oikawa , Hiroyasu Ishida , Kazunari Kushiyama
发明人： Yasuyuki Sayama , Tetsuya Okada , Makoto Oikawa , Hiroyasu Ishida , Kazunari Kushiyama
IPC分类号： H01L29/76
CPC分类号： H01L29/7802 , H01L29/0878 , H01L29/42372 , H01L29/4238 , H01L29/66712
摘要： An n type impurity region is provided below a gate electrode. By setting a gate length to be less than a depth of a channel region, a side surface of the channel region and a side surface of the n type impurity region adjacent to the channel region form a substantially perpendicular junction surface. Thus, since a depletion layer widens uniformly in a depth direction of a substrate, it is possible to secure a predetermined breakdown voltage. Furthermore, since an interval between the channel regions, above which the gate electrode is disposed, is uniform from its surface to its bottom, it is possible to increase an impurity concentration of the n type impurity region, resulting in an achievement of a low on-resistance.
摘要翻译：在栅电极的下方设置有n型杂质区。通过将栅极长度设置为小于沟道区的深度，沟道区的侧表面和与沟道区相邻的n型杂质区的侧表面形成基本上垂直的接合表面。因此，由于耗尽层在衬底的深度方向上均匀地变宽，因此可以确保预定的击穿电压。此外，由于栅极电极上方的沟道区域之间的间隔从表面到底部均匀，所以可以增加n型杂质区域的杂质浓度，导致实现低的导通 -抵抗性。

10. 发明授权

US07114151B2 Code conversion method and apparatus 有权
标题翻译：代码转换方法和装置
公开(公告)号：US07114151B2
公开(公告)日：2006-09-26
申请号：US10455972
申请日：2003-06-05
申请人： Tetsuya Okada
发明人： Tetsuya Okada
IPC分类号： G06F9/45
CPC分类号： G06F8/4451
摘要： Interlocked floating-point instructions are detected, and a register address referring to and assigning an operand in the interlocked instructions is changed to an odd-number address not assigned as any operation at the time of compiling. Next, an instruction not in any register-dependency relation with the interlocked instructions is detected, and the detected instruction is inserted between instructions interlocked with each other. Thus a program can be executed with an improved efficiency.
摘要翻译：检测到互锁浮点指令，并且在互锁指令中引用和分配操作数的寄存器地址被改变为编译时未分配为任何操作的奇数地址。接下来，检测到与互锁指令不具有任何寄存器依赖关系的指令，并且检测到的指令被插入彼此互锁的指令之间。因此，可以以提高的效率执行程序。

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