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1. 发明授权

US08714330B2 Electromagnetic clutch apparatus 有权
标题翻译：电磁离合器装置
公开(公告)号：US08714330B2
公开(公告)日：2014-05-06
申请号：US11979619
申请日：2007-11-06
申请人： Daisuke Toyama , Takeshi Hashizume
发明人： Daisuke Toyama , Takeshi Hashizume
IPC分类号： F16D27/06 , F16D27/14 , G01B7/30
CPC分类号： F16D27/06 , F16D27/14 , G01D5/2452
摘要： An electromagnetic clutch apparatus includes: a rotational shaft rotatable for an input and output of a rotational driving force; a rotor integrally rotated with the rotational shaft about an axis and provided with a plurality of magnetic poles each having a first polarity and a second polarity being different from the first polarity, the first and second polarities of the magnetic poles being arranged alternately along a circumferential direction of the rotor; an armature supported to be rotatable relative to the rotor; a rotational member rotated for the one of the input and output of the rotational driving force relative to the armature; an exciting coil stored in the rotor and generating magnetic flux so that the rotor electromagnetically attracts the armature; and a magnetic flux detecting element arranged to face the magnetic poles along a direction of the axis so as to detect magnetic flux of the magnetic poles.
摘要翻译：电磁离合器装置包括：旋转轴，其可旋转以输入和输出旋转驱动力; 转子与轴一体地旋转并且设置有多个磁极，每个磁极具有与第一极性不同的第一极性和第二极性，磁极的第一和第二极性沿周向交替布置转子方向; 被支撑为能够相对于转子旋转的电枢; 旋转构件相对于所述衔铁旋转用于所述旋转驱动力的输入和输出中的一个; 存储在转子中的励磁线圈并产生磁通，使得转子电磁吸引电枢; 以及磁通检测元件，其布置成沿着所述轴线的方向面对所述磁极，以便检测所述磁极的磁通量。

2. 发明授权

US07536985B2 Valve timing control device 有权
标题翻译：气门正时控制装置
公开(公告)号：US07536985B2
公开(公告)日：2009-05-26
申请号：US11790841
申请日：2007-04-27
申请人： Shigemitsu Suzuki , Naoto Toma , Takeshi Hashizume
发明人： Shigemitsu Suzuki , Naoto Toma , Takeshi Hashizume
IPC分类号： F01L1/34
CPC分类号： F01L1/3442 , F01L1/022 , F01L1/024 , F01L2001/0537 , F01L2001/34423 , F01L2001/34426 , F01L2001/34446 , F01L2001/34473 , F01L2001/34483 , F01L2001/34496 , F01L2800/00 , F01L2800/01 , F02D13/0238
摘要： A valve opening and closing timing control device includes a phase control unit having a drive side rotation member for rotating in synchronization with a crankshaft of an internal combustion engine, a driven side rotation member provided coaxially with the drive side rotation member for rotating in synchronization with a camshaft of the engine and a phase control mechanism for controlling a relative rotational phase between the drive side member and the driven side member by being supplied with an operation fluid. The phase control unit is provided at each set of camshafts of the internal combustion engine having plurality sets of camshafts. The valve timing control device further includes a first pump driven by the internal combustion engine and a second pump driven by a motor, wherein the first pump supplies the operation fluid to all of the phase control units provided at the each set of camshafts and the second pump supplies the operation fluid only to the phase control unit provided at one set of camshaft.
摘要翻译：一种开闭正时控制装置，具有：相位控制单元，具有与内燃机的曲轴同步旋转的驱动侧旋转构件;与驱动侧旋转构件同轴设置的从动侧旋转构件，与驱动侧旋转构件同步旋转; 发动机的凸轮轴和相位控制机构，用于通过供给操作流体来控制驱动侧构件和从动侧构件之间的相对旋转相位。在具有多套凸轮轴的内燃机的各组凸轮轴上设置相位控制单元。气门正时控制装置还包括由内燃机驱动的第一泵和由电动机驱动的第二泵，其中第一泵将操作流体供应到设置在每组凸轮轴上的所有相位控制单元，第二泵将第二泵泵仅将操作流体提供给设置在一组凸轮轴上的相位控制单元。

3. 发明申请

US20080060347A1 Exhaust Gas Control Apparatus for Internal Combustion Engine 审中-公开
标题翻译：内燃机排气控制装置
公开(公告)号：US20080060347A1
公开(公告)日：2008-03-13
申请号：US11631196
申请日：2006-07-19
申请人： Hiroyuki Tominaga , Kingo Suyama , Takeshi Hashizume , Hideki Aoki
发明人： Hiroyuki Tominaga , Kingo Suyama , Takeshi Hashizume , Hideki Aoki
IPC分类号： F01N3/10
CPC分类号： F01N11/002 , F01N3/0807 , F01N3/0821 , F01N3/0842 , F01N9/00 , F01N2610/03 , F02D41/0002 , F02D41/0245 , F02D41/029 , F02D41/18 , F02D41/2441 , F02D41/2451 , F02D2009/0222 , F02D2009/0237 , Y02T10/26 , Y02T10/42 , Y02T10/47
摘要： When the temperature of exhaust gas control means (3), which is provided in an exhaust passage (2) of an internal combustion engine (1) and which has oxidation function, is increased to a target temperature in order to recover an exhaust gas control ability of the exhaust gas control means (3), the method of increasing the temperature of the exhaust gas control means (3) is switched between a method in which the temperature of the exhaust gas control means (3) is increased by controlling an amount of fuel supplied to the exhaust gas control means (3) and a method in which the fuel supply to the exhaust gas control means (3) is prohibited and the temperature of the exhaust gas control means (3) is increased by controlling an amount of air taken in the internal combustion engine (1), based on an operation state of the internal combustion engine (1).
摘要翻译：当设置在内燃机（1）的排气通路（2）中并且具有氧化功能的排气控制装置（3）的温度升高到目标温度以便恢复排气控制废气控制装置（3）的能力，排气控制装置（3）的温度升高方法在通过控制排气控制装置（3）的温度增加的方法之间切换提供给废气控制装置（3）的燃料的燃料供给的方法以及通过控制废气控制装置（3）的燃料供给量到排气控制装置（3）基于内燃机（1）的运转状态，在内燃机（1）中吸入的空气。

4. 发明授权

US07159391B2 Method for restricting excessive temperature rise of filter in internal combustion engine 有权
标题翻译：限制内燃机过滤器温升过高的方法
公开(公告)号：US07159391B2
公开(公告)日：2007-01-09
申请号：US10936606
申请日：2004-09-09
申请人： Tomoyuki Kogo , Takeshi Hashizume
发明人： Tomoyuki Kogo , Takeshi Hashizume
IPC分类号： F01N3/00
CPC分类号： F01N3/0842 , F01N3/0253 , F01N3/035 , F01N3/0821 , F01N13/009 , F02D41/029 , F02D41/1446 , F02D41/187 , F02D41/405 , F02D2200/0414 , F02D2200/602 , F02D2200/703
摘要： A method for restricting an excessive temperature rise in an internal combustion engine according to the present invention can provide a technology that enable to restrict an excessive temperature rise of a filter more reliably in an internal combustion engine having the filter provided in the exhaust passage for collecting particulate matter in the exhaust gas. In that method, when the running state of the internal combustion engine becomes idle running during the filter regeneration process, the oxygen concentration in the exhaust gas flowing into the filter is reduced. After that, when the running state of the internal combustion engine shifts from the idle running to a running state with an engine load higher than in the idle running, the oxygen concentration in the exhaust gas flowing into the filter is gradually increased.
摘要翻译：根据本发明的用于限制内燃机的过度升温的方法可以提供一种技术，其能够在具有设置在排气通道中用于收集的过滤器的内燃机中更可靠地限制过滤器的过度升温废气中的颗粒物质。在该方法中，当在过滤器再生过程中内燃机的运行状态变得空转时，流入过滤器的排气中的氧浓度降低。此后，当内燃机的行驶状态从空转行驶转变为发动机负荷高于怠速行驶的行驶状态时，流入过滤器的排气中的氧浓度逐渐增大。

5. 发明申请

US20060042237A1 Accumulating amount estimating device detecting differential pressure of filter 有权
标题翻译：累积量估计装置检测过滤器的压差
公开(公告)号：US20060042237A1
公开(公告)日：2006-03-02
申请号：US11200261
申请日：2005-08-10
申请人： Yoshiharu Nonoyama , Niro Takaki , Takeshi Hashizume , Tsukasa Kuboshima
发明人： Yoshiharu Nonoyama , Niro Takaki , Takeshi Hashizume , Tsukasa Kuboshima
IPC分类号： F01N3/00
CPC分类号： F01N9/007 , F01N3/0253 , F01N3/027 , F01N3/035 , F01N9/002 , F01N11/002 , F01N13/0097 , F01N2610/03 , F02B37/00 , F02D41/029 , F02D2200/0812 , Y02T10/144 , Y02T10/47
摘要： A filter is arranged in an exhaust passage of an engine. The filter supports a catalyst. An accumulating amount estimating means detects differential pressure of the filter to estimate an amount of soot accumulating on the filter. An oxidizing condition detecting means detects an oxidizing condition of soot accumulating on the filter. A forcible oxidizing means increases temperature of the filter more than oxidizing temperature of soot for forcibly oxidizing soot accumulating in the vicinity of the catalyst of the filter. When the oxidizing condition detecting means detects a condition, in which soot accumulating on the filter is only partially oxidized, the accumulating amount estimating means estimates the amount of soot accumulating on the filter after oxidizing soot accumulating in the vicinity of the catalyst using the forcible oxidizing means.
摘要翻译：过滤器布置在发动机的排气通道中。过滤器支持催化剂。累积量估计装置检测过滤器的压差以估计在过滤器上累积的烟灰量。氧化条件检测装置检测积聚在过滤器上的烟灰的氧化条件。强制氧化装置比过滤器的催化剂附近积聚的烟灰强烈地氧化烟炱的氧化温度来提高过滤器的温度。当氧化条件检测装置检测到其中累积在过滤器上的烟灰仅被部分氧化的条件时，累积量估计装置估计在使用强制氧化在催化剂附近积聚的烟灰氧化之后积聚在过滤器上的烟灰量手段。

6. 发明申请

US20060013030A1 Refresh-free dynamic semiconductor memory device 失效
公开(公告)号：US20060013030A1
公开(公告)日：2006-01-19
申请号：US11165273
申请日：2005-06-24
申请人： Kazutami Arimoto , Hiroki Shimano , Takeshi Fujino , Takeshi Hashizume
发明人： Kazutami Arimoto , Hiroki Shimano , Takeshi Fujino , Takeshi Hashizume
IPC分类号： G11C5/06
CPC分类号： G11C29/006 , G11C7/1045 , G11C11/401 , G11C11/406 , G11C11/4087 , G11C29/02 , G11C29/021 , G11C29/028 , G11C29/50 , G11C29/50012 , G11C29/50016 , G11C29/83 , G11C2029/1204 , G11C2207/104 , G11C2211/4013 , G11C2211/5641
摘要： In a data holding mode, data storage in a one bit/one cell scheme in a normal operating mode are rearranged into data storage in a twin-cell mode in which data are stored in a one bit/two cell scheme. In the twin-cell mode, two sub word lines are simultaneously driven into a selected state, and storage data of memory cells are read out on both of bit lines in a pair, to perform a sense operation. Thus, the read-out voltage can be increased to improve the data retention characteristics for lengthening a refresh interval, resulting in a reduced power consumption in the data holding mode.

7. 发明授权

US06259639B1 Semiconductor integrated circuit device capable of repairing defective parts in a large-scale memory 失效
标题翻译：能够修复大规模存储器中的有缺陷的部件的半导体集成电路装置
公开(公告)号：US06259639B1
公开(公告)日：2001-07-10
申请号：US09630432
申请日：2000-08-01
申请人： Takeshi Hashizume
发明人： Takeshi Hashizume
IPC分类号： G11C700
CPC分类号： G11C29/4401 , G06F11/183 , G11C29/44 , G11C29/70 , G11C2029/1208
摘要： A semiconductor integrated circuit device comprises a memory cell unit, and a data latch unit for temporarily latching write data, which is written into the memory cell unit by way of a normal port. A comparator reads the data, which has been written into the memory cell unit by way of the normal port, from the memory cell unit by way of a test port, and then compares the read data with the original write data latched by the data latch unit. When the comparator detects a mismatch between them, a redundant unit latches the write data to take the place of the memory cell unit and an address holding unit latches information on an address identifying a location of the memory cell unit into which the write data has been written.
摘要翻译：半导体集成电路装置包括存储单元单元和用于临时锁存写入数据的数据锁存单元，其通过正常端口写入存储单元单元。比较器通过测试端口从存储单元单元读取已经通过正常端口写入存储单元单元的数据，然后将读取的数据与由数据锁存器锁存的原始写入数据进行比较单元。当比较器检测到它们之间的不匹配时，冗余单元锁存写入数据以取代存储单元单元，并且地址保持单元锁存关于识别写入数据已经被写入的存储单元单元的位置的地址上的信息书面。

8. 发明授权

US5911039A Integrated circuit device comprising a plurality of functional modules each performing predetermined function 失效
标题翻译：集成电路装置，包括各自执行预定功能的多个功能模块
公开(公告)号：US5911039A
公开(公告)日：1999-06-08
申请号：US787333
申请日：1997-01-27
申请人： Takeshi Hashizume , Kazuhiro Sakashita
发明人： Takeshi Hashizume , Kazuhiro Sakashita
IPC分类号： G01R31/28 , G01R31/3185 , G06F11/22 , G06F11/267 , G06F11/27
CPC分类号： G01R31/318558
摘要： An integrated circuit device is structured by a plurality of functional modules (2a, 2b) each performing a predetermined function, each functional module including a test circuit (3) for testing the corresponding module. Each test circuit comprises a scan path (3a-3d) for receiving test data from a single common input line to perform a test and outputting a test output, a tri-state buffer (4a) for controlling an output of the test output from the scan path to a single common output line, and a scan path selecting circuit (5a) for selectively driving the tri-state buffer. All the selecting circuits in the integrated circuit device are connected in series to constitute as a whole a shift register. A selecting signal of the serial data is inputted to the shift register, so that the test output of each scan path is selectively supplied to the common output line.
摘要翻译：集成电路装置由各自执行预定功能的多个功能模块（2a，2b）构成，每个功能模块包括用于测试相应模块的测试电路（3）。每个测试电路包括用于从单个公共输入线接收测试数据以执行测试并输出测试输出的扫描路径（3a-3d），用于控制测试输出的输出的三态缓冲器（4a）扫描路径到单个公共输出线，以及扫描路径选择电路（5a），用于选择性地驱动三态缓冲器。集成电路装置中的所有选择电路串联连接构成移位寄存器。将串行数据的选择信号输入到移位寄存器，使得每个扫描路径的测试输出被选择性地提供给公共输出线。

9. 发明授权

US5646422A Semiconductor integrated circuit device 失效
标题翻译：半导体集成电路器件
公开(公告)号：US5646422A
公开(公告)日：1997-07-08
申请号：US518622
申请日：1995-08-23
申请人： Takeshi Hashizume
发明人： Takeshi Hashizume
IPC分类号： H01L21/82 , G01R31/28 , G01R31/316 , G01R31/3185 , H01L27/02 , H01L27/10
CPC分类号： G01R31/318536 , G01R31/316 , H01L27/0207
摘要： A semiconductor integrated circuit device includes an internal function circuit formed on a first rectangular region on a rectangular semiconductor chip for implementing a function specific to the device, and a predetermined function control circuit formed on a second rectangular region for implementing a fixed function irrespective of the function implemented by said internal function circuit. First and second rectangular regions are separate regions. In the hierarchical design of an integrated circuit device, the circuit of the first rectangular region can be used as the structure component of another integrated circuit on another chip. The predetermined function control circuit can be laid out on the second rectangular region of another chip. The predetermined function control circuit is a testing circuit of boundary scan method, including a standardized structure component.
摘要翻译：半导体集成电路器件包括形成在矩形半导体芯片上的第一矩形区域上的内部功能电路，用于实现器件特有的功能，以及形成在第二矩形区域上的预定功能控制电路，用于实现固定功能，而不管功能由所述内部功能电路实现。第一和第二矩形区域是分开的区域。在集成电路器件的分级设计中，第一个矩形区域的电路可以用作另一个芯片上另一个集成电路的结构元件。预定功能控制电路可布置在另一芯片的第二矩形区域上。预定功能控制电路是边界扫描方法的测试电路，包括标准化的结构部件。

10. 发明授权

US4995039A Circuit for transparent scan path testing of integrated circuit devices 失效
标题翻译：集成电路器件透明扫描路径测试电路
公开(公告)号：US4995039A
公开(公告)日：1991-02-19
申请号：US247289
申请日：1988-09-22
申请人： Kazuhiro Sakashita , Ichiro Tomioka , Takeshi Hashizume
发明人： Kazuhiro Sakashita , Ichiro Tomioka , Takeshi Hashizume
IPC分类号： G01R31/28 , G01R31/3185 , G06F11/22 , H01L21/66
CPC分类号： G01R31/318552
摘要： In a circuit for testing integrated circuit devices, scan registers (8.about.16) and data selecting circuits (20-28) are connected between a plurality of circuit blocks (29.about.31) in correspondence with the number of bits of the data, with the scan registers connected to each other by a shift register path so as to have a function of one shift register as a whole. A register selecting circuit (20.about.28) is connected to a clock input terminal (T1, T2) of the scan register. The scan registers other than those corresponding to the logic circuit block to be tested are selected by the register selecting circuit. Consequently, clocks for scanning scan registers other than those provided before and after the required circuit block are eliminated, enabling reduction of time required for scan test.
摘要翻译：在用于测试集成电路器件的电路中，扫描寄存器（8差分16）和数据选择电路（20-28）根据数据的位数连接在多个电路块（29差分31）之间，扫描寄存器通过移位寄存器路径彼此连接，从而整体上具有一个移位寄存器的功能。寄存器选择电路（20差分28）连接到扫描寄存器的时钟输入端（T1，T2）。除了与要测试的逻辑电路块相对应的扫描寄存器之外的扫描寄存器由寄存器选择电路选择。因此，消除了除所需电路块之前和之后提供的扫描寄存器之外的扫描寄存器的时钟，从而可以减少扫描测试所需的时间。

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