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1. 发明授权

US11913665B2 Pipe connection structure of air-conditioning system 有权
公开(公告)号：US11913665B2
公开(公告)日：2024-02-27
申请号：US17311653
申请日：2019-12-27
申请人： Tae Hyun Kim
发明人： Tae Hyun Kim
IPC分类号： F16L25/00 , F24F13/02 , F16B2/24 , F24F13/06
CPC分类号： F24F13/0209 , F16B2/245 , F24F13/06
摘要： The present invention relates to a pipe connection structure of an air conditioning system, wherein a corrugated pipe (200) is detachably decoupled from/coupled to an object (100) to be coupled, the pipe connection structure comprising: a fixing plate (320) fixed to the object (100) to be coupled; and a clip (300) having a pressing protrusion (350) that is connected to the fixing plate (320) and is convexly formed in a direction facing the fixing plate (320), wherein in the state where the fixing plate (320) is fixed to the object (100) to be coupled, the end of the corrugated pipe (200) is inserted between the fixing plate (320) and the pressing projection (350) and is pressed by the pressing projection (350) so as not to be separated therefrom.

2. 发明授权

US09741261B2 Educational timepiece 有权
公开(公告)号：US09741261B2
公开(公告)日：2017-08-22
申请号：US14395079
申请日：2013-03-26
申请人： Tae-Hyun Kim
发明人： Tae-Hyun Kim
IPC分类号： G09B19/12 , G04B19/06 , G09B19/02
CPC分类号： G09B19/12 , G04B19/06 , G09B19/02
摘要： An educational timepiece provided with the hour hand and the minute hand, which comprises a base plate having an upper surface on which the hour hand and the minute hand rotate, and an angle hand rotating on the upper surface of the base plate for measuring the angle between the hour hand and the minute hand, wherein the angle hand serves to measure the angle between the hour hand and one of the hour indication parts adjacent to the hour hand, the interval between every two adjacent hour indication parts being divided by a given angle.

3. 发明授权

US09471039B2 Watch having gears for observation 有权
标题翻译：观察有齿轮观察
公开(公告)号：US09471039B2
公开(公告)日：2016-10-18
申请号：US14411117
申请日：2013-06-25
申请人： Tae-Hyun Kim
发明人： Tae-Hyun Kim
IPC分类号： G04B13/00 , G04B19/00 , G04B45/00 , G04B45/02 , G04B37/00 , G04B19/04
CPC分类号： G04B37/00 , G04B13/00 , G04B19/04 , G04B45/02
摘要： A watch having gears for observation, including: a watch body; a hand assembly having a second hand, a minute hand or an hour hand to be rotated at a surface of the watch body so as to display a time; gears for observation independently and rotatably provided at one end of the had assembly and to be rotated in a rotation process of the hand assembly; and a driving gear assembly provided at one side of the outside or the inside of the watch body and engaged with the gears for observation. The present invention can utilize the watch as a studying material through the gears for observation which are independently rotated according to the rotation of the hand assembly such as the second hand and the like.
摘要翻译：具有观察齿轮的手表，包括：手表主体; 具有秒针，分针或时针的手组件在手表主体的表面上旋转以便显示时间; 齿轮用于独立且可旋转地设置在组件的一端并在手组件的旋转过程中旋转; 以及驱动齿轮组件，其设置在表体的外侧或内侧的一侧，并与齿轮啮合以进行观察。本发明可以通过用于观察的齿轮将手表用作研究材料，这些齿轮根据诸如二手等的手组件的旋转独立地旋转。

4. 发明授权

US08860109B2 Capacitor-less memory device 有权
标题翻译：无电容存储器件
公开(公告)号：US08860109B2
公开(公告)日：2014-10-14
申请号：US12990353
申请日：2009-04-30
申请人： Jea-Gun Park , Tae-Hun Shim , Gon-Sub Lee , Seong-Je Kim , Tae-Hyun Kim
发明人： Jea-Gun Park , Tae-Hun Shim , Gon-Sub Lee , Seong-Je Kim , Tae-Hyun Kim
IPC分类号： H01L27/108 , H01L29/78 , G11C11/404 , H01L29/423 , G11C16/04 , H01L29/786
CPC分类号： H01L29/4234 , G11C11/404 , G11C16/0466 , G11C2211/4016 , H01L27/10802 , H01L29/7841 , H01L29/78687 , H01L29/78696
摘要： Provided is a capacitorless memory device. The device includes a semiconductor substrate, an insulating layer disposed on the semiconductor substrate, a storage region disposed on a partial region of the insulating layer, a channel region disposed on the storage region to provide a valence band energy offset between the channel region and the storage region, a gate insulating layer and a gate electrode sequentially disposed on the channel region, and source and drain regions connected to the channel region and disposed at both sides of the gate electrode. A storage region having different valence band energy from a channel region is disposed under the channel region unit so that charges trapped in the storage region unit cannot be easily drained. Thus, a charge retention time may be increased to improve data storage capability.
摘要翻译：提供了一种无电容器存储器件。所述器件包括半导体衬底，设置在所述半导体衬底上的绝缘层，设置在所述绝缘层的部分区域上的存储区域，设置在所述存储区域上以在所述沟道区域和所述沟道区域之间提供价带能量偏移的沟道区域顺序地设置在沟道区上的栅极绝缘层和栅电极以及连接到沟道区并设置在栅电极两侧的源极和漏极区。在通道区域单元的下方配置具有与通道区域不同的价带能量的存储区域，使得捕获在存储区域单元中的电荷不容易排出。因此，可以增加电荷保留时间以提高数据存储能力。

5. 发明授权

US08724414B2 System and method to select a reference cell 失效
标题翻译：选择参考单元的系统和方法
公开(公告)号：US08724414B2
公开(公告)日：2014-05-13
申请号：US12702486
申请日：2010-02-09
申请人： Jung Pill Kim , Tae Hyun Kim , Hari M. Rao
发明人： Jung Pill Kim , Tae Hyun Kim , Hari M. Rao
IPC分类号： G11C7/02 , G11C7/14 , G11C29/00 , G11C8/12
CPC分类号： G11C7/14 , G11C8/12 , G11C11/1673 , G11C29/808
摘要： A system and method to select a reference cell is disclosed. In a particular embodiment, a method is disclosed that includes receiving an address corresponding to a bit cell within a first bank of a memory. The method also includes accessing a second reference cell of a second bank of the memory in response to a first reference cell in the first bank being indicated as bypassed.
摘要翻译：公开了一种选择参考单元的系统和方法。在特定实施例中，公开了一种方法，其包括接收对应于存储器的第一组内的位单元的地址。该方法还包括响应于第一组中的第一参考单元被指示为旁路而访问存储器的第二组的第二参考单元。

6. 发明授权

US08593173B2 Programmable logic sensing in magnetic random access memory 有权
标题翻译：磁性随机存取存储器中的可编程逻辑检测
公开(公告)号：US08593173B2
公开(公告)日：2013-11-26
申请号：US13244962
申请日：2011-09-26
申请人： Jung Pill Kim , Tae Hyun Kim , Wenqing Wu , Xiaochun Zhu , Seung H. Kang
发明人： Jung Pill Kim , Tae Hyun Kim , Wenqing Wu , Xiaochun Zhu , Seung H. Kang
IPC分类号： H03K19/177
CPC分类号： G11C11/16 , G11C13/0069 , H03K19/02 , H03K19/20
摘要： A Magnetic Random Access Memory (MRAM) logic circuit includes read sensing circuitry having a first level corresponding to a first category of logic circuitry and a second logic level corresponding to a second category of logic circuitry. The logic circuitry may be switchable between circuitry having the first logic level and circuitry having the second logic level according to the category of the logic circuit being implemented.
摘要翻译：磁性随机存取存储器（MRAM）逻辑电路包括具有对应于第一类逻辑电路的第一电平的读取感测电路和对应于第二类逻辑电路的第二逻辑电平。逻辑电路可以在具有第一逻辑电平的电路和具有第二逻辑电平的电路之间根据所实现的逻辑电路的类别来切换。

7. 发明授权

US08575753B2 Semiconductor device having a conductive structure including oxide and non oxide portions 有权
标题翻译：具有包括氧化物和非氧化物部分的导电结构的半导体器件
公开(公告)号：US08575753B2
公开(公告)日：2013-11-05
申请号：US12787056
申请日：2010-05-25
申请人： Suk-hun Choi , Ki-ho Bae , Yi-koan Hong , Kyung-hyun Kim , Tae-hyun Kim , Kyung-tae Nam , Jun-ho Jeong
发明人： Suk-hun Choi , Ki-ho Bae , Yi-koan Hong , Kyung-hyun Kim , Tae-hyun Kim , Kyung-tae Nam , Jun-ho Jeong
IPC分类号： H01L29/40
CPC分类号： H01L27/228 , H01L21/76831 , H01L21/76834 , H01L21/76856 , H01L21/76888 , H01L23/5228 , H01L27/1021 , H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/126 , H01L45/144 , H01L45/1666 , H01L45/1683 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes an interlayer insulating layer disposed on a substrate, the interlayer insulating layer comprising an opening exposing the substrate, a barrier layer pattern disposed within the opening, and a conductive pattern disposed on the barrier layer pattern, the conductive pattern having an oxidized portion extending out of the opening and a non-oxidized portion within the opening, wherein a width of the conductive pattern is determined by a thickness of the barrier layer pattern.
摘要翻译：半导体器件包括设置在衬底上的层间绝缘层，所述层间绝缘层包括露出衬底的开口，设置在所述开口内的阻挡层图案以及设置在所述阻挡层图案上的导电图案，所述导电图案具有氧化从开口延伸的部分和开口内的非氧化部分，其中导电图案的宽度由阻挡层图案的厚度确定。

8. 发明授权

US08547736B2 Generating a non-reversible state at a bitcell having a first magnetic tunnel junction and a second magnetic tunnel junction 有权
标题翻译：在具有第一磁性隧道结和第二磁性隧道结的位单元处产生不可逆状态
公开(公告)号：US08547736B2
公开(公告)日：2013-10-01
申请号：US12849043
申请日：2010-08-03
申请人： Hari M. Rao , Jung Pill Kim , Seung H. Kang , Xiaochun Zhu , Tae Hyun Kim , Kangho Lee , Xia Li , Wah Nam Hsu , Wuyang Hao , Jungwon Suh , Nicholas K. Yu , Matthew Michael Nowak , Steven M. Millendorf , Asaf Ashkenazi
发明人： Hari M. Rao , Jung Pill Kim , Seung H. Kang , Xiaochun Zhu , Tae Hyun Kim , Kangho Lee , Xia Li , Wah Nam Hsu , Wuyang Hao , Jungwon Suh , Nicholas K. Yu , Matthew Michael Nowak , Steven M. Millendorf , Asaf Ashkenazi
IPC分类号： G11C11/14
CPC分类号： G11C11/16 , G11C11/14 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C17/02 , G11C17/16 , G11C29/027
摘要： A method of generating a non-reversible state at a bitcell having a first magnetic tunnel junction (MTJ) and a second MTJ includes applying a program voltage to the first MTJ of the bitcell without applying the program voltage to the second MTJ of the bitcell. A memory device includes a bitcell having a first MTJ and a second MTJ and programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell.
摘要翻译：在具有第一磁性隧道结（MTJ）和第二MTJ的位单元处产生不可逆状态的方法包括将编程电压施加到位单元的第一MTJ，而不将编程电压施加到位单元的第二MTJ。存储器件包括具有第一MTJ和第二MTJ的位单元以及被配置为通过将程序信号施加到位单元的第一MTJ和第二MTJ中的所选择的一个而在位单元处产生不可逆状态的编程电路。

9. 发明授权

US08537606B2 Read sensing circuit and method with equalization timing 有权
标题翻译：读取具有均衡定时的感测电路和方法
公开(公告)号：US08537606B2
公开(公告)日：2013-09-17
申请号：US13033109
申请日：2011-02-23
申请人： Jung Pill Kim , Tae Hyun Kim
发明人： Jung Pill Kim , Tae Hyun Kim
IPC分类号： G11C11/14 , G11C7/00
CPC分类号： G11C7/08 , G11C11/1673
摘要： A Magnetic Random Access Memory (MRAM) includes read sensing circuitry having an equalizer device configured between a bit cell output node and a reference node of the bit cell. The equalizer is turned on to couple the output node to the reference node during an initial portion of a read operation and to decouple the output node from the reference node after an equalization delay period. A sense amplifier is enabled to provide a data output from the bit cell only after the delay period and decoupling of the output node from the reference node to provide balanced sensing speed of data represented by parallel and antiparallel state magnetic tunnel junctions (MTJs).
摘要翻译：磁性随机存取存储器（MRAM）包括具有配置在比特单元输出节点和比特单元的参考节点之间的均衡器装置的读取感测电路。在读操作的初始部分期间，均衡器被导通以将输出节点耦合到参考节点，并且在均衡延迟周期之后将输出节点与参考节点去耦。读出放大器能够仅在延迟周期之后从位单元提供数据输出，并且将输出节点与参考节点解耦，以提供由并行和反并联状态磁隧道结（MTJ）表示的数据的平衡感测速度。

10. 发明授权

US08519465B2 Semiconductor device and method of fabricating the same 有权
公开(公告)号：US08519465B2
公开(公告)日：2013-08-27
申请号：US13553386
申请日：2012-07-19
申请人： Jung-Hwan Kim , Hun-Hyeoung Leam , Tae-Hyun Kim , Seok-Woo Nam , Hyun Namkoong , Yong-Seok Kim , Tea-Kwang Yu
发明人： Jung-Hwan Kim , Hun-Hyeoung Leam , Tae-Hyun Kim , Seok-Woo Nam , Hyun Namkoong , Yong-Seok Kim , Tea-Kwang Yu
IPC分类号： H01L29/76
CPC分类号： H01L29/785 , H01L21/28282 , H01L21/308 , H01L21/76224 , H01L21/76232 , H01L21/823481 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L29/0649 , H01L29/0653 , H01L29/0657 , H01L29/1079 , H01L29/42352 , H01L29/66818 , H01L29/66833 , H01L29/7851 , H01L29/7854 , H01L2029/7858
摘要： A semiconductor device includes an isolation layer defining an active region formed in a semiconductor substrate. A first recessing process is performed on the isolation layer to expose edge portions of the active region. A first rounding process is performed to round the edge portions of the active region. A second recessing process is performed on the isolation layer. A second rounding process is performed to round the edge portions of the active region.

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