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1. 发明授权

US09043377B2 Montgomery inverse calculation device and method of calculating montgomery inverse using the same 有权
标题翻译：蒙哥马利逆计算装置和计算montgomery逆的方法相同
公开(公告)号：US09043377B2
公开(公告)日：2015-05-26
申请号：US13361329
申请日：2012-01-30
申请人： Young Sik Kim , Kyoung Moon Ahn , Jong Hoon Shin , Sun-Soo Shin , Ji-Su Kang
发明人： Young Sik Kim , Kyoung Moon Ahn , Jong Hoon Shin , Sun-Soo Shin , Ji-Su Kang
IPC分类号： G06F7/38 , G06F5/01 , G06F7/72 , G06F7/48 , G06F7/52 , G06F7/544
CPC分类号： G06F5/01 , G06F7/48 , G06F7/52 , G06F7/544 , G06F7/728
摘要： A Montgomery inverse calculation device includes a plurality of registers each storing a value of a variable, a modulus register storing a modulus, a multiplier performing multiplication on the modulus. A comparator compares the value of the variable stored in each of the registers with an output value of the multiplier and generates a plurality of control signals. A plurality of shifters shifts bits of a value of a variable stored in a corresponding register among the registers in response to at least one first control signal, and a quotient generation block calculates a quotient of mod 2m with respect to values output from some of the shifters in response to a second control signal. A calculation block calculates an updated value of an output value of each of the shifters using the quotient in response to at least one third control signal.
摘要翻译：蒙哥马利逆计算装置包括多个寄存器，每个寄存器存储变量的值，存储模数的模数寄存器，对模数执行乘法的乘法器。比较器将存储在每个寄存器中的变量的值与乘法器的输出值进行比较，并产生多个控制信号。响应于至少一个第一控制信号，多个移位器根据至少一个第一控制信号来移位存储在寄存器中的相应寄存器中的值的位，并且商生成块相对于从一些第一控制信号输出的值计算mod 2m的商移位器响应于第二控制信号。计算块响应于至少一个第三控制信号，使用商来计算每个移位器的输出值的更新值。

2. 发明授权

US08458242B2 Modular multiplier apparatus with reduced critical path of arithmetic operation and method of reducing the critical path of arithmetic operation in arithmetic operation apparatus 有权
标题翻译：具有降低运算运算关键路径的模块化乘法器和降低算术运算装置运算运算关键路径的方法
公开(公告)号：US08458242B2
公开(公告)日：2013-06-04
申请号：US12660382
申请日：2010-02-25
申请人： Young-sik Kim , Mi-jung Noh , Kyoung-moon Ahn , Sun-soo Shin
发明人： Young-sik Kim , Mi-jung Noh , Kyoung-moon Ahn , Sun-soo Shin
IPC分类号： G06F7/72
CPC分类号： G06F7/728
摘要： Provided are a modular multiplier apparatus in which a value of a long path carry (LPC) is predicted to reduce a critical path of an arithmetic operation of Montgomery modular multiplication, and a method of reducing the critical path of the arithmetic operation. The modular multiplier apparatus for obtaining a quotient and a result of an arithmetic operation of modular multiplication by using a modulus and two arbitrary constants includes: a reduction unit for obtaining a short path carry (SPC) included when a result of a modular arithmetic operation is obtained at a current stage, by using a medium calculation result; a carry predictor for predicting a long path carry (LPC) included when the result of the modular arithmetic operation is obtained at the current stage, by using the medium calculation result; and an accumulator for accumulating the result of the modular arithmetic operation by using the SPC and the LPC, wherein the medium calculation result is obtained by adding a result of a modular arithmetic operation obtained at a previous stage and a partial product of the two constants obtained at the current stage.
摘要翻译：提供了一种模数乘法器装置，其中预测长路径进位（LPC）的值以减少蒙哥马利乘法运算的关键路径，以及减少算术运算的关键路径的方法。用于通过使用模数和两个任意常数来获得商和乘法运算的结果的模乘法器包括：用于获得当模运算的结果为包括的短路径进位（SPC）的缩小单元是通过使用中等计算结果在当前阶段获得; 通过使用介质计算结果，当在当前阶段获得模数运算的结果时，预测包含的长路径进位（LPC）的进位预测器; 以及用于通过使用SPC和LPC累积模数运算结果的累加器，其中，通过将前一阶段获得的模运算结果和获得的两个常数的部分乘积相加得到介质计算结果在目前阶段。

3. 发明授权

US08407270B2 Methods of calculating negative inverse of modulus 有权
标题翻译：计算模数负数的方法
公开(公告)号：US08407270B2
公开(公告)日：2013-03-26
申请号：US12618283
申请日：2009-11-13
申请人： Young-sik Kim , Mi-jung Noh , Kyoung-moon Ahn , Sun-soo Shin
发明人： Young-sik Kim , Mi-jung Noh , Kyoung-moon Ahn , Sun-soo Shin
IPC分类号： G06F7/38
CPC分类号： G06F7/72 , G06F7/721 , G06F7/728
摘要： Provided is a method of calculating a negative inverse of a modulus, wherein the negative inverse, which is an essential element in Montgomery multiplication, is quickly obtained. The method includes setting a modulus, defining P obtained by converting the modulus to a negative number, and defining S obtained by subtracting 1 from P, and calculating a negative inverse of the modulus by using P and S.
摘要翻译：提供了一种计算模数的负逆的方法，其中快速获得作为蒙哥马利乘法中的基本要素的负逆。该方法包括设定模量，通过将模数转换为负数来定义P，并定义通过从P中减去1获得的S，并且通过使用P和S计算模量的负逆。

4. 发明申请

US20120197953A1 MONTGOMERY INVERSE CALCULATION DEVICE AND METHOD OF CALCULATING MONTGOMERY INVERSE USING THE SAME 有权
标题翻译：蒙特卡洛反相计算装置和使用该方法计算单体反演的方法
公开(公告)号：US20120197953A1
公开(公告)日：2012-08-02
申请号：US13361329
申请日：2012-01-30
申请人： Young Sik KIM , Kyoung Moon Ahn , Jong Hoon Shin , Sun-Soo Shin , Ji-Su Kang
发明人： Young Sik KIM , Kyoung Moon Ahn , Jong Hoon Shin , Sun-Soo Shin , Ji-Su Kang
IPC分类号： G06F7/544 , G06F7/48 , G06F7/52 , G06F5/01
CPC分类号： G06F5/01 , G06F7/48 , G06F7/52 , G06F7/544 , G06F7/728
摘要： A Montgomery inverse calculation device includes a plurality of registers each storing a value of a variable, a modulus register storing a modulus, a multiplier performing multiplication on the modulus. A comparator compares the value of the variable stored in each of the registers with an output value of the multiplier and generates a plurality of control signals. A plurality of shifters shifts bits of a value of a variable stored in a corresponding register among the registers in response to at least one first control signal, and a quotient generation block calculates a quotient of mod 2m with respect to values output from some of the shifters in response to a second control signal. A calculation block calculates an updated value of an output value of each of the shifters using the quotient in response to at least one third control signal.
摘要翻译：蒙哥马利逆计算装置包括多个寄存器，每个寄存器存储变量的值，存储模数的模数寄存器，对模数执行乘法的乘法器。比较器将存储在每个寄存器中的变量的值与乘法器的输出值进行比较，并产生多个控制信号。响应于至少一个第一控制信号，多个移位器根据至少一个第一控制信号来移位存储在寄存器中的对应寄存器中的值的位，并且商生成块相对于从一些第一控制信号输出的值计算mod 2m的商移位器响应于第二控制信号。计算块响应于至少一个第三控制信号，使用商来计算每个移位器的输出值的更新值。

5. 发明授权

US08706788B2 Modular calculator, operation method of the modular calculator, and apparatuses having the same 有权
标题翻译：模块化计算器，模块化计算器的操作方法，以及具有该计算器的装置
公开(公告)号：US08706788B2
公开(公告)日：2014-04-22
申请号：US13241778
申请日：2011-09-23
申请人： Jong Hoon Shin , Kyoung Moon Ahn , Young Sik Kim , Sun-Soo Shin , Ji-Su Kang
发明人： Jong Hoon Shin , Kyoung Moon Ahn , Young Sik Kim , Sun-Soo Shin , Ji-Su Kang
IPC分类号： G06F7/72
CPC分类号： G06F7/72
摘要： A modular calculator and a method of performing a modular calculation are provided. The modular calculator includes a first register to receive and to store a first integer, a second register to receive and to store a second integer, a calculator connected to an output terminal of the first register and an output terminal of the second register, and a controller to determine an arithmetic operation of the calculator by referring to a sign of the first integer and a sign of the second integer and to control the calculator to perform the determined arithmetic operation on one of an addition and a subtraction of the first integer and the second integer and a modulus value.
摘要翻译：提供了一种模块化计算器和一种执行模数计算的方法。模块化计算器包括：第一寄存器，用于接收和存储第一整数;第二寄存器，用于接收和存储第二整数;连接到第一寄存器的输出端的计算器和第二寄存器的输出端，以及控制器通过参考第一整数的符号和第二整数的符号来确定计算器的算术运算，并且控制计算器对第一整数的加法和减法之一执行所确定的算术运算，第二整数和模数值。

6. 发明申请

US20110231467A1 MONTGOMERY MULTIPLIER HAVING EFFICIENT HARDWARE STRUCTURE 有权
标题翻译：具有有效硬件结构的蒙特卡罗公司
公开(公告)号：US20110231467A1
公开(公告)日：2011-09-22
申请号：US13052524
申请日：2011-03-21
申请人： Kyoung-moon AHN , Young-sik Kim , Jong-hoon Shin , Sun-soo Shin , Ji-su Kang
发明人： Kyoung-moon AHN , Young-sik Kim , Jong-hoon Shin , Sun-soo Shin , Ji-su Kang
IPC分类号： G06F7/487 , G06F7/485
CPC分类号： G06F7/728
摘要： A radix-2k Montgomery multiplier including an input coefficient generation unit to receive a multiplier, a multiplicand, a modulus, a sum and a previous sum, to generate and to output a partial product and a multiple modulus by using at least one of the multiplier, the multiplicand, the modulus and the sum, and to divide and to output the received previous sum into units of k bits, an accumulator circuit to receive the partial product, the multiple modulus and k bits of the previous sum from the input coefficient generation unit, and to generate and to output a carry and a sum by summing the partial product, the multiple modulus and the previous sum, and a carry propagation adder (CPA) circuit to generate and to output an ultimate sum by using the carry and the sum.
摘要翻译：一个radix-2k蒙哥马利乘数器，其包括用于接收乘法器的输入系数产生单元，乘法器，模数，和和先前和，以通过使用乘法器中的至少一个来产生和输出部分乘积和多重模数，被乘数，模数和和，并且将接收的先前和除以并输出到k位的单位，用于接收部分乘积的累加器电路，来自输入系数生成的先前和的多个模数和k个比特并且通过将部分乘积，多重模量和前一个和相加来产生和输出一个进位和一个和以及一个进位传播加法器（CPA）电路，以通过使用进位和运算来产生和输出最终和和。

7. 外观设计

USD622537S1 Gas oven range 有权
公开(公告)号：USD622537S1
公开(公告)日：2010-08-31
申请号：US29355492
申请日：2010-02-09
申请人： Tae Youn Kim , Jeong Min Kim , Sun Soo Shin
设计人： Tae Youn Kim , Jeong Min Kim , Sun Soo Shin

8. 发明申请

US20120317159A1 MODULAR OPERATOR, DEVICE HAVING THE SAME, AND OPERATING METHOD THEREOF 审中-公开
标题翻译：模块化操作器，具有该操作器的装置及其操作方法
公开(公告)号：US20120317159A1
公开(公告)日：2012-12-13
申请号：US13451815
申请日：2012-04-20
申请人： Kyoung Moon Ahn , Jong Hoon Shin , Ji-Su Kang , Sun-Soo Shin
发明人： Kyoung Moon Ahn , Jong Hoon Shin , Ji-Su Kang , Sun-Soo Shin
IPC分类号： G06F7/48 , G06F5/01
CPC分类号： G06F7/72
摘要： A modular operator, a smart card including the same, and a method of operating the same are provided. The modular operator includes: an input unit configured to receive first data, second data, and a modulus; and an accumulator configured to perform an accumulation operation on the first data and a first portion of the second data, to shift the accumulation operation result to the right as much as the number of bits of the first portion, and to perform an accumulation operation on a result of a shifted accumulation operation, a second part, of the second data, which is shifted to the right as much as the number of bits of the first portion, and the modulus.
摘要翻译：提供了一种模块化操作员，包括其的智能卡及其操作方法。模块化操作员包括：输入单元，被配置为接收第一数据，第二数据和模数; 以及累加器，其被配置为对所述第一数据和所述第二数据的第一部分执行累加操作，以将所述累积运算结果向所述第一部分的比特数的右侧移动，并且对所述累加操作执行累加操作第二数据的移位累积操作的结果，第二数据的第二部分，其被移位到与第一部分的位数一样多的右侧和模数。

9. 发明申请

US20120096062A1 MODULAR CALCULATOR, OPERATION METHOD OF THE MODULAR CALCULATOR, AND APPARATUSES HAVING THE SAME 有权
标题翻译：模块化计算器，模块化计算器的操作方法及其设备
公开(公告)号：US20120096062A1
公开(公告)日：2012-04-19
申请号：US13241778
申请日：2011-09-23
申请人： Jong Hoon SHIN , Kyoung Moon AHN , Young Sik KIM , Sun-Soo SHIN , Ji-Su KANG
发明人： Jong Hoon SHIN , Kyoung Moon AHN , Young Sik KIM , Sun-Soo SHIN , Ji-Su KANG
IPC分类号： G06F7/50
CPC分类号： G06F7/72
摘要： A modular calculator and a method of performing a modular calculation are provided. The modular calculator includes a first register to receive and to store a first integer, a second register to receive and to store a second integer, a calculator connected to an output terminal of the first register and an output terminal of the second register, and a controller to determine an arithmetic operation of the calculator by referring to a sign of the first integer and a sign of the second integer and to control the calculator to perform the determined arithmetic operation on one of an addition and a subtraction of the first integer and the second integer and a modulus value.
摘要翻译：提供了一种模块化计算器和一种执行模数计算的方法。模块化计算器包括：第一寄存器，用于接收和存储第一整数;第二寄存器，用于接收和存储第二整数;连接到第一寄存器的输出端的计算器和第二寄存器的输出端，以及控制器通过参考第一整数的符号和第二整数的符号来确定计算器的算术运算，并且控制计算器对第一整数的加法和减法之一执行所确定的算术运算，第二整数和模数值。

10. 发明申请

US20100293216A1 Modular multiplier apparatus with reduced critical path of arithmetic operation and method of reducing the critical path of arithmetic operation in arithmetic operation apparatus 有权
标题翻译：具有降低运算运算关键路径的模块化乘法器和降低算术运算装置运算运算关键路径的方法
公开(公告)号：US20100293216A1
公开(公告)日：2010-11-18
申请号：US12660382
申请日：2010-02-25
申请人： Young-sik Kim , Mi-jung Noh , Kyoung-moon Ahn , Sun-soo Shin
发明人： Young-sik Kim , Mi-jung Noh , Kyoung-moon Ahn , Sun-soo Shin
IPC分类号： G06F7/72
CPC分类号： G06F7/728
摘要： Provided are a modular multiplier apparatus in which a value of a long path carry (LPC) is predicted to reduce a critical path of an arithmetic operation of Montgomery modular multiplication, and a method of reducing the critical path of the arithmetic operation. The modular multiplier apparatus for obtaining a quotient and a result of an arithmetic operation of modular multiplication by using a modulus and two arbitrary constants includes: a reduction unit for obtaining a short path carry (SPC) included when a result of a modular arithmetic operation is obtained at a current stage, by using a medium calculation result; a carry predictor for predicting a long path carry (LPC) included when the result of the modular arithmetic operation is obtained at the current stage, by using the medium calculation result; and an accumulator for accumulating the result of the modular arithmetic operation by using the SPC and the LPC, wherein the medium calculation result is obtained by adding a result of a modular arithmetic operation obtained at a previous stage and a partial product of the two constants obtained at the current stage.
摘要翻译：提供了一种模数乘法器装置，其中预测长路径进位（LPC）的值以减少蒙哥马利乘法运算的关键路径，以及减少算术运算的关键路径的方法。用于通过使用模数和两个任意常数获得商乘积和算术运算结果的模乘法器包括：用于获得当模运算结果为包括的短路径进位（SPC）的缩小单元是通过使用中等计算结果在当前阶段获得; 通过使用介质计算结果，当在当前阶段获得模数运算的结果时，预测包含的长路径进位（LPC）的进位预测器; 以及用于通过使用SPC和LPC累积模数运算结果的累加器，其中，通过将前一阶段获得的模运算结果和获得的两个常数的部分乘积相加得到介质计算结果在目前阶段。

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