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    • 4. 发明授权
    • Process sequence for doped silicon fill of deep trenches
    • 深沟槽掺杂硅填充工艺顺序
    • US07109097B2
    • 2006-09-19
    • US11011550
    • 2004-12-14
    • Ajit ParanjpeSomnath Nag
    • Ajit ParanjpeSomnath Nag
    • H01L21/04
    • C23C16/045C23C16/24H01L21/76232H01L29/66181
    • A method for void free filling with in-situ doped amorphous silicon of a deep trench structure is provided in which a first fill is carried out in at a temperature, pressure and dopant to silane ratio such that film deposition occurs from the bottom of the trench upwards. By way of this first fill, step coverages well in excess 100% are achieved. In the second fill step, deposition is carried out under changed conditions so as to reduce the impact of dopant on deposition rate, whereby trench fill is completed at a deposition rate which exceeds the deposition rate of the first fill. In an application of this method to the formation of deep trench capacitor structures, the intermediate steps further including the capping of the void free filled trench with a thick layer of amorphous silicon, planarization of the wafer thereafter, followed by a thermal anneal to re-distribute the dopant within the filled trench. Thereafter, additional steps can be performed to complete the formation of the capacitor structure.
    • 提供了一种无空隙填充深沟槽结构的原位掺杂非晶硅的方法,其中在硅烷比例的温度,压力和掺杂剂下进行第一次填充,使得从沉积的底部发生膜沉积 向上。 通过这个第一次填充,达到100%以上的步骤覆盖率。 在第二填充步骤中,在改变的条件下进行沉积,以减少掺杂剂对沉积速率的影响,由此以超过第一填充物的沉积速率的沉积速率完成沟槽填充。 在这种方法应用于深沟槽电容器结构的形成中,中间步骤进一步包括无孔填充沟槽的覆盖,其中厚层非晶硅,之后对晶片进行平面化,随后进行热退火, 在填充的沟槽内分布掺杂剂。 此后,可以执行附加步骤以完成电容器结构的形成。
    • 7. 发明申请
    • HIGH-PRODUCTIVITY POROUS SEMICONDUCTOR MANUFACTURING EQUIPMENT
    • 高效多孔半导体制造设备
    • US20110030610A1
    • 2011-02-10
    • US12774667
    • 2010-05-05
    • George D. KamianSomnath NagSubbu TamilmaniMehrdad M. MoslehiKarl-Josef KramerTakao Yonehara
    • George D. KamianSomnath NagSubbu TamilmaniMehrdad M. MoslehiKarl-Josef KramerTakao Yonehara
    • C25F3/12C25F7/00C30B19/08C30B23/06C30B25/10
    • C25D11/32C25D11/005C25D17/001C25D17/06C25F3/12C25F7/00H01L31/1892Y02E10/50
    • This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further the disclosure is applicable to the general fields of Photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.
    • 本公开使得能够高生产率地制造基于半导体的分离层(由单层或多层多孔半导体(例如多孔硅,包括单孔隙率或多孔度层构成),光反射器(由多层/多孔多孔半导体 孔隙度多孔半导体如多孔硅),用于防反射涂层的多孔半导体(例如多孔硅)的形成,钝化层和多结的多带隙太阳能电池(例如,通过形成可变带隙 晶体硅薄膜或晶圆太阳能电池上的多孔硅发射器)。 其他应用包括制造用于脱模和MEMS器件制造,膜形成和浅沟槽隔离(STI)多孔硅的MEMS分离和牺牲层(使用具有最佳孔隙率并随后氧化的多孔硅形成)。 此外,本公开可应用于光伏,MEMS(包括传感器和致动器)的独立或集成半导体微电子,半导体微电子芯片和光电子学的一般领域。