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1. 发明授权

US09153597B2 Methods of manufacturing a three-dimensional semiconductor device 有权
标题翻译：制造三维半导体器件的方法
公开(公告)号：US09153597B2
公开(公告)日：2015-10-06
申请号：US13616254
申请日：2012-09-14
申请人： Young-Hoo Kim , Sang Won Bae , Kuntack Lee , Hyosan Lee
发明人： Young-Hoo Kim , Sang Won Bae , Kuntack Lee , Hyosan Lee
IPC分类号： H01L21/336 , H01L27/115 , H01L21/3105 , H01L21/311
CPC分类号： H01L27/11582 , H01L21/3105 , H01L21/31111 , H01L27/11556
摘要： The inventive concept provides methods of manufacturing three-dimensional semiconductor devices. In some embodiments, the methods include forming a stack structure including sacrificial layers and insulation layers, forming a trench penetrating the stack structure, forming a hydrophobic passivation element on the surfaces of the insulation layers that were exposed by the trench and selectively removing the sacrificial layers.
摘要翻译：本发明构思提供制造三维半导体器件的方法。在一些实施例中，所述方法包括形成包括牺牲层和绝缘层的堆叠结构，形成穿透堆叠结构的沟槽，在绝缘层的表面上形成疏水钝化元件，该绝缘层被沟槽暴露并选择性地去除牺牲层。

2. 发明申请

US20100178755A1 Method of fabricating nonvolatile memory device 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US20100178755A1
公开(公告)日：2010-07-15
申请号：US12657092
申请日：2010-01-13
申请人： Hyosan Lee , Boun Yoon , Kuntack Lee , Donghyun Kim , Daehyuk Kang , Imsoo Park , Youngok Kim , Young-Hoo Kim , Sang Won Bae
发明人： Hyosan Lee , Boun Yoon , Kuntack Lee , Donghyun Kim , Daehyuk Kang , Imsoo Park , Youngok Kim , Young-Hoo Kim , Sang Won Bae
IPC分类号： H01L21/20
CPC分类号： H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/66825 , H01L29/7881
摘要： A method of fabricating a nonvolatile memory device with a three-dimensional structure includes alternately stacking first and second material layers in two or more layers on a semiconductor substrate, forming trenches penetrating the stacked first and second material layers by performing a first etching process, and removing the second material layers exposed in the trenches by performing a second etching process. The first and second material layers are formed of materials that have the same main component but have different impurity contents, respectively.
摘要翻译：一种制造具有三维结构的非易失性存储器件的方法包括在半导体衬底上交替堆叠两层或多层第一和第二材料层，通过执行第一蚀刻工艺形成贯穿层叠的第一和第二材料层的沟槽，以及通过执行第二蚀刻工艺去除在沟槽中暴露的第二材料层。第一和第二材料层由具有相同主要成分但具有不同杂质含量的材料形成。

3. 发明授权

US08940182B2 Compositions for etching and methods of forming a semiconductor device using the same 有权
标题翻译：用于蚀刻的组合物和使用其形成半导体器件的方法
公开(公告)号：US08940182B2
公开(公告)日：2015-01-27
申请号：US13601064
申请日：2012-08-31
申请人： Young-Taek Hong , Jinuk Lee , Junghun Lim , Jaewan Park , Chanjin Jeong , Hoon Han , Seonghwan Park , Yanghwa Lee , Sang Won Bae , Daehong Eom , Byoungmoon Yoon , Jihoon Jeong , Kyunghyun Kim , Kyounghwan Kim , ChangSup Mun , Se-Ho Cha , Yongsun Ko
发明人： Young-Taek Hong , Jinuk Lee , Junghun Lim , Jaewan Park , Chanjin Jeong , Hoon Han , Seonghwan Park , Yanghwa Lee , Sang Won Bae , Daehong Eom , Byoungmoon Yoon , Jihoon Jeong , Kyunghyun Kim , Kyounghwan Kim , ChangSup Mun , Se-Ho Cha , Yongsun Ko
IPC分类号： C09K13/06 , C09K13/04 , C23F1/16 , H01L21/311 , H01L29/66 , H01L29/788 , H01L29/792 , H01L27/115
CPC分类号： H01L21/02658 , C09K13/04 , C09K13/06 , C23F1/16 , H01L21/31111 , H01L27/11556 , H01L27/11582 , H01L29/66825 , H01L29/66833 , H01L29/7889 , H01L29/7926
摘要： Etching compositions are provided. The etching composition includes a phosphoric acid, ammonium ions and a silicon compound. The silicon compound includes a silicon atom, an atomic group having an amino group combined with the silicon atom, and at least two oxygen atoms combined with the silicon atom. Methods utilizing the etching compositions are also provided.
摘要翻译：提供蚀刻组合物。蚀刻组合物包括磷酸，铵离子和硅化合物。硅化合物包括硅原子，具有与硅原子结合的氨基的原子团以及与硅原子结合的至少两个氧原子。还提供了利用蚀刻组合物的方法。

4. 发明授权

US08795541B2 Substrate processing method and substrate processing system for performing the same 有权
标题翻译：基板处理方法及其基板处理系统
公开(公告)号：US08795541B2
公开(公告)日：2014-08-05
申请号：US13314791
申请日：2011-12-08
申请人： Yong-Jhin Cho , Kun-Tack Lee , Hyo-San Lee , Young-Hoo Kim , Jung-Won Lee , Sang-Won Bae , Jung-Min Oh
发明人： Yong-Jhin Cho , Kun-Tack Lee , Hyo-San Lee , Young-Hoo Kim , Jung-Won Lee , Sang-Won Bae , Jung-Min Oh
IPC分类号： H01L21/66 , H01L21/02
CPC分类号： H01L21/67023 , B08B7/0021 , H01L21/0206 , H01L21/02104 , H01L21/31111 , H01L22/00 , H01L22/26 , H01L27/10852 , H01L28/90
摘要： In a supercritical fluid method a supercritical fluid is supplied into a process chamber. The supercritical fluid is discharged from the process chamber as a supercritical fluid process proceeds. A concentration of a target material included in the supercritical fluid discharged from the process chamber is detected during the supercritical fluid process. An end point of the supercritical fluid process may be determined based on a detected concentration of the target material.
摘要翻译：在超临界流体法中，将超临界流体供应到处理室中。当超临界流体处理进行时，超临界流体从处理室排出。在超临界流体处理中检测从处理室排出的超临界流体中包含的目标材料的浓度。超临界流体处理的终点可以基于检测到的目标材料的浓度来确定。

5. 发明授权

US08344385B2 Vertical-type semiconductor device 有权
标题翻译：垂直型半导体器件
公开(公告)号：US08344385B2
公开(公告)日：2013-01-01
申请号：US12872270
申请日：2010-08-31
申请人： Young-Hoo Kim , Hyo-San Lee , Sang-Won Bae , Bo-Un Yoon , Kun-Tack Lee
发明人： Young-Hoo Kim , Hyo-San Lee , Sang-Won Bae , Bo-Un Yoon , Kun-Tack Lee
IPC分类号： H01L29/06 , H01L29/792
CPC分类号： H01L27/11578 , H01L27/11556 , H01L27/11582
摘要： In a vertical-type non-volatile memory device, an insulation layer pattern is provided on a substrate, the insulation layer pattern having a linear shape. Single-crystalline semiconductor patterns are provided on the substrate to make contact with both sidewalls of the insulation layer pattern, the single-crystalline semiconductor patterns having a pillar shape that extends in a vertical direction relative to the substrate. A tunnel oxide layer is provided on the single-crystalline semiconductor pattern. A lower electrode layer pattern is provided on the tunnel oxide layer and on the substrate. A plurality of insulation interlayer patterns is provided on the lower electrode layer pattern, the insulation interlayer patterns being spaced apart from one another by a predetermined distance along the single-crystalline semiconductor pattern. A charge-trapping layer and a blocking dielectric layer are sequentially formed on the tunnel oxide layer between the insulation interlayer patterns. A plurality of control gate patterns is provided on the blocking dielectric layer between the insulation interlayer patterns. An upper electrode layer pattern is provided on the tunnel oxide layer and on the uppermost insulation interlayer pattern.
摘要翻译：在垂直型非易失性存储器件中，在衬底上设置绝缘层图案，绝缘层图案具有直线形状。单晶半导体图案设置在基板上以与绝缘层图案的两个侧壁接触，单晶半导体图案具有相对于基板在垂直方向上延伸的柱状。隧道氧化物层设置在单晶半导体图案上。在隧道氧化物层和衬底上提供下电极层图案。在下电极层图案上设置多个绝缘层间图案，绝缘层间图案沿着单晶半导体图案彼此隔开预定距离。在绝缘层间图案之间的隧道氧化物层上依次形成电荷捕获层和阻挡介质层。在绝缘夹层图案之间的阻挡介质层上设置多个控制栅极图案。在隧道氧化物层和最上层的绝缘层间图案上设置上电极层图案。

6. 发明申请

US20130092872A1 COMPOSITIONS FOR ETCHING AND METHODS OF FORMING A SEMICONDUCTOR DEVICE USING THE SAME 有权
公开(公告)号：US20130092872A1
公开(公告)日：2013-04-18
申请号：US13601064
申请日：2012-08-31
申请人： Young-Taek Hong , Jinuk Lee , Junghun Lim , Jaewan Park , Chanjin Jeong , Hoon Han , Seonghwan Park , Yanghwa Lee , Sang Won Bae , Daehong Eom , Byoungmoon Yoon , Jihoon Jeong , Kyunghyun Kim , Kyounghwan Kim , ChangSup Mun , Se-Ho Cha , Yongsun Ko
发明人： Young-Taek Hong , Jinuk Lee , Junghun Lim , Jaewan Park , Chanjin Jeong , Hoon Han , Seonghwan Park , Yanghwa Lee , Sang Won Bae , Daehong Eom , Byoungmoon Yoon , Jihoon Jeong , Kyunghyun Kim , Kyounghwan Kim , ChangSup Mun , Se-Ho Cha , Yongsun Ko
IPC分类号： C09K13/06
CPC分类号： H01L21/02658 , C09K13/04 , C09K13/06 , C23F1/16 , H01L21/31111 , H01L27/11556 , H01L27/11582 , H01L29/66825 , H01L29/66833 , H01L29/7889 , H01L29/7926
摘要： Etching compositions are provided. The etching composition includes a phosphoric acid, ammonium ions and a silicon compound. The silicon compound includes a silicon atom, an atomic group having an amino group combined with the silicon atom, and at least two oxygen atoms combined with the silicon atom. Methods utilizing the etching compositions are also provided.

7. 发明申请

US20120064727A1 SUBSTRATE TREATMENT EQUIPMENT AND METHOD OF TREATING SUBSTRATE USING THE SAME 审中-公开
标题翻译：基板处理设备和使用该基板处理基板的方法
公开(公告)号：US20120064727A1
公开(公告)日：2012-03-15
申请号：US13225696
申请日：2011-09-06
申请人： Jung-min Oh , Kun-tack Lee , Hyo-san Lee , Young-hoo Kim , Jung-won Lee , Sang-won Bae , Yong-jhin Cho
发明人： Jung-min Oh , Kun-tack Lee , Hyo-san Lee , Young-hoo Kim , Jung-won Lee , Sang-won Bae , Yong-jhin Cho
IPC分类号： H01L21/306 , B08B3/00
CPC分类号： H01L21/02057 , H01L21/02101 , H01L21/67028 , H01L21/67034 , H01L21/67051 , H01L21/67109 , H01L21/67742 , H01L21/67748
摘要： Substrate treatment equipment includes a wet treatment apparatus for treating a substrate with a solution (liquid), a drying (treatment) apparatus discrete from the wet treatment apparatus and for drying the substrate using a supercritical fluid, and a transfer device. The substrate is extracted by the transfer device from the wet treatment apparatus after the substrate has been treated and the substrate is transferred by the device while wet to the dry treatment apparatus. To this end, various elements/methods may be used to keep the substrate wet or wet the substrate. In any case, the substrate is prevented from drying naturally, i.e., from air-drying, as the substrate is being transferred from the wet treatment apparatus to the drying apparatus. Thus, equipment and method prevent defects such as water spots and the leaning of fine structures on the substrate.
摘要翻译：衬底处理设备包括用溶液（液体）处理衬底的湿处理设备，从湿处理设备离散的干燥（处理）设备，以及使用超临界流体干燥衬底和转移装置。在处理基板之后，通过转移装置从湿处理装置将基板提取出来，并且将基板通过装置湿润地转移到干燥处理装置。为此，可以使用各种元件/方法来使衬底保持湿润或湿润衬底。在任何情况下，当衬底从湿处理设备转移到干燥设备时，防止衬底自然干燥，即从空气干燥。因此，设备和方法可以防止基底上的水斑和精细结构的倾斜等缺陷。

8. 发明申请

US20120003831A1 Methods of Forming Nonvolatile Memory Devices Using Nonselective and Selective Etching Techniques to Define Vertically Stacked Word Lines 审中-公开
标题翻译：使用非选择性和选择性蚀刻技术形成非易失性存储器件以定义垂直堆叠字线的方法
公开(公告)号：US20120003831A1
公开(公告)日：2012-01-05
申请号：US13173591
申请日：2011-06-30
申请人： Daehyuk Kang , Sang Won Bae , Boun Yoon , Kuntach Lee , Young-Hoo Kim
发明人： Daehyuk Kang , Sang Won Bae , Boun Yoon , Kuntach Lee , Young-Hoo Kim
IPC分类号： H01L21/8239
CPC分类号： H01L27/11578 , H01L27/11548 , H01L27/11551 , H01L27/11556 , H01L27/11575 , H01L27/11582
摘要： Methods of forming nonvolatile memory devices include forming a stack of layers of different materials on a substrate. This stack includes a plurality of first layers of a first material and a plurality of second layers of a second material arranged in an alternating sequence of first and second layers. A selected first portion of the stack of layers is isotropically etched for a sufficient duration to define a first trench therein that exposes sidewalls of the alternating sequence of first and second layers. The sidewalls of each of the plurality of first layers are selectively etched relative to sidewalls of adjacent ones of the plurality of second layers. Another etching step is then performed to recess sidewalls of the plurality of second layers and thereby expose portions of upper surfaces of the plurality of first layers. These exposed portions of the upper surfaces of the plurality of first layers, which may act as word lines of a memory device, are displaced laterally relative to each other.
摘要翻译：形成非易失性存储器件的方法包括在衬底上形成不同材料层的堆叠。该堆叠包括以第一和第二层的交替顺序布置的多个第一材料的第一层和多个第二层的第二层。各层的所选择的第一部分被各向同性蚀刻足够的持续时间以限定其中的第一沟槽的第一和第二层的交替序列的侧壁。多个第一层中的每一个的侧壁相对于多个第二层中的相邻侧壁的侧壁被选择性地蚀刻。然后执行另一蚀刻步骤以使多个第二层的侧壁凹陷，从而暴露多个第一层的上表面的部分。可以充当存储器件的字线的多个第一层的上表面的这些暴露部分相对于彼此横向偏移。

9. 发明授权

US08076198B2 Method of fabricating nonvolatile memory device 有权
标题翻译：制造非易失性存储器件的方法
公开(公告)号：US08076198B2
公开(公告)日：2011-12-13
申请号：US12657092
申请日：2010-01-13
申请人： Hyosan Lee , Boun Yoon , Kuntack Lee , Donghyun Kim , Daehyuk Kang , Imsoo Park , Youngok Kim , Young-Hoo Kim , Sang Won Bae
发明人： Hyosan Lee , Boun Yoon , Kuntack Lee , Donghyun Kim , Daehyuk Kang , Imsoo Park , Youngok Kim , Young-Hoo Kim , Sang Won Bae
IPC分类号： H01L21/336 , H01L21/76 , H01L21/4763 , H01L21/461
CPC分类号： H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L29/66825 , H01L29/7881
摘要： A method of fabricating a nonvolatile memory device with a three-dimensional structure includes alternately stacking first and second material layers in two or more layers on a semiconductor substrate, forming trenches penetrating the stacked first and second material layers by performing a first etching process, and removing the second material layers exposed in the trenches by performing a second etching process. The first and second material layers are formed of materials that have the same main component but have different impurity contents, respectively.
摘要翻译：一种制造具有三维结构的非易失性存储器件的方法包括在半导体衬底上交替堆叠两层或多层第一和第二材料层，通过执行第一蚀刻工艺形成贯穿层叠的第一和第二材料层的沟槽，以及通过执行第二蚀刻工艺去除在沟槽中暴露的第二材料层。第一和第二材料层由具有相同主要成分但具有不同杂质含量的材料形成。

10. 发明申请

US20100181610A1 NON-VOLATILE MEMORY DEVICE AND METHOD FOR FABRICATING NON-VOLATILE MEMORY DEVICE 有权
标题翻译：非易失性存储器件的制造方法和非易失性存储器件的制造方法
公开(公告)号：US20100181610A1
公开(公告)日：2010-07-22
申请号：US12650076
申请日：2009-12-30
申请人： Young-Hoo Kim , Daehyuk Kang , Youngok Kim , Sang Won Bae , Boun Yoon , Kuntack Lee
发明人： Young-Hoo Kim , Daehyuk Kang , Youngok Kim , Sang Won Bae , Boun Yoon , Kuntack Lee
IPC分类号： H01L29/792
CPC分类号： H01L29/792 , H01L27/11551 , H01L27/11556 , H01L27/11578 , H01L27/11582 , H01L29/7926
摘要： Provided are nonvolatile memory devices with a three-dimensional structure and methods of fabricating the same. The nonvolatile memory device includes conductive patterns three-dimensionally arranged on a semiconductor substrate, semiconductor patterns that extend from the semiconductor substrate and intersect one-side walls of the conductive patterns, charge storage layers interposed between the semiconductor patterns and one-side walls of the conductive patterns, and seed layer patterns interposed between the charge storage layers and one-side walls of the conductive patterns.
摘要翻译：提供具有三维结构的非易失性存储器件及其制造方法。非易失性存储器件包括三维地布置在半导体衬底上的导电图案，半导体图案从半导体衬底延伸并与导电图案的一侧壁相交，插入在半导体图案和半导体图案的一侧壁之间的电荷存储层导电图案和介于电荷存储层和导电图案的单侧壁之间的种子层图案。

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