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    • 6. 发明授权
    • Dynamic logic element having non-invasive scan chain insertion
    • 具有非侵入式扫描链插入的动态逻辑元件
    • US6070259A
    • 2000-05-30
    • US7407
    • 1998-01-15
    • Roger RoisenDavid B. Grover
    • Roger RoisenDavid B. Grover
    • G01R31/3185G01R37/28
    • G01R31/318577
    • A scannable dynamic logic element includes a clock input, a test enable input, a data output, a precharge circuit, a boolean pull-down circuit and a test scan pull-down circuit. The precharge circuit is coupled between a first supply terminal and the data output and has a precharge control input coupled to the clock input. The boolean pull-down circuit is coupled between the data output and the second supply terminal and has a logic data input, a first evaluation control input which is coupled to the clock input and a first enable input which is coupled to the test enable input. The test scan pull-down circuit is coupled between the data output and the second supply terminal and has a test data input, a second evaluation control input which is coupled to the clock input and a second enable input which is coupled to the test enable input.
    • 可扫描动态逻辑元件包括时钟输入,测试使能输入,数据输出,预充电电路,布尔下拉电路和测试扫描下拉电路。 预充电电路耦合在第一电源端子和数据输出端之间,并且具有耦合到时钟输入的预充电控制输入。 布尔下拉电路耦合在数据输出端和第二电源端子之间,并具有逻辑数据输入端,耦合到时钟输入端的第一评估控制输入端和耦合到测试使能输入端的第一使能输入端。 测试扫描下拉电路耦合在数据输出端和第二电源端子之间,并且具有测试数据输入端,耦合到时钟输入端的第二评估控制输入端和耦合到测试使能输入端的第二使能输入端 。