会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Method and apparatus for managing arbitrary frequencies
    • 用于管理任意频率的方法和装置
    • US08791762B2
    • 2014-07-29
    • US13272587
    • 2011-10-13
    • Reimund RebelKlaus Juergen Schoepf
    • Reimund RebelKlaus Juergen Schoepf
    • H03L7/00
    • H03L7/22H03K23/66H03L7/185
    • Frequency synthesizers for use with oscillators that generate an arbitrary frequency are described, as well as related devices and methods. Divider information can be generated or otherwise accessed for use in configuring a phase lock loop device that is adapted for coupling with the oscillator, where the phase lock loop device can include a plurality of integer dividers without utilizing a fractional divider, where the divider information can include frequency deviations corresponding to groups of integer divider settings for the phase lock loop device, and where each deviation of the frequency deviations can be based on a frequency differential between a standard operating frequency and an output frequency for the phase lock loop utilizing one group of integer divider settings from the groups of integer divider settings.
    • 描述了与产生任意频率的振荡器一起使用的频率合成器,以及相关的装置和方法。 可以生成或以其他方式访问分频器信息以用于配置适于与振荡器耦合的锁相环装置,其中锁相环装置可以包括多个整数除数器而不使用分数分频器,其中分频器信息可以 包括对应于锁相环装置的整数分频器设置组的频率偏差,并且其中频偏的每个偏差可以基于使用一组的锁相环的锁相环的标准工作频率和输出频率之间的频率差 来自整数分频器设置组的整数分频器设置。
    • 8. 发明申请
    • Method and circuit arrangement for synchronizing plural oscillators
    • 用于同步多个振荡器的方法和电路装置
    • US20050104666A1
    • 2005-05-19
    • US10988315
    • 2004-11-12
    • Reimund Rebel
    • Reimund Rebel
    • H03J5/14H03L7/00H03L7/07H03L7/18H03L7/22H04B1/16
    • H03L7/18H03L7/07H03L2207/06
    • A circuit arrangement includes a first phase locked loop to generate a first oscillator frequency, a second phase locked loop to generate a second oscillator frequency, a reference frequency emitter connected to a reference frequency input of both phase locked loops, and a signal attenuator and optionally a switch connected between a master signal output of the first (master) loop and an input of the second (slave) loop. In a method, a common reference frequency is provided to both loops, the first loop generates a first oscillator frequency, and the second loop generates a second oscillator frequency that matches the first oscillator frequency in at least one operating mode and optionally differs from the first oscillator frequency in another operating mode. The frequency matching in one of the modes involves feeding an attenuated signal from the first loop operating as a master into the second loop operating as a slave.
    • 电路装置包括产生第一振荡器频率的第一锁相环,产生第二振荡器频率的第二锁相环,连接到两个锁相环的参考频率输入的参考频率发射器以及信号衰减器 连接在第一(主)回路的主信号输出和第二(从))回路的输入之间的开关。 在一种方法中,向两个环路提供公共参考频率,第一环路产生第一振荡器频率,并且第二环路产生与至少一个操作模式中的第一振荡器频率匹配的第二振荡器频率,并且可选地与第一振荡器频率不同于第一振荡器频率 振荡器频率在另一种工作模式。 在一种模式中的频率匹配涉及将来自作为主机操作的第一回路的衰减信号馈送到作为从机操作的第二回路中。
    • 9. 发明授权
    • Digital switching signal in stereo decoders and circuit array for
generation thereof
    • 立体声解码器中的数字切换信号及其产生的电路阵列
    • US5220607A
    • 1993-06-15
    • US805642
    • 1991-12-12
    • Reimund Rebel
    • Reimund Rebel
    • H04B1/16
    • H04B1/1646
    • In stereo receivers with digital decoding pulse generation, interference by the harmonics of the digital switching signal with signals in adjacent channels or with carrier signals in the sideband lead to faults that can be perceived in the audible range as chirping. An integrated stereo decoder with digital decoding pulse generation is described in which the low-harmonic, step-like switching signal consecutively assumes within a period and relative to the amplitude the values (1+.sqroot.2).sup.-1, 1, (1+.sqroot.2).sup.-1, -(1+.sqroot.2).sup.-1, -1, -(1+.sqroot.2).sup.-1, with the .+-.(1+.sqroot.2).sup.-1 values each persisting for an eighth of the period and the .+-.1 values a quarter of the period. Furthermore, an integrated circuit array for generation of this low-harmonic oscillation is described. The circuit array comprises a two-stage dual frequency divider stage and a differential amplifier, where a rectangular signal is supplied to the differential amplifier input and the current is modulated by the differential amplifier by using a second rectangular signal with double the frequency. The low-harmonic switching signal can be picked up at the output of the differential amplifier.
    • 在具有数字解码脉冲产生的立体声接收机中,数字切换信号与相邻信道中的信号或边带中的载波信号的谐波的干扰导致在可听范围内可被啁啾感知的故障。 描述了具有数字解码脉冲产生的集成立体声解码器,其中低谐波阶梯状切换信号在一个周期内相对于振幅值连续地假设(1+ 2ROOT 2)-1,1(1+ 2ROOT 2)-1, - (1+ 2ROOT 2)-1,-1, - (1+ 2ROOT 2)-1,+/-(1+ 2ROOT 2)-1值每个持续八分之一 和+/- 1值的四分之一的时期。 此外,描述了用于产生这种低谐波振荡的集成电路阵列。 电路阵列包括两级双分频器级和差分放大器,其中矩形信号被提供给差分放大器输入,并且通过使用具有两倍频率的第二矩形信号由差分放大器调制电流。 低谐波开关信号可以在差分放大器的输出端拾取。