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1. 发明授权

US07803703B2 Metal-germanium physical vapor deposition for semiconductor device defect reduction 有权
标题翻译：金属锗物理气相沉积用于半导体器件缺陷减少
公开(公告)号：US07803703B2
公开(公告)日：2010-09-28
申请号：US12185189
申请日：2008-08-04
申请人： Doufeng Yue , Noel Russell , Peijun J. Chen , Douglas E. Mercer
发明人： Doufeng Yue , Noel Russell , Peijun J. Chen , Douglas E. Mercer
IPC分类号： H01L21/3205
CPC分类号： H01L21/28518 , H01L21/823418 , H01L21/823443 , H01L21/823814 , H01L21/823835 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, germanium atoms (120) and transition metal atoms (130) to form a metal-germanium alloy layer (140) on a semiconductor substrate (150). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400).
摘要翻译：本发明提供一种制造用于半导体器件（110）的金属硅化物电极（100）的方法。该方法包括通过物理气相沉积，锗原子（120）和过渡金属原子（130）沉积以在半导体衬底（150）上形成金属 - 锗合金层（140）。使金属锗合金层和半导体基板反应形成金属硅化物电极。本发明的其它方面包括制造集成电路（400）的方法。

2. 发明授权

US07355255B2 Nickel silicide including indium and a method of manufacture therefor 有权
标题翻译：包括铟的硅化镍及其制造方法
公开(公告)号：US07355255B2
公开(公告)日：2008-04-08
申请号：US11678950
申请日：2007-02-26
申请人： Peijun J. Chen , Duofeng Yue , Amitabh Jain , Sue E. Crank , Thomas D. Bonifield , Homi C. Mogul
发明人： Peijun J. Chen , Duofeng Yue , Amitabh Jain , Sue E. Crank , Thomas D. Bonifield , Homi C. Mogul
IPC分类号： H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/28518 , H01L21/26586 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a substrate (110), as well as a nickel silicide region (170) located over the substrate (110), the nickel silicide region (170) having an amount of indium located therein.
摘要翻译：本发明提供一种半导体装置及其制造方法以及包括该半导体装置的集成电路的制造方法。除了其它元件之外，半导体器件可以包括衬底（110）以及位于衬底（110）上方的硅化镍区域（170），所述硅化镍区域（170）具有位于其中的铟的量。

3. 发明授权

US07208398B2 Metal-halogen physical vapor deposition for semiconductor device defect reduction 有权
标题翻译：用于半导体器件缺陷的金属卤素物理气相沉积
公开(公告)号：US07208398B2
公开(公告)日：2007-04-24
申请号：US10903805
申请日：2004-07-30
申请人： Peijun J. Chen , Duofeng Yue , Douglas E. Mercer , Noel Russell
发明人： Peijun J. Chen , Duofeng Yue , Douglas E. Mercer , Noel Russell
IPC分类号： H01L21/28
CPC分类号： H01L21/28518 , H01L21/823418 , H01L21/823443 , H01L21/823814 , H01L21/823835 , H01L29/665 , H01L29/78
摘要： The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, halogen atoms (120) and transition metal atoms (130) to form a halogen-containing metal layer (140) on a semiconductor substrate (150). The halogen-containing metal layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400) comprising the metal silicide electrode.
摘要翻译：本发明提供一种制造用于半导体器件（110）的金属硅化物电极（100）的方法。该方法包括通过物理气相沉积沉积卤素原子（120）和过渡金属原子（130）以在半导体衬底（150）上形成含卤素的金属层（140）。使含卤素金属层和半导体基板反应形成金属硅化物电极。本发明的其它方面包括制造包括金属硅化物电极的集成电路（400）的方法。

4. 发明授权

US07199032B2 Metal silicide induced lateral excessive encroachment reduction by silicon <110> channel stuffing 有权
标题翻译：金属硅化物通过硅<110>通道填料引起横向过度侵蚀
公开(公告)号：US07199032B2
公开(公告)日：2007-04-03
申请号：US10903319
申请日：2004-07-30
申请人： Duofeng Yue , Peijun J. Chen , Sue Ellen Crank , Thomas D. Bonifield , Jiong-Ping Lu , Jie-Jie Xu
发明人： Duofeng Yue , Peijun J. Chen , Sue Ellen Crank , Thomas D. Bonifield , Jiong-Ping Lu , Jie-Jie Xu
IPC分类号： H01L21/28 , H01L21/44
CPC分类号： H01L21/26506 , H01L21/26513 , H01L21/28518 , H01L29/6659
摘要： The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises implanting small atoms into an nMOS semiconductor substrate (130) to a depth (132) no greater than about 30 nanometers into the nMOS semiconductor substrate. The method further comprises depositing a transition metal layer (400) over the nMOS semiconductor substrate. The transition metal layer and the nMOS semiconductor substrate are reacted to form the metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (700).
摘要翻译：本发明提供一种制造用于半导体器件（110）的金属硅化物电极（100）的方法。该方法包括将小原子注入nMOS半导体衬底（130）至nMOS半导体衬底中不大于约30纳米的深度（132）。该方法还包括在nMOS半导体衬底上沉积过渡金属层（400）。使过渡金属层和nMOS半导体衬底反应以形成金属硅化物电极。本发明的其它方面包括制造集成电路（700）的方法。

5. 发明授权

US5286340A Process for controlling silicon etching by atomic hydrogen 失效
标题翻译：用原子氢控制硅蚀刻的方法
公开(公告)号：US5286340A
公开(公告)日：1994-02-15
申请号：US759579
申请日：1991-09-13
申请人： John T. Yates, Jr. , Peijun J. Chen , M. Luigi Colaianni
发明人： John T. Yates, Jr. , Peijun J. Chen , M. Luigi Colaianni
IPC分类号： H01L21/225 , H01L21/3065 , H01L21/306 , B44C1/22
CPC分类号： H01L21/3065 , H01L21/2254 , Y10S148/128
摘要： A process for spatially controlling the etching of a silicon substrate by omic hydrogen. The process may be generally carried out at room temperature. The process involves implanting a boron dopant in selective portions of the silicon substrate followed by etching with atomic hydrogen. The implanted portions exhibit no etching by atomic hydrogen. A silicon device that is produced by this process is disclosed.
摘要翻译：用于通过原子氢空间控制硅衬底的蚀刻的方法。该方法通常可以在室温下进行。该方法包括在硅衬底的选择性部分中注入硼掺杂剂，随后用原子氢蚀刻。注入部分不表现出原子氢的蚀刻。公开了通过该方法生产的硅器件。

6. 发明申请

US20080128837A1 Nickel Alloy Silicide Including Indium and a Method of Manufacture Therefor 有权
标题翻译：包含铟的镍合金硅化物及其制造方法
公开(公告)号：US20080128837A1
公开(公告)日：2008-06-05
申请号：US12018313
申请日：2008-01-23
申请人： Peijun J. Chen , Duofeng Yue , Amitabh Jain , Sue Crank , Thomas D. Bonifield , Homi Mogul
发明人： Peijun J. Chen , Duofeng Yue , Amitabh Jain , Sue Crank , Thomas D. Bonifield , Homi Mogul
IPC分类号： H01L29/78
CPC分类号： H01L21/28518 , H01L21/26513 , H01L21/26586 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate structure including a gate dielectric layer and gate electrode layer. The semiconductor device may further include source/drain regions located in/over the substrate and adjacent the gate structure, and a nickel alloy silicide located in the source/drain regions, the nickel alloy silicide having an amount of indium located therein.
摘要翻译：本发明提供一种半导体器件，一种制造方法以及一种用于制造包括该半导体器件的集成电路的方法。除了其他元件之外，半导体器件可以包括位于衬底上的栅极结构，栅极结构包括栅极电介质层和栅极电极层。该半导体器件还可以包括位于衬底中或栅极结构附近的源极/漏极区域和位于源极/漏极区域中的镍合金硅化物，所述镍合金硅化物具有位于其中的铟的量。

7. 发明授权

US07511350B2 Nickel alloy silicide including indium and a method of manufacture therefor 有权
标题翻译：包括铟的镍合金硅化物及其制造方法
公开(公告)号：US07511350B2
公开(公告)日：2009-03-31
申请号：US12018313
申请日：2008-01-23
申请人： Peijun J. Chen , Duofeng Yue , Amitabh Jain , Sue Crank , Thomas D. Bonifield , Homi Mogul
发明人： Peijun J. Chen , Duofeng Yue , Amitabh Jain , Sue Crank , Thomas D. Bonifield , Homi Mogul
IPC分类号： H01L29/78
CPC分类号： H01L21/28518 , H01L21/26513 , H01L21/26586 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a gate structure located over a substrate, the gate structure including a gate dielectric layer and gate electrode layer. The semiconductor device may further include source/drain regions located in/over the substrate and adjacent the gate structure, and a nickel alloy silicide located in the source/drain regions, the nickel alloy silicide having an amount of indium located therein.
摘要翻译：本发明提供一种半导体器件，一种制造方法以及一种用于制造包括该半导体器件的集成电路的方法。除了其他元件之外，半导体器件可以包括位于衬底上的栅极结构，栅极结构包括栅极电介质层和栅极电极层。该半导体器件还可以包括位于衬底中或栅极结构附近的源极/漏极区域和位于源极/漏极区域中的镍合金硅化物，所述镍合金硅化物具有位于其中的铟的量。

8. 发明授权

US07435672B2 Metal-germanium physical vapor deposition for semiconductor device defect reduction 有权
标题翻译：金属锗物理气相沉积用于半导体器件缺陷减少
公开(公告)号：US07435672B2
公开(公告)日：2008-10-14
申请号：US10903716
申请日：2004-07-30
申请人： Doufeng Yue , Noel Russell , Peijun J. Chen , Douglas E. Mercer
发明人： Doufeng Yue , Noel Russell , Peijun J. Chen , Douglas E. Mercer
IPC分类号： H01L21/3205
CPC分类号： H01L21/28518 , H01L21/823418 , H01L21/823443 , H01L21/823814 , H01L21/823835 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： The present invention provides a method of manufacturing a metal silicide electrode (100) for a semiconductor device (110). The method comprises depositing by physical vapor deposition, germanium atoms (120) and transition metal atoms (130) to form a metal-germanium alloy layer (140) on a semiconductor substrate (150). The metal-germanium alloy layer and the semiconductor substrate are reacted to form a metal silicide electrode. Other aspects of the present invention include a method of manufacturing an integrated circuit (400).
摘要翻译：本发明提供一种制造用于半导体器件（110）的金属硅化物电极（100）的方法。该方法包括通过物理气相沉积，锗原子（120）和过渡金属原子（130）沉积以在半导体衬底（150）上形成金属 - 锗合金层（140）。使金属锗合金层和半导体基板反应形成金属硅化物电极。本发明的其它方面包括制造集成电路（400）的方法。

9. 发明授权

US07211516B2 Nickel silicide including indium and a method of manufacture therefor 有权
公开(公告)号：US07211516B2
公开(公告)日：2007-05-01
申请号：US11096660
申请日：2005-04-01
申请人： Peijun J. Chen , Duofeng Yue , Amitabh Jain , Sue Crank , Thomas D. Bonifield , Homi Mogul
发明人： Peijun J. Chen , Duofeng Yue , Amitabh Jain , Sue Crank , Thomas D. Bonifield , Homi Mogul
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/26586 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833
摘要： The present invention provides a semiconductor device, a method of manufacture therefore and a method for manufacturing an integrated circuit including the same. The semiconductor device, among other elements, may include a substrate (110), as well as a nickel silicide region (170) located over the substrate (110), the nickel silicide region (170) having an amount of indium located therein.

10. 发明授权

US07132365B2 Treatment of silicon prior to nickel silicide formation 有权
标题翻译：在硅化镍形成之前处理硅
公开(公告)号：US07132365B2
公开(公告)日：2006-11-07
申请号：US10914928
申请日：2004-08-10
申请人： Sue Ellen Crank , Shirin Siddiqui , Deborah J. Riley , Trace Quentin Hurd , Peijun J. Chen
发明人： Sue Ellen Crank , Shirin Siddiqui , Deborah J. Riley , Trace Quentin Hurd , Peijun J. Chen
IPC分类号： H01L21/4763
CPC分类号： H01L21/28518 , H01L21/76829
摘要： A method of preparing a die comprises treating exposed silicon to form an oxide prior to silicide formation; and depositing metal on the oxide. The metal may comprise titanium, cobalt, nickel, platinum, palladium, tungsten, molybdenum, or combinations thereof on the oxide. The oxide may be less than or equal to about 15 angstroms thick. In various embodiments, treating exposed silicon to form an oxide comprises forming a non-thermal oxide. Treating exposed silicon to form an oxide may also comprise treating the exposed silicon with an oxidizing plasma; alternatively, treating exposed silicon to form an oxide may comprise forming a chemical oxide. In certain other embodiments, treating exposed silicon to form an oxide comprises treating exposed silicon with a solution comprising ammonium hydroxide, hydrogen peroxide, and water; hydrochloric acid, hydrogen peroxide, and water; hydrogen peroxide; ozone; ozonated deionized water; or combinations thereof.
摘要翻译：制备模具的方法包括在硅化物形成之前处理暴露的硅以形成氧化物; 并在氧化物上沉积金属。金属可以在氧化物上包含钛，钴，镍，铂，钯，钨，钼或其组合。氧化物可以小于或等于约15埃厚。在各种实施方案中，处理暴露的硅以形成氧化物包括形成非热氧化物。处理暴露的硅以形成氧化物还可以包括用氧化等离子体处理暴露的硅; 或者，处理暴露的硅以形成氧化物可包括形成化学氧化物。在某些其他实施方案中，处理暴露的硅以形成氧化物包括用包含氢氧化铵，过氧化氢和水的溶液处理暴露的硅; 盐酸，过氧化氢和水; 过氧化氢; 臭氧; 臭氧化去离子水; 或其组合。

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