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1. 发明授权

US08996816B2 Method and apparatus for selectively bypassing a cache for trace collection in a processor 有权
标题翻译：用于选择性地绕过高速缓存以用于处理器中的跟踪收集的方法和装置
公开(公告)号：US08996816B2
公开(公告)日：2015-03-31
申请号：US12941576
申请日：2010-11-08
申请人： Greggory D. Donley , Benjamin Tsien , Vydhyanathan Kalyanasundharam , Patrick N. Conway , William A. Hughes
发明人： Greggory D. Donley , Benjamin Tsien , Vydhyanathan Kalyanasundharam , Patrick N. Conway , William A. Hughes
IPC分类号： G06F12/00 , G06F11/36 , G06F12/08
CPC分类号： G06F11/3636 , G06F11/3648 , G06F12/0888
摘要： A method and apparatus for selectively bypassing a cache in a processor of a computing device are disclosed. A mechanism to provide visibility to transactions on the core to a cache interface (e.g., an L3 cache interface) in a trace controller buffer (TCB) for debugging purposes, by causing selected transactions, which would otherwise be satisfied by the cache, to bypass the cache and be presented to the memory system where they may be logged in the TCB is described. In an embodiment of the invention, there is provided a method for providing processing core request visibility comprising bypassing a higher level cache in response to a processing core request, capturing the processing core request in a TCB, providing a mask to filter the processing core request, and returning a transaction response to a requesting processing core.
摘要翻译：公开了一种用于选择性地绕过计算设备的处理器中的高速缓存的方法和装置。通过引起缓存满足的选定事务，绕过控制器缓冲区（TCB）中的高速缓存接口（例如，L3缓存接口）来提供对核心上的事务的可见性的机制，以绕过描述缓存并将其呈现给存储器系统，其中它们可以被登录在TCB中。在本发明的实施例中，提供了一种用于提供处理核心请求可见性的方法，包括响应于处理核心请求绕过较高级别的高速缓存，在TCB中捕获处理核心请求，提供掩码以过滤处理核心请求并将事务响应返回到请求处理核心。

2. 发明申请

US20120117330A1 METHOD AND APPARATUS FOR SELECTIVELY BYPASSING A CACHE FOR TRACE COLLECTION IN A PROCESSOR 有权
标题翻译：用于选择性处理加速器中追踪采集的高速缓存的方法和装置
公开(公告)号：US20120117330A1
公开(公告)日：2012-05-10
申请号：US12941576
申请日：2010-11-08
申请人： Greggory D. Donley , Benjamin Tsien , Vydhyanathan Kalyanasundharam , Patrick N. Conway , William A. Hughes
发明人： Greggory D. Donley , Benjamin Tsien , Vydhyanathan Kalyanasundharam , Patrick N. Conway , William A. Hughes
IPC分类号： G06F12/08
CPC分类号： G06F11/3636 , G06F11/3648 , G06F12/0888
摘要： A method and apparatus for a selectively bypassing a cache in a processor of a computing device are disclosed.
摘要翻译：公开了一种用于选择性地绕过计算设备的处理器中的高速缓存的方法和装置。

3. 发明授权

US07814285B2 Method and apparatus for filtering memory write snoop activity in a distributed shared memory computer 有权
标题翻译：用于过滤分布式共享存储器计算机中的内存写窥探活动的方法和装置
公开(公告)号：US07814285B2
公开(公告)日：2010-10-12
申请号：US12708008
申请日：2010-02-18
申请人： Patrick N. Conway
发明人： Patrick N. Conway
IPC分类号： G06F12/08
CPC分类号： G06F12/082 , Y02D10/13
摘要： A method and apparatus for filtering memory probe activity for writes in a distributed shared memory computer. In one embodiment, the method may include initiating a first store operation to a cache data block stored in a first cache from a first processing node; assigning a modified cache state to said cache data block in response to initiating said first store operation. The method may further include initiating a first load operation to said cache data block from a second processing node; and assigning a pairwise-shared directory state to a coherence directory entry corresponding to said cache data block in response to initiating said first load operation, where the pairwise-shared directory state is distinct from a shared directory state.
摘要翻译：一种用于过滤用于在分布式共享存储器计算机中写入的存储器探测活动的方法和装置。在一个实施例中，该方法可以包括：从第一处理节点向存储在第一高速缓存中的高速缓存数据块启动第一存储操作; 响应于启动所述第一存储操作，将修改的高速缓存状态分配给所述高速缓存数据块。该方法还可以包括从第二处理节点发起对所述高速缓存数据块的第一加载操作; 以及响应于启动所述第一加载操作，将配对共享目录状态分配给与所述高速缓存数据块相对应的相干目录条目，其中所述成对共享目录状态与共享目录状态不同。

4. 发明授权

US07380001B2 Fault containment and error handling in a partitioned system with shared resources 有权
标题翻译：具有共享资源的分区系统中的故障控制和错误处理
公开(公告)号：US07380001B2
公开(公告)日：2008-05-27
申请号：US10150618
申请日：2002-05-17
申请人： Kazunori Masuyama , Yasushi Umezawa , Jeremy J. Farrell , Sudheer Miryala , Takeshi Shimizu , Hitoshi Oi , Patrick N. Conway
发明人： Kazunori Masuyama , Yasushi Umezawa , Jeremy J. Farrell , Sudheer Miryala , Takeshi Shimizu , Hitoshi Oi , Patrick N. Conway
IPC分类号： G06F15/173 , G06F15/00 , G06F11/00
CPC分类号： H04L41/12 , H04L41/0654 , H04L43/0817
摘要： A system and method for fault containment and error handling within a domain in a partitioned computer system includes a system manager having read and write access to a resource definition table. The system manager is adapted to quiesce the system when failure occurs within a domain, identify an allocated resource associated with the failed domain, identify a non-failed domain, and exit the quiesce mode for the non-failed domain, thereby containing a failure within the failed domain. The system manager further handles an error within the failed domain by deallocating a resource allocated to the failed domain so that the resource becomes available to non-failed domains.
摘要翻译：在分区计算机系统中的域内的用于故障容纳和错误处理的系统和方法包括具有对资源定义表的读取和写入访问的系统管理器。系统管理器适用于在域内发生故障时停止系统，识别与故障域相关联的分配资源，识别非故障域，并退出非故障域的静默模式，从而在失败的域。系统管理员通过取消分配给故障域的资源来进一步处理故障域内的错误，以使资源变得可用于非故障域。

5. 发明授权

US07194517B2 System and method for low overhead message passing between domains in a partitioned server 失效
标题翻译：分区服务器中域之间低开销消息传递的系统和方法
公开(公告)号：US07194517B2
公开(公告)日：2007-03-20
申请号：US10154100
申请日：2002-05-21
申请人： Patrick N. Conway , Jeremy J. Farrell , Kazunori Masuyama , Takeshi Shimizu , Sudheer Miryala
发明人： Patrick N. Conway , Jeremy J. Farrell , Kazunori Masuyama , Takeshi Shimizu , Sudheer Miryala
IPC分类号： G06F15/167 , G06F12/00
CPC分类号： H04L67/2852 , H04L69/329
摘要： A system and method for passing messages between domains with low overhead in a multi-node computer system. A CPU node in a sending domain issues a request to a memory node in a receiving domain using memory-mapped input/output window. This causes the message to be transmitted to a coherent space of the receiving domain. All messages are cache-line in size. A small portion of each cache line, cyclic counter field, is overwritten before the cache line is written in the coherent address space of the receiving domain. A massaging driver polls the cyclic count field of the cache line in the processor cache to determine when the next message is written in the coherent address space of the receiving domain. This allows the CPU to detect when the last received message is written into the coherent address space of the receiving domain without generating transactions on CPU interface.
摘要翻译：一种用于在多节点计算机系统中具有低开销的域之间传递消息的系统和方法。发送域中的CPU节点使用存储器映射的输入/输出窗口向接收域中的存储器节点发出请求。这导致消息被发送到接收域的相干空间。所有消息都是高速缓存行大小。在将高速缓存行写入接收域的相干地址空间之前，每个高速缓存行的循环计数器字段的一小部分被重写。按摩驱动程序轮询处理器高速缓存中的高速缓存行的循环计数字段，以确定下一个消息何时被写入接收域的相干地址空间。这允许CPU检测最后接收的消息何时被写入接收域的相干地址空间，而不在CPU接口上生成事务。

6. 发明授权

US06754776B2 Method and system for logical partitioning of cache memory structures in a partitoned computer system 失效
标题翻译：分区计算机系统中高速缓存存储器结构的逻辑分区方法和系统
公开(公告)号：US06754776B2
公开(公告)日：2004-06-22
申请号：US09861258
申请日：2001-05-17
申请人： Patrick N. Conway , Kazunori Masuyama , Takeshi Shimizu , Toshio Ogawa , Martin Sodos , Sudheer Miryala , Jeremy Farrell
发明人： Patrick N. Conway , Kazunori Masuyama , Takeshi Shimizu , Toshio Ogawa , Martin Sodos , Sudheer Miryala , Jeremy Farrell
IPC分类号： G06F1200
CPC分类号： G06F12/084 , G06F12/0813
摘要： A system and method of logically partitioning shared memory structures between computer domains is disclosed. In one embodiment, each domain is assigned a unique address space identifier. The unique address space identifier preferably has tag extension and index extension bits. This permits the tag and index bits of a conventional local domain address to be extended with tag extension and index extension bits. Data entries in the shared memory structure may be accessed using an extended index value. Hits may be determined using an extended tag value.
摘要翻译：公开了在计算机域之间逻辑分区共享存储器结构的系统和方法。在一个实施例中，为每个域分配唯一的地址空间标识符。唯一地址空间标识符优选地具有标签扩展和索引扩展位。这允许使用标签扩展和索引扩展位来扩展常规本地域地址的标签和索引位。可以使用扩展索引值来访问共享存储器结构中的数据条目。命中可以使用扩展标签值来确定。

7. 发明授权

US07814286B2 Method and apparatus for filtering memory write snoop activity in a distributed shared memory computer 有权
标题翻译：用于过滤分布式共享存储器计算机中的内存写窥探活动的方法和装置
公开(公告)号：US07814286B2
公开(公告)日：2010-10-12
申请号：US12708013
申请日：2010-02-18
申请人： Patrick N. Conway
发明人： Patrick N. Conway
IPC分类号： G06F12/08
CPC分类号： G06F12/082 , Y02D10/13
摘要： A method and apparatus for filtering memory probe activity for writes in a distributed shared memory computer. In one embodiment, the method may include initiating a first store operation to a cache data block stored in a first cache from a first processing node and initiating a first load operation to said cache data block from a second processing node subsequent to initiating said first store operation; and assigning a pairwise-shared directory state to a coherence directory entry corresponding to said cache data block in response to initiating said first load operation. The method may further include initiating a second store operation to said cache data block from said second processing node subsequent to initiating said first load operation; and assigning a migratory directory state to said coherence directory entry in response to initiating said second store operation, where the migratory directory state is distinct from a modified directory state.
摘要翻译：一种用于过滤用于在分布式共享存储器计算机中写入的存储器探测活动的方法和装置。在一个实施例中，该方法可以包括：从第一处理节点向存储在第一高速缓存中的高速缓存数据块启动第一存储操作，并且在发起所述第一存储之后从第二处理节点开始对所述高速缓存数据块的第一加载操作操作; 以及响应于启动所述第一加载操作，将配对共享目录状态分配给与所述高速缓存数据块相对应的一致目录条目。该方法还可以包括：在开始所述第一加载操作之后，从所述第二处理节点开始对所述高速缓存数据块的第二存储操作; 以及响应于启动所述第二存储操作，将迁移目录状态分配给所述相干目录条目，其中迁移目录状态与修改的目录状态不同。

8. 发明授权

US07669018B2 Method and apparatus for filtering memory write snoop activity in a distributed shared memory computer 有权
标题翻译：用于过滤分布式共享存储器计算机中的内存写窥探活动的方法和装置
公开(公告)号：US07669018B2
公开(公告)日：2010-02-23
申请号：US12118818
申请日：2008-05-12
申请人： Patrick N. Conway
发明人： Patrick N. Conway
IPC分类号： G06F12/08
CPC分类号： G06F12/082 , Y02D10/13
摘要： A method and apparatus for filtering memory probe activity for writes in a distributed shared memory computer. In one embodiment, the method may include initiating a first store operation to a cache data block stored in a first cache from a first processing node including the first cache and assigning a modified cache state to the cache data block in response to initiating the first store operation. The method may further include evicting the cache data block from the first cache subsequent to initiating the first store operation, storing the cache data block in a remote cache in response to the evicting, and assigning a remote directory state to a coherence directory entry corresponding to the cache data block in response to storing the cache data block in the remote cache, where the remote directory state is distinct from an invalid directory state.
摘要翻译：一种用于过滤用于在分布式共享存储器计算机中写入的存储器探测活动的方法和装置。在一个实施例中，该方法可以包括：从包括第一高速缓存的第一处理节点向存储在第一高速缓存中的高速缓存数据块启动第一存储操作，并响应于启动第一存储而将修改的高速缓存状态分配给高速缓存数据块操作。该方法可以进一步包括在发起第一存储操作之后从第一高速缓存缓存数据块，响应于逐出将高速缓存数据块存储在远程高速缓存中，并将远程目录状态分配给对应于高速缓存数据块响应于将高速缓存数据块存储在远程高速缓存中，其中远程目录状态与无效目录状态不同。

9. 发明申请

US20090216950A1 Push for Sharing Instruction 有权
标题翻译：推送共享指令
公开(公告)号：US20090216950A1
公开(公告)日：2009-08-27
申请号：US12037595
申请日：2008-02-26
申请人： John D. McCalpin , Patrick N. Conway
发明人： John D. McCalpin , Patrick N. Conway
IPC分类号： G06F12/08
CPC分类号： G06F12/0833
摘要： In one embodiment, a system comprises a first processor, a main memory system, and a cache hierarchy coupled between the first processor and the main memory system. The cache hierarchy comprises at least a first cache. The first processor is configured to execute a first instruction, including forming an address responsive to one or more operands of the first instruction. The system is configured to push a first cache block that is hit by the first address in the first cache to a target location within the cache hierarchy or the main memory system, wherein the target location is unspecified in a definition of the first instruction within an instruction set architecture implemented by the first processor, and wherein the target location is implementation-dependent.
摘要翻译：在一个实施例中，系统包括耦合在第一处理器和主存储器系统之间的第一处理器，主存储器系统和高速缓存层级。高速缓存层级包括至少第一高速缓存。第一处理器被配置为执行第一指令，包括响应于第一指令的一个或多个操作数形成地址。该系统被配置为将由第一高速缓存中的第一地址命中的第一高速缓存块推送到高速缓存层级或主存储器系统内的目标位置，其中在第一指令的定义中未指定目标位置指令集架构由第一处理器实现，并且其中目标位置是依赖于实现的。

10. 发明授权

US07373466B1 Method and apparatus for filtering memory write snoop activity in a distributed shared memory computer 有权
标题翻译：用于过滤分布式共享存储器计算机中的内存写窥探活动的方法和装置
公开(公告)号：US07373466B1
公开(公告)日：2008-05-13
申请号：US10819451
申请日：2004-04-07
申请人： Patrick N. Conway
发明人： Patrick N. Conway
IPC分类号： G06F12/08
CPC分类号： G06F12/082 , Y02D10/13
摘要： A method and apparatus for filtering memory probe activity for writes in a distributed shared memory computer. In one embodiment, the method may include assigning an uncached directory state to a cache data block in response to evicting the cache data block. In another embodiment, the method may include assigning a remote directory state to a cache data block in response to evicting the cache data block and storing it in a remote cache. In a third embodiment, the method may include assigning a pairwise-shared directory state in response to a second processor node initiating a load operation to a cache data block in a modified cache state in a first processor node. In a fourth embodiment, the method may include assigning a migratory directory state in response to a processor node initiating a store operation to a cache data block in a pairwise-shared cache state.
摘要翻译：一种用于过滤用于在分布式共享存储器计算机中写入的存储器探测活动的方法和装置。在一个实施例中，该方法可以包括响应于驱逐高速缓存数据块而将缓存的目录状态分配给高速缓存数据块。在另一个实施例中，该方法可以包括响应于驱逐高速缓存数据块并将其存储在远程高速缓存中而将远程目录状态分配给高速缓存数据块。在第三实施例中，该方法可以包括响应于第二处理器节点向第一处理器节点中修改的高速缓存状态中的高速缓存数据块发起加载操作来分配成对共享目录状态。在第四实施例中，该方法可以包括：响应于在成对共享高速缓存状态中的高速缓存数据块开始存储操作的处理器节点来分配迁移目录状态。

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