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1. 发明授权

US4719504A Method for converting an analog picture signal into an amplitude-discrete output signal 失效
标题翻译：将模拟图像信号转换为振幅离散输出信号的方法
公开(公告)号：US4719504A
公开(公告)日：1988-01-12
申请号：US589432
申请日：1984-03-14
申请人： Peter E. Draheim , Walter H. Demmer , Otto L. Warmuth
发明人： Peter E. Draheim , Walter H. Demmer , Otto L. Warmuth
IPC分类号： H03M1/20 , H03M1/00 , H04N7/26 , H04N9/64 , H04N11/04 , H04N9/65 , H04N9/66
CPC分类号： H04N9/64 , H03M1/06 , H03M1/365
摘要： In a circuit arrangement for converting an analog picture signal, which corresponds to consecutive fields, into an amplitude-discrete output signal, which, in a comparison stage, compares the picture signal to a plurality of reference values and produces an amplitude-discrete intermediate signal at an output, a significant simplification of the circuit cost and design effort is accomplished with, at the same time, an improvement in the error cancellation by the fact that the change in the positions of the values of the picture signal and the reference values relative to each other corresponds to the sum of a fraction and a first integral number of value intervals.
摘要翻译：在用于将对应于连续场的模拟图像信号转换成幅度离散输出信号的电路装置中，其在比较级中将图像信号与多个参考值进行比较，并产生振幅离散中间信号在输出端，通过以下事实实现电路成本和设计工作的显着简化，同时通过图像信号的值和参考值的相对位置的改变来改进误差消除彼此对应于分数和第一整数值的值间隔的和。

2. 发明授权

US4570126A FM Demodulator using interpolation to approximate zero crossings 失效
标题翻译： FM解调器使用插值逼近过零点
公开(公告)号：US4570126A
公开(公告)日：1986-02-11
申请号：US507202
申请日：1983-06-23
申请人： Walter H. Demmer , Rolf D. Gutsmann , Norbert A. Bergs , Ingolf B. Heinemann , Otto L. Warmuth
发明人： Walter H. Demmer , Rolf D. Gutsmann , Norbert A. Bergs , Ingolf B. Heinemann , Otto L. Warmuth
IPC分类号： H03D3/00
CPC分类号： H03D3/006 , H03D2200/0062 , H03D2200/0064
摘要： For determining the half-cycle durations of the input signal which is presented as a sequence of sampled values, its zero crossings are approximated by lines which interconnect the two sampled values of different signs on both sides of the zero crossing. The half-cycle duration is derived from the number of sampled values within a period, i.e. between two consecutive zero crossings, and from the time intervals at the beginning and end of each half-cycle determined by the intersection of the approximation line with the axis. The time intervals at the beginning and end of each period are corrected for a more accurate determination of the duration and the time intervals during which the values of the individual half-cycle durations are stored, are made to approximate to these half-cycle durations. The instantaneous frequency of the input signal is determined from the values of the half-cycle durations which have thus been shifted in time by forming the reciprocal.
摘要翻译：为了确定作为采样值序列呈现的输入信号的半周期持续时间，其过零点通过在过零点两侧互连不同符号的两个采样值的线近似。半周期持续时间是从一个周期内的抽样值的数量，即在两个连续过零点之间，从每个半周期开始和结束的时间间隔，由近似线与轴的交点确定的。校正每个周期的开始和结束的时间间隔，以更准确地确定持续时间和存储各个半周期持续时间的值的时间间隔，使其接近于这些半周期持续时间。输入信号的瞬时频率根据通过形成倒数在时间上偏移的半周期持续时间的值来确定。

3. 发明授权

US4862404A Digital circuit for suppressing fast signal variations 失效
标题翻译：用于抑制快速信号变化的数字电路
公开(公告)号：US4862404A
公开(公告)日：1989-08-29
申请号：US71695
申请日：1987-07-09
申请人： Wolfgang Schwartz , Otto L. Warmuth , Claus D. Grzyb
发明人： Wolfgang Schwartz , Otto L. Warmuth , Claus D. Grzyb
IPC分类号： H03K5/1252 , G06F7/66 , H03H17/02 , H04B10/60 , H04L25/03 , H04L25/08 , H04Q9/00
CPC分类号： H04B10/60 , G06F7/66 , H03H17/02
摘要： A digital circuit which receives a serial input signal and which suppresses fast signal variations. The digital circuit includes an integrator circuit (1) which generates a multi-bit signal by integration of the serial input signal. The output signal of the integrator circuit is applied to an evaluation circuit (2) which generates a serial output signal which assumes a first state when the multi-bit signal exceeds a first threshold value and a second state when the multi-bit signal is below a second threshold value.
摘要翻译：接收串行输入信号并抑制快速信号变化的数字电路。数字电路包括积分器电路（1），其通过串行输入信号的积分产生多位信号。积分器电路的输出信号被施加到评估电路（2），其产生当多位信号超过第一阈值时呈现第一状态的串行输出信号，并且当多位信号低于多位信号时，产生第二状态第二阈值。

4. 发明授权

US4710802A Television receiver including a circuit arrangement for demodulating an NTSC-coded color signal 失效
标题翻译：电视接收机，包括用于解调NTSC编码的彩色信号的电路装置
公开(公告)号：US4710802A
公开(公告)日：1987-12-01
申请号：US836034
申请日：1986-03-04
申请人： Otto L. Warmuth , Martin H. Johanndeiter , Johannes G. Raven
发明人： Otto L. Warmuth , Martin H. Johanndeiter , Johannes G. Raven
IPC分类号： H04N9/45 , H04N9/44 , H04N9/64 , H04N9/66 , H04N11/14
CPC分类号： H04N11/146
摘要： A color television signal receiver includes a circuit arrangement for demodulating an NTSC-encoded chrominance signal available as a sequence of digital values. An oscillator circuit (33), which has an accumulator (16) and a waveform converter (31) produces two sine-shaped reference signals which are applied to a demodulator circuit (2). The accumulator (16) includes a register (18) and a (first) modulo-adder (17). A phase comparator circuit (12) controlling the phase of the reference signal receives at least one demodulated signal during the occurrence of the color synchronizing signal. The sawtooth-shaped accumulator output signal is added in a second adder (26, 38) during a first switching position of a change-over switch (23, 34) to an adjustable value and is thereafter applied to the waveform converter (31). In the second switching position of the change-over switch (23, 34), which only occurs during the occurrence of the color synchronizing signal, the accumulator output signal is applied unchanged to the waveform converter (31).
摘要翻译：彩色电视信号接收机包括用于解调可用作数字值序列的NTSC编码色度信号的电路装置。具有累加器（16）和波形转换器（31）的振荡器电路（33）产生施加到解调器电路（2）的两个正弦参考信号。累加器（16）包括寄存器（18）和（第一）模加法器（17）。控制参考信号的相位的相位比较器电路（12）在彩色同步信号发生期间接收至少一个解调信号。在转换开关（23,34）的第一开关位置期间，锯齿形累加器输出信号在第二加法器（26,38）中相加到可调整值，然后施加到波形转换器（31）。在转换开关（23,34）的仅在彩色同步信号发生时发生的第二切换位置中，累加器输出信号不变地施加到波形转换器（31）。

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