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1. 发明授权

US08415200B2 Method for manufacturing semiconductor package 失效
标题翻译：制造半导体封装的方法
公开(公告)号：US08415200B2
公开(公告)日：2013-04-09
申请号：US13007444
申请日：2011-01-14
申请人： Mi Sun Hwang , Keung Jin Sohn , Eung Suek Lee , Myung Sam Kang
发明人： Mi Sun Hwang , Keung Jin Sohn , Eung Suek Lee , Myung Sam Kang
IPC分类号： H01L23/48
CPC分类号： H01L23/49827 , H01L21/486 , H01L23/49816 , H01L23/49894 , H01L24/16 , H01L24/48 , H01L24/81 , H01L2224/16237 , H01L2224/48091 , H01L2224/4824 , H01L2224/73215 , H01L2224/81192 , H01L2224/81385 , H01L2224/81815 , H01L2924/00014 , H01L2924/01087 , H01L2924/15311 , H05K3/06 , H05K3/4038 , H05K3/4647 , H05K2203/0384 , H01L2924/00015 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Disclosed herein is a method for manufacturing a semiconductor package which uses a base member 120 in which a first metal layer 113, a barrier layer 115, and a second metal layer 117 are stacked on both surface thereof in sequence based on an adhesive member 111 to simultaneously manufacture two printed circuit boards through a single sheet process, thereby making it possible to improve manufacturing efficiency; electrically connects a semiconductor chip 300 to a printed circuit board through a solder bump 250, thereby making it possible to implement a high-density package substrate; and forms a metal post 140 instead of a through hole to required in an interlayer circuit connection, thereby making it possible to reduce costs required in the processing/plating of the through hole.
摘要翻译：本发明公开了一种半导体封装件的制造方法，该半导体封装件使用基片120，其中第一金属层113，阻挡层115和第二金属层117依次以两个表面层叠在第一金属层113，阻挡层115和第二金属层117上，同时通过单片工艺制造两个印刷电路板，从而可以提高制造效率; 通过焊料凸块250将半导体芯片300电连接到印刷电路板，从而可以实现高密度封装基板; 并且形成金属柱140而不是层间电路连接所需的通孔，从而可以降低通孔的加工/电镀所需的成本。

2. 发明申请

US20110186997A1 BOARD ON CHIP PACKAGE SUBSTRATE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：芯片包装基板及其制造方法
公开(公告)号：US20110186997A1
公开(公告)日：2011-08-04
申请号：US12821621
申请日：2010-06-23
申请人： Mi-Sun HWANG , Myung-Sam Kang
发明人： Mi-Sun HWANG , Myung-Sam Kang
IPC分类号： H01L23/498 , H01L21/60
CPC分类号： H01L23/498 , H01L2224/32225 , H01L2224/4824 , H01L2224/73215 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H01L2924/19107 , H01L2924/00
摘要： A single-layer board on chip package substrate and a method of manufacturing the same are disclosed. The single-layer board on chip package substrate in accordance with an embodiment of the present invention includes an insulator, which has a window perforated therethrough, a wiring pattern, a wire bonding pad and a solder ball pad, which are embedded in one surface of the insulator, and a solder resist layer, which is formed on the one surface of the insulator such that the solder resist layer covers the wiring pattern but at least portions of the wire bonding pad and the solder ball pad are exposed.
摘要翻译：公开了一种单层片上封装衬底及其制造方法。根据本发明的实施例的单层片上封装基板包括：具有穿孔的窗口的绝缘体，布线图案，引线接合焊盘和焊球垫，其嵌入在绝缘体和阻焊层，其形成在绝缘体的一个表面上，使得阻焊层覆盖布线图案，但是引线接合焊盘和焊球垫的至少一部分被暴露。

3. 发明申请

US20090260868A1 Printed circuit board and method of manufacturing the same 审中-公开
标题翻译：印刷电路板及其制造方法
公开(公告)号：US20090260868A1
公开(公告)日：2009-10-22
申请号：US12215413
申请日：2008-06-27
申请人： Chang Gun Oh , Mi Sun Hwang , Suk Won Lee
发明人： Chang Gun Oh , Mi Sun Hwang , Suk Won Lee
IPC分类号： H05K1/00 , H05K3/42
CPC分类号： H05K3/4647 , H05K3/108 , H05K3/423 , H05K3/426 , H05K2201/09536 , H05K2201/09545 , H05K2203/0574 , H05K2203/0733 , Y10T29/49165
摘要： The printed circuit board includes the via formed with the electroplating layer unlike a conventional via formed with an electroless plating layer and an electroplating layer and having a cylindrical shape, and thus exhibits good interlayer electrical connection and high reliability of physical contact upon thermal stress caused by the variance in physical properties of material depending on changes in temperature. The via has no upper land, and thus a fine circuit pattern of the circuit layer can be formed on the via.
摘要翻译：印刷电路板包括形成有电镀层的通孔，与通过形成有化学镀层和电镀层并且具有圆柱形状的常规通孔不同，由此表现出良好的层间电连接和由于热应力引起的物理接触的高可靠性材料的物理性质随温度变化的变化。通孔没有上部焊盘，因此可以在通孔上形成电路层的精细电路图案。

4. 发明申请

US20090255722A1 Printed circuit board having landless via hole and method of manufacturing the same 审中-公开
标题翻译：具有无通孔的印刷电路板及其制造方法
公开(公告)号：US20090255722A1
公开(公告)日：2009-10-15
申请号：US12213975
申请日：2008-06-26
申请人： Suk Won Lee , Chang Gun Oh , Mi Sun Hwang
发明人： Suk Won Lee , Chang Gun Oh , Mi Sun Hwang
IPC分类号： H01R12/04 , H05K3/00
CPC分类号： H05K3/421 , H05K1/116 , H05K3/108 , H05K2201/09545 , H05K2201/09563 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： This invention relates to a printed circuit board having a landless via hole, including a circuit pattern formed on a via made of a first metal and having a line width smaller than the diameter of the via hole, in which the circuit pattern includes a seed layer made of a second metal and a plating layer made of a third metal, which is different from the second metal, and to a method of manufacturing the same. In the printed circuit board, the via has no upper land, thus making it possible to finely form the circuit pattern which is connected to the via, thereby realizing a high-density circuit pattern.
摘要翻译：本发明涉及一种具有无轨道通孔的印刷电路板，该无线通孔包括形成在由第一金属制成的通孔上并具有小于通孔直径的线宽的电路图案，其中电路图案包括种子层由与第二金属不同的第三金属制成的第二金属和镀层制成，以及其制造方法。在印刷电路板中，通孔没有上部焊盘，从而可以精细地形成连接到通孔的电路图案，从而实现高密度电路图案。

5. 发明授权

US08541096B2 Printed circuit board and method of manufacturing the same 失效
标题翻译：印刷电路板及其制造方法
公开(公告)号：US08541096B2
公开(公告)日：2013-09-24
申请号：US12654446
申请日：2009-12-18
申请人： Mi Sun Hwang , Jae Joon Lee , Myung Sam Kang
发明人： Mi Sun Hwang , Jae Joon Lee , Myung Sam Kang
IPC分类号： H05K1/03 , H05K7/02
CPC分类号： H05K3/10 , H05K1/0271 , H05K1/09 , H05K3/4602 , H05K2201/0338 , H05K2201/0352 , H05K2201/068 , H05K2201/09136
摘要： There is provided a printed circuit board. The printed circuit board may be configured to include: a core layer in which a bending prevention portion of at least two layers is interposed between a plurality of insulating members and includes metal layers having different thermal expansion coefficients is disposed; a circuit pattern that is formed so as to have a desired pattern on at least one of the inside of the core layer and an outer face of the core layer; and an insulating layer that is formed on the core layer and includes an opening portion that exposes the circuit pattern, and a method of manufacturing the printed circuit board. According to the above-described printed circuit board and the method of manufacturing the printed circuit board, by disposing a bending prevention portion inside the printed circuit board, a printed circuit board capable of improving the progress rate and the productivity and a method of manufacturing the printed circuit board can be provided.
摘要翻译：提供了印刷电路板。印刷电路板可以被构造为包括：芯层，其中至少两层的弯曲防止部分插入在多个绝缘构件之间并且包括具有不同热膨胀系数的金属层; 形成为在芯层的内部和芯层的外表面中的至少一个上具有期望图案的电路图案; 以及形成在芯层上并包括露出电路图案的开口部分的绝缘层，以及制造印刷电路板的方法。根据上述印刷电路板和印刷电路板的制造方法，通过在印刷电路板内设置弯曲防止部，能够提高进度和生产率的印刷电路板，以及制造印刷电路板的方法可以提供印刷电路板。

6. 发明授权

US08418361B2 Method of manufacturing printed circuit board having landless via hole 失效
标题翻译：具有无通孔的印刷电路板的制造方法
公开(公告)号：US08418361B2
公开(公告)日：2013-04-16
申请号：US13299685
申请日：2011-11-18
申请人： Suk Won Lee , Chang Gun Oh , Mi Sun Hwang
发明人： Suk Won Lee , Chang Gun Oh , Mi Sun Hwang
IPC分类号： H05K3/02
CPC分类号： H05K3/421 , H05K1/116 , H05K3/108 , H05K2201/09545 , H05K2201/09563 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： Method of manufacturing printed circuit board, including: providing a substrate including a first circuit layer having a lower land of a via; forming an insulating layer on the first circuit layer; forming a via hole in the insulating layer; filling the via hole with a first metal, thus forming a via; forming a seed layer with a second metal on the insulating layer and an exposed surface of the via; applying a resist film on the seed layer, and forming a resist pattern having an opening for a second circuit layer with a width formed on the via being smaller than a width of the via; plating a circuit region defined by the opening with a third metal, thus forming a plating layer formed of the third metal; and removing the resist film, and selectively removing an exposed portion of the seed layer, thus forming a second circuit layer.
摘要翻译：制造印刷电路板的方法，包括：提供包括具有通孔下部的第一电路层的基板; 在所述第一电路层上形成绝缘层; 在绝缘层中形成通孔; 用第一金属填充通孔，从而形成通孔; 在绝缘层上形成具有第二金属的种子层和通孔的暴露表面; 在种子层上施加抗蚀剂膜，并且形成具有形成在通孔上的宽度的第二电路层的开口的抗蚀剂图案小于通孔的宽度; 用第三金属电镀由开口限定的电路区域，从而形成由第三金属形成的镀层; 并去除抗蚀剂膜，并且选择性地去除种子层的暴露部分，从而形成第二电路层。

7. 发明申请

US20120060369A1 METHOD OF MANUFACTURING PRINTED CIRCUIT BOARD HAVING LANDLESS VIA HOLE 失效
标题翻译：制造具有通孔的印刷电路板的方法
公开(公告)号：US20120060369A1
公开(公告)日：2012-03-15
申请号：US13299685
申请日：2011-11-18
申请人： Suk Won LEE , Chang Gun Oh , Mi Sun Hwang
发明人： Suk Won LEE , Chang Gun Oh , Mi Sun Hwang
IPC分类号： H01K3/10
CPC分类号： H05K3/421 , H05K1/116 , H05K3/108 , H05K2201/09545 , H05K2201/09563 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： Method of manufacturing printed circuit board, including: providing a substrate including a first circuit layer having a lower land of a via; forming an insulating layer on the first circuit layer; forming a via hole in the insulating layer; filling the via hole with a first metal, thus forming a via; forming a seed layer with a second metal on the insulating layer and an exposed surface of the via; applying a resist film on the seed layer, and forming a resist pattern having an opening for a second circuit layer with a width formed on the via being smaller than a width of the via; plating a circuit region defined by the opening with a third metal, thus forming a plating layer formed of the third metal; and removing the resist film, and selectively removing an exposed portion of the seed layer, thus forming a second circuit layer.
摘要翻译：制造印刷电路板的方法，包括：提供包括具有通孔下部的第一电路层的基板; 在所述第一电路层上形成绝缘层; 在绝缘层中形成通孔; 用第一金属填充通孔，从而形成通孔; 在绝缘层上形成具有第二金属的种子层和通孔的暴露表面; 在种子层上施加抗蚀剂膜，并且形成具有形成在通孔上的宽度的第二电路层的开口的抗蚀剂图案小于通孔的宽度; 用第三金属电镀由开口限定的电路区域，从而形成由第三金属形成的镀层; 并去除抗蚀剂膜，并且选择性地去除种子层的暴露部分，从而形成第二电路层。

8. 发明申请

US20110138905A1 LIGHTING APPARATUS 有权
标题翻译：照明设备
公开(公告)号：US20110138905A1
公开(公告)日：2011-06-16
申请号：US12966119
申请日：2010-12-13
申请人： Ji Young KIM , Eun Seok Choi , Ji Hye Hwang , Mi Sun Hwang , Hae Rim Park , Min Su Park
发明人： Ji Young KIM , Eun Seok Choi , Ji Hye Hwang , Mi Sun Hwang , Hae Rim Park , Min Su Park
IPC分类号： G01F23/296 , F21S4/00 , F21V9/00 , F21V33/00 , A61L2/10 , G01K13/00
CPC分类号： G01F23/2962 , A61L2/10 , F21V33/00 , F21Y2113/13 , F21Y2115/10 , G01K13/00 , Y10S362/806
摘要： A lighting apparatus is disclosed. The lighting apparatus is capable of achieving improved aesthetics by irradiating mood lighting into a storage container and also, of functioning to display a variety of status information about the storage container to the outside and to sterilize the interior of the storage container.
摘要翻译：公开了一种照明装置。照明装置能够通过将心情照明照射到存储容器中而实现改善的美观，并且还能够将存储容器的各种状态信息显示到外部并对存储容器的内部进行消毒。

9. 发明申请

US20110061912A1 Printed circuit board and manufacturing method thereof 审中-公开
标题翻译：印刷电路板及其制造方法
公开(公告)号：US20110061912A1
公开(公告)日：2011-03-17
申请号：US12654668
申请日：2009-12-29
申请人： Myung Sam Kang , Mi Sun Hwang , Ok Tae Kim , Seon Ha Kang , Gil Yong Shin , Kil Yong Yun , Min Jung Cho
发明人： Myung Sam Kang , Mi Sun Hwang , Ok Tae Kim , Seon Ha Kang , Gil Yong Shin , Kil Yong Yun , Min Jung Cho
IPC分类号： H05K1/00 , H05K1/11 , B32B38/10 , B29C65/00
CPC分类号： H05K3/4611 , H05K3/045 , H05K3/4069 , H05K3/421 , H05K3/4652 , H05K2201/0355 , H05K2201/0394 , H05K2201/09509 , H05K2201/09518 , H05K2201/096 , H05K2203/1461 , H05K2203/1536 , Y10T156/10
摘要： Provided are a printed circuit board (PCB), and a manufacturing method thereof. The PCB includes a stacked structure including second and third insulation layers with a first insulation layer interposed therebetween, and a conductive via having first to fourth conductive vias. A second-layer circuit pattern and a third-layer circuit pattern are buried in the first insulation layer, a first-layer circuit pattern is formed on the second insulation layer, and a fourth-layer circuit pattern is formed on the third insulation layer. A first conductive via connects the first-layer circuit pattern and the second-layer circuit pattern, a second conductive via connects the first-layer circuit pattern and the third-layer circuit pattern, a third conductive via connects the second-layer circuit pattern and the fourth-layer circuit pattern, and a fourth conductive via connects the third-layer circuit pattern and the fourth-layer circuit pattern.
摘要翻译：提供了一种印刷电路板（PCB）及其制造方法。 PCB包括堆叠结构，其包括其间插入有第一绝缘层的第二绝缘层和第三绝缘层，以及具有第一至第四导电通孔的导电通孔。在第一绝缘层中埋设第二层电路图形和第三层电路图案，在第二绝缘层上形成第一层电路图案，在第三绝缘层上形成第四层电路图形。第一导电通孔连接第一层电路图案和第二层电路图案，第二导电通孔连接第一层电路图案和第三层电路图案，第三导电通孔连接第二层电路图案和第四层电路图案和第四导电通孔连接第三层电路图案和第四层电路图案。

10. 发明申请

US20100314755A1 PRINTED CIRCUIT BOARD, SEMICONDUCTOR DEVICE COMPRISING THE SAME, AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：印刷电路板，包含该印刷电路板的半导体器件及其制造方法
公开(公告)号：US20100314755A1
公开(公告)日：2010-12-16
申请号：US12511723
申请日：2009-07-29
申请人： Myung Sam KANG , Mi Sun Hwang , Ok Tae Kim , Seon Ha Kang , Gil Yong Shin , Kil Yong Yun , Min Jung Cho
发明人： Myung Sam KANG , Mi Sun Hwang , Ok Tae Kim , Seon Ha Kang , Gil Yong Shin , Kil Yong Yun , Min Jung Cho
IPC分类号： H01L23/498 , H05K1/11 , B05D5/12 , B32B38/00
CPC分类号： H05K3/46 , B32B2309/10 , B32B2457/14 , H01L23/13 , H01L24/48 , H01L2224/32225 , H01L2224/48091 , H01L2224/4824 , H01L2224/48465 , H01L2224/73215 , H01L2924/00014 , H01L2924/01029 , H01L2924/01078 , H01L2924/01079 , H01L2924/14 , H01L2924/15311 , H05K3/0064 , H05K3/205 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Disclosed is a printed circuit board, which includes a first circuit layer embedded in one surface an insulating layer and including a bump pad and a wire bonding pad, thus realizing a high-density wire bonding pad. A semiconductor device including the printed circuit board and a method of manufacturing the printed circuit board are also provided.
摘要翻译：公开了一种印刷电路板，其包括嵌入在一个表面中的绝缘层的第一电路层，并且包括凸块焊盘和引线接合焊盘，从而实现高密度导线焊盘。还提供了包括印刷电路板的半导体器件和制造印刷电路板的方法。

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