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    • 3. 发明授权
    • Magnetic ram cell with amplification circuitry and MRAM memory array formed using the MRAM cells
    • 具有放大电路的磁性脉冲电池和使用MRAM单元形成的MRAM存储器阵列
    • US06829160B1
    • 2004-12-07
    • US10079116
    • 2002-02-20
    • Quiqun (Kevin) QiXizeng (Stone) ShiMatthew Gibbons
    • Quiqun (Kevin) QiXizeng (Stone) ShiMatthew Gibbons
    • G11C1100
    • G11C11/16
    • A magnetic random access memory (MRAM) cell and a memory array formed from the MRAM cells are disclosed. The MRAM cell includes a magnetic tunneling junction and a transistor. The magnetic tunneling junction includes a first ferromagnetic layer, a second ferromagnetic layer and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer. The gate of the transistor is coupled to a first end of the magnetic tunneling junction. The source of the transistor is coupled to a second end the magnetic tunneling junction. The drain of the transistor is coupled with an output for reading the magnetic memory cell. During reading, a read current is applied to the magnetic tunneling junction and the transistor is preferably operated in a saturation region.
    • 公开了一种磁性随机存取存储器(MRAM)单元和由MRAM单元形成的存储器阵列。 MRAM单元包括磁隧道结和晶体管。 磁隧道结包括第一铁磁层,第二铁磁层和第一铁磁层与第二铁磁层之间的绝缘层。 晶体管的栅极耦合到磁隧道结的第一端。 晶体管的源极耦合到磁隧道结的第二端。 晶体管的漏极与用于读取磁存储单元的输出端相连。 在读取期间,将读取电流施加到磁性隧道结,并且晶体管优选地在饱和区域中操作。
    • 7. 发明授权
    • Shielded magnetic ram cells
    • 屏蔽磁性柱塞电池
    • US06888184B1
    • 2005-05-03
    • US10074394
    • 2002-02-11
    • Xizeng ShiMatthew GibbonsHua-Ching TongKyusik Sin
    • Xizeng ShiMatthew GibbonsHua-Ching TongKyusik Sin
    • G11C11/16H01L21/336H01L27/22
    • G11C11/16H01L27/222
    • A magnetic memory fabricated on a semiconductor substrate is disclosed. The method and system include a plurality of magnetic tunneling junctions and a plurality of shields for magnetically shielding the plurality of magnetic tunneling junctions. Each of the plurality of magnetic tunneling junctions includes a first ferromagnetic layer, a second ferromagnetic layer and an insulating layer between the first ferromagnetic layer and the second ferromagnetic layer. At least a portion of the plurality of shields have a high moment and a high permeability and are conductive. The plurality of shields are electrically isolated from the plurality of magnetic tunneling junctions. The plurality of magnetic tunneling junctions are between the plurality of shields.
    • 公开了一种在半导体衬底上制造的磁存储器。 该方法和系统包括多个磁性隧道结和用于磁屏蔽多个磁性隧道结的多个屏蔽。 多个磁隧道结中的每一个包括第一铁磁层,第二铁磁层和第一铁磁层与第二铁磁层之间的绝缘层。 多个屏蔽件的至少一部分具有高的力矩和高的磁导率并且是导电的。 多个屏蔽件与多个磁性隧道结电隔离。 多个磁隧道结在多个屏蔽之间。
    • 8. 发明授权
    • Thin film read head structure with improved bias magnet-to-magnetoresistive element interface and method of fabrication
    • 具有改进的偏置磁体与磁阻元件接口和制造方法的薄膜读取头结构
    • US06487056B1
    • 2002-11-26
    • US10153067
    • 2002-05-20
    • Matthew GibbonsKenneth E. KnappRonald A. BarrBenjamin P. LawJames SpallasMing Zhao
    • Matthew GibbonsKenneth E. KnappRonald A. BarrBenjamin P. LawJames SpallasMing Zhao
    • G11B539
    • B82Y10/00G11B5/3903G11B5/3932Y10T29/49032Y10T29/49041Y10T29/49043Y10T29/49044Y10T29/49046Y10T29/49052
    • The present invention provides an improved bias magnet-to-magnetoresistive element interface and method of fabrication. In a preferred embodiment, the wall/walls of an MR element opposing a bias layer are formed by over etching to provide vertical side walls without taper. In the preferred embodiment, a protective element is formed over the MR element to protect it during etch processes. In some embodiments, a filler layer is deposited prior to bias layer formation. In CIP embodiments, any portion of the filler layer forming on vertical side walls of the MR element is etched to provide an exposed side wall surface for contiguous bias layer formation. In CPP embodiments, the filler layer forms on a vertical back wall and electrically insulates the MR element from the bias layer. In CIP and CPP embodiments, tapered portions of the bias material, which form overhanging the MR element, are removed by directional etching to improve the direction and stability of the induced longitudinal field within the MR element. In some CIP embodiments, tapered overhang removal allows for formation of improved lead structures, which may be deposited on the MR element closer to the side walls, and which are not pinched off by the overhang of an underlying bias layer, thus improving current density profile and definition of the actual effective track width of the device.
    • 本发明提供一种改进的偏置磁体 - 磁阻元件接口和制造方法。 在优选实施例中,通过过蚀刻形成与偏置层相对的MR元件的壁/壁,以提供没有锥度的垂直侧壁。 在优选实施例中,在MR元件上形成保护元件以在蚀刻工艺期间保护元件。 在一些实施方案中,在形成偏压层之前沉积填料层。 在CIP实施例中,蚀刻形成在MR元件的垂直侧壁上的填充层的任何部分,以提供暴露的侧壁表面用于连续的偏置层形成。 在CPP实施例中,填充层在垂直后壁上形成,并使MR元件与偏置层电绝缘。 在CIP和CPP实施例中,通过定向蚀刻去除形成悬垂在MR元件上的倾斜材料的锥形部分,以改善MR元件内的感应纵向场的方向和稳定性。 在一些CIP实施例中,锥形突出去除允许形成改进的引线结构,其可以沉积在更靠近侧壁的MR元件上,并且不被下伏偏置层的突出部分夹住,因此改善电流密度分布 以及设备的实际有效轨迹宽度的定义。
    • 9. 发明授权
    • Thin film read head structure with improved bias magnet-to-magnetoresistive element interface and method of fabrication
    • 具有改进的偏置磁体与磁阻元件接口和制造方法的薄膜读取头结构
    • US06735850B1
    • 2004-05-18
    • US10152909
    • 2002-05-20
    • Matthew GibbonsKenneth E. KnappRonald A. BarrBenjamin P. LawJames SpallasMing Zhao
    • Matthew GibbonsKenneth E. KnappRonald A. BarrBenjamin P. LawJames SpallasMing Zhao
    • G11B5127
    • B82Y10/00G11B5/3903G11B5/3932Y10T29/49032Y10T29/49041Y10T29/49043Y10T29/49044Y10T29/49046Y10T29/49052
    • The present invention provides an improved bias magnet-to-magnetoresistive element interface and method of fabrication. In a preferred embodiment, the wall/walls of an MR element opposing a bias layer are formed by over etching to provide vertical side walls without taper. In the preferred embodiment, a protective element is formed over the MR element to protect it during etch processes. In some embodiments, a filler layer is deposited prior to bias layer formation. In CIP embodiments, any portion of the filler layer forming on vertical side walls of the MR element is etched to provide an exposed side wall surface for contiguous bias layer formation. In CPP embodiments, the filler layer forms on a vertical back wall and electrically insulates the MR element from the bias layer. In CIP and CPP embodiments, tapered portions of the bias material, which form overhanging the MR element, are removed by directional etching to improve the direction and stability of the induced longitudinal field within the MR element. In some CIP embodiments, tapered overhang removal allows for formation of improved lead structures, which may be deposited on the MR element closer to the side walls, and which are not pinched off by the overhang of an underlying bias layer, thus improving current density profile and definition of the actual effective track width of the device.
    • 本发明提供一种改进的偏置磁体 - 磁阻元件接口和制造方法。 在优选实施例中,通过过蚀刻形成与偏置层相对的MR元件的壁/壁,以提供没有锥度的垂直侧壁。 在优选实施例中,在MR元件上形成保护元件以在蚀刻工艺期间保护元件。 在一些实施方案中,在形成偏压层之前沉积填料层。 在CIP实施例中,蚀刻形成在MR元件的垂直侧壁上的填充层的任何部分,以提供暴露的侧壁表面用于连续的偏置层形成。 在CPP实施例中,填充层在垂直后壁上形成,并使MR元件与偏置层电绝缘。 在CIP和CPP实施例中,通过定向蚀刻去除形成悬垂在MR元件上的倾斜材料的锥形部分,以改善MR元件内的感应纵向场的方向和稳定性。 在一些CIP实施例中,锥形突出去除允许形成改进的引线结构,其可以沉积在更靠近侧壁的MR元件上,并且不被下伏偏置层的突出部分夹住,因此改善电流密度分布 以及设备的实际有效轨迹宽度的定义。