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1. 发明授权

US06356269B1 Image processing device and system using the same 失效
标题翻译：图像处理装置和系统使用相同
公开(公告)号：US06356269B1
公开(公告)日：2002-03-12
申请号：US09482642
申请日：2000-01-13
申请人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
发明人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
IPC分类号： G06F1580
CPC分类号： G06T15/40 , G06T1/20
摘要： In a device and system which perform processing (displaying and outputting) of image data, the amount of data transferred between a memory holding the image data and a processor processing the image data is limited, thereby a great amount of data can be processed at high speed.
摘要翻译：在执行图像数据的处理（显示和输出）的装置和系统中，保持图像数据的存储器和处理图像数据的处理器之间传送的数据量受到限制，从而可以在高处处理大量的数据速度。

2. 发明授权

US6084599A Graphics drawing device with hidden surface processing 失效
标题翻译：具有隐藏表面处理的图形绘图设备
公开(公告)号：US6084599A
公开(公告)日：2000-07-04
申请号：US956113
申请日：1997-10-24
申请人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
发明人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
IPC分类号： G06T3/00 , G06T1/20 , G06T15/40 , G06F15/00
CPC分类号： G06T15/40 , G06T1/20
摘要： In a device and system which perform processing (displaying and outputting) of image data, the amount of data transferred between a memory holding the image data and a processor processing the image data is limited, thereby a great amount of data can be processed at high speed.
摘要翻译：在执行图像数据的处理（显示和输出）的装置和系统中，保持图像数据的存储器和处理图像数据的处理器之间传送的数据量受到限制，从而可以在高处处理大量的数据速度。

3. 发明授权

US5631858A System for obtaining strict solution in accordance with accuracy of approximate solutions 失效
标题翻译：根据近似解决方案的准确度获得严格解决方案的系统
公开(公告)号：US5631858A
公开(公告)日：1997-05-20
申请号：US89103
申请日：1993-08-12
申请人： Masahisa Narita , Hisashi Kaziwara , Takeshi Asai , Shigeki Morinaga , Hiroyuki Kida , Mitsuru Watabe , Tetsuaki Nakamikawa , Shunpei Kawasaki , Junichi Tatezaki , Norio Nakagawa , Yugo Kashiwagi
发明人： Masahisa Narita , Hisashi Kaziwara , Takeshi Asai , Shigeki Morinaga , Hiroyuki Kida , Mitsuru Watabe , Tetsuaki Nakamikawa , Shunpei Kawasaki , Junichi Tatezaki , Norio Nakagawa , Yugo Kashiwagi
IPC分类号： G06F7/52 , G06F7/552 , G06F7/57 , G06F7/38
CPC分类号： G06F7/57 , G06F7/535 , G06F7/5525 , G06F2207/3816 , G06F2207/5355 , G06F2207/5356 , G06F7/4873 , G06F7/49957
摘要： A multiplication, division and square root extraction apparatus which calculates the solutions to addition, division and square root extraction functions by approximation using iteration has a multiplier, an adder-subtracter and a shifter of prescribed bit width connected to a bus. Iteration is conducted by inputting the output of the multiplier to the adder-subtracter or the shifter and returning the result to the input of the multiplier via the bus. A shifter and an arithmetic and logic unit connected to a second bus connected to the aforesaid bus via a switch have a greater bit width than the prescribed bit width and are used for large scale calculations, thus preventing a reduction in processing speed.
摘要翻译：通过使用迭代近似计算加法，除法和平方根提取函数的解的乘法，除法和平方根提取装置具有连接到总线的规定位宽的乘法器，加法器 - 减法器和移位器。通过将乘法器的输出输入到加法器 - 减法器或移位器并通过总线将结果返回到乘法器的输入来进行迭代。通过开关连接到连接到上述总线的第二总线的移位器和算术和逻辑单元具有比规定位宽更大的位宽度，并且用于大规模计算，从而防止处理速度的降低。

4. 发明授权

US5956263A Multiplication, division and square root extraction apparatus 失效
标题翻译：乘法，除法和平方根提取仪
公开(公告)号：US5956263A
公开(公告)日：1999-09-21
申请号：US797653
申请日：1997-01-31
申请人： Masahisa Narita , Hisashi Kaziwara , Takeshi Asai , Shigeki Morinaga , Hiroyuki Kida , Mitsuru Watabe , Tetsuaki Nakamikawa , Shunpei Kawasaki , Junichi Tatezaki , Norio Nakagawa , Yugo Kashiwagi
发明人： Masahisa Narita , Hisashi Kaziwara , Takeshi Asai , Shigeki Morinaga , Hiroyuki Kida , Mitsuru Watabe , Tetsuaki Nakamikawa , Shunpei Kawasaki , Junichi Tatezaki , Norio Nakagawa , Yugo Kashiwagi
IPC分类号： G06F7/52 , G06F7/552 , G06F7/57 , G06F7/00 , G06F7/38
CPC分类号： G06F7/57 , G06F7/535 , G06F7/5525 , G06F2207/3816 , G06F2207/5355 , G06F2207/5356 , G06F7/4873 , G06F7/49957
摘要： A multiplication, division and square root extraction apparatus which calculates the solutions to addition, division and square root extraction functions by approximation using iteration has a multiplier, an adder-subtracter and a shifter of prescribed bit width connected to a bus. Iteration is conducted by inputting the output of the multiplier to the adder-subtracter or the shifter and returning the result to the input of the multiplier via the bus. A shifter and an arithmetic and logic unit connected to a second bus connected to the aforesaid bus via a switch have a greater bit width than the prescribed bit width and are used for large scale calculations, thus preventing a reduction in processing speed.
摘要翻译：通过使用迭代近似计算加法，除法和平方根提取函数的解的乘法，除法和平方根提取装置具有连接到总线的规定位宽的乘法器，加法器 - 减法器和移位器。通过将乘法器的输出输入到加法器 - 减法器或移位器并通过总线将结果返回到乘法器的输入来进行迭代。通过开关连接到连接到上述总线的第二总线的移位器和算术和逻辑单元具有比规定位宽更大的位宽度，并且用于大规模计算，从而防止处理速度的降低。

5. 发明授权

US07142213B2 Graphics drawing device and method 有权
标题翻译：图形绘图装置及方法
公开(公告)号：US07142213B2
公开(公告)日：2006-11-28
申请号：US10822672
申请日：2004-04-13
申请人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
发明人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
IPC分类号： G06F15/00 , G06T1/20 , G09G5/36
CPC分类号： G06T15/40 , G06T1/20
摘要： In a device and system which perform processing (displaying and outputting) of image data, the amount of data transferred between a memory holding the image data and a processor processing the image data is limited, thereby a great amount of data can be processed at high speed.
摘要翻译：在执行图像数据的处理（显示和输出）的装置和系统中，保持图像数据的存储器和处理图像数据的处理器之间传送的数据量受到限制，从而可以在高处处理大量的数据速度。

6. 发明授权

US6092183A Data processor for processing a complex instruction by dividing it into executing units 失效
标题翻译：数据处理器，用于通过将复杂指令分为执行单元来处理
公开(公告)号：US6092183A
公开(公告)日：2000-07-18
申请号：US401691
申请日：1995-03-10
申请人： Hidehito Takewa , Shigeru Matsuo , Shinji Fujiwara , Masahisa Narita
发明人： Hidehito Takewa , Shigeru Matsuo , Shinji Fujiwara , Masahisa Narita
IPC分类号： G06F9/30 , G06F9/38
CPC分类号： G06F9/3802 , G06F9/30101 , G06F9/30145 , G06F9/3861 , G06F9/3867
摘要： A compact and small compensating-electric-power data processor is realized by dividing a plurality of calculations to be carried out by a complex instruction into a number of executing units to be processed, instead of executing the calculations in parallel as in the past. For this purpose there is provided a decoder having a detecting part for decoding an instruction and for detecting whether the instruction is an instruction for executing a plurality of calculations, a field rearranging part for rearranging a part of the fields of said instruction based on a predetermined number of calculations to be processed if it is judged by said detecting part that the instruction is an instruction for executing a plurality of calculations, and a calculation control part for performing control to execute the calculations in plural cycles in synchronism with the order of said rearranged fields. A calculation part operates to execute the calculations called for by dividing the instruction into plural cycles based on control from the calculation control part.
摘要翻译：通过将要由复杂指令执行的多个计算划分成要处理的多个执行单元来实现紧凑而小的补偿电力数据处理器，而不是如以前那样并行地执行计算。为此，提供了一种解码器，具有用于对指令进行解码并检测该指令是否是用于执行多个计算的指令的检测部分，用于基于预定的方式重排所述指令的一部分字段的字段重排部分如果由所述检测部分判断所述指令是用于执行多个计算的指令，则要处理的计算次数以及用于执行控制以与所述重新排列的顺序同步地执行多个周期的计算的计算控制部分领域。计算部分通过根据来自计算控制部分的控制将指令分成多个周期来进行所需的计算。

7. 发明授权

US5748202A Image data processor for processing pixel data in block buffer 失效
标题翻译：用于处理块缓冲器中的像素数据的图像数据处理器
公开(公告)号：US5748202A
公开(公告)日：1998-05-05
申请号：US498055
申请日：1995-07-05
申请人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
发明人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
IPC分类号： G06T3/00 , G06T1/20 , G06T15/40 , G06F12/00
CPC分类号： G06T15/40 , G06T1/20
摘要： In a device and system which perform processing, (displaying and outputting) of image data, the amount of data transferred between a memory holding the image data and a processor processing the image data is limited, thereby a great amount of data can be processed at high speed.
摘要翻译：在执行图像数据的处理（显示和输出）的装置和系统中，保持图像数据的存储器和处理图像数据的处理器之间传送的数据量受到限制，从而可以处理大量数据高速。

8. 发明授权

US5192943A Cursor display control method and apparatus in a graphic display system 失效
标题翻译：图形显示系统中的光标显示控制方法和装置
公开(公告)号：US5192943A
公开(公告)日：1993-03-09
申请号：US583584
申请日：1990-09-17
申请人： Shigeru Matsuo , Tadashi Fukushima , Tooru Komagawa , Masahisa Narita
发明人： Shigeru Matsuo , Tadashi Fukushima , Tooru Komagawa , Masahisa Narita
IPC分类号： G06F3/14 , G06F3/048 , G09G5/08
CPC分类号： G09G5/08
摘要： A cursor display control in a graphic display system is provided in which a storage range is provided for exclusive use for a cursor pattern and a desired shape is defined in the storage range to thereby perform a high-speed cursor movement. A display control apparatus in the graphic display system includes a memory for storing a cursor pattern, shift register for performing a shift processing in a non-display period of the cursor for positioning in the display screen, and parallel-serial converter for performing parallel to serial conversion at the display timing of the cursor, whereby the apparatus is suitable to be integrated in the form of an LSI and the cursor can be moved at a high speed on the screen.

9. 发明授权

US06731291B2 Image processing device and system using the same 失效
公开(公告)号：US06731291B2
公开(公告)日：2004-05-04
申请号：US10054862
申请日：2002-01-25
申请人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
发明人： Yasuhiro Nakatsuka , Keisuke Nakashima , Shigeru Matsuo , Masahisa Narita , Koyo Katsura , Hidehito Takewa , Tomoaki Aoki
IPC分类号： G06F1562
CPC分类号： G06T15/40 , G06T1/20
摘要： In a device and system which perform processing (displaying and outputting) of image data, the amount of data transferred between a memory holding the image data and a processor processing the image data is limited, thereby a great amount of data can be processed at high speed.

10. 发明授权

US5293558A Multiplication, division and square root extraction apparatus 失效
标题翻译：乘法，除法和平方根提取仪
公开(公告)号：US5293558A
公开(公告)日：1994-03-08
申请号：US536565
申请日：1990-07-03
申请人： Masahisa Narita , Hisashi Kaziwara , Takeshi Asai , Shigeki Morinaga , Hiroyuki Kida , Mitsuru Watabe , Tetsuaki Nakamikawa , Shunpei Kawasaki , Junichi Tatezaki , Norio Nakagawa , Yugo Kashiwagi
发明人： Masahisa Narita , Hisashi Kaziwara , Takeshi Asai , Shigeki Morinaga , Hiroyuki Kida , Mitsuru Watabe , Tetsuaki Nakamikawa , Shunpei Kawasaki , Junichi Tatezaki , Norio Nakagawa , Yugo Kashiwagi
IPC分类号： G06F7/52 , G06F7/552 , G06F7/57 , G06F7/38
CPC分类号： G06F7/57 , G06F7/535 , G06F7/5525 , G06F2207/3816 , G06F2207/5355 , G06F2207/5356 , G06F7/4873 , G06F7/49957
摘要： A multiplication, division and square root extraction apparatus which calculates the solutions to addition, division and square root extraction functions by approximation using iteration has a multiplier, an adder-subtracter and a shifter of prescribed bit width connected to a bus. Iteration is conducted by inputting the output of the multiplier to the adder-subtracter or the shifter and returning the result to the input of the multiplier via the bus. A shifter and an arithmetic and logic unit connected to a second bus connected to the aforesaid bus via a switch have a greater bit width than the prescribed bit width and are used for large scale calculations, thus preventing a reduction in processing speed.
摘要翻译： PCT No.PCT / JP89 / 01134 Sec。 371日期1990年7月3日 102（e）日期1990年7月3日PCT提交1989年11月2日PCT公布。出版物WO90 / 05335 日期1990年5月17日。一种乘法，除法和平方根提取装置，其通过使用迭代近似来计算加法，除法和平方根提取函数的解，具有连接到a的规定位宽的乘法器，加法器 - 减法器和移位器总线。通过将乘法器的输出输入到加法器 - 减法器或移位器并通过总线将结果返回到乘法器的输入来进行迭代。通过开关连接到连接到上述总线的第二总线的移位器和算术和逻辑单元具有比规定位宽更大的位宽度，并且用于大规模计算，从而防止处理速度的降低。

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