专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US09176277B2 Optical links, manufacturing methods thereof, and memory systems having the same 有权
标题翻译：光链路，其制造方法和具有该光链路的存储系统
公开(公告)号：US09176277B2
公开(公告)日：2015-11-03
申请号：US13549845
申请日：2012-07-16
申请人： Sung Dong Suh , In Sung Joe , Seong Gu Kim , Kyoung Won Na , Kyoung Ho Ha , Yong Hwack Shin
发明人： Sung Dong Suh , In Sung Joe , Seong Gu Kim , Kyoung Won Na , Kyoung Ho Ha , Yong Hwack Shin
IPC分类号： G02B6/12
CPC分类号： H04B10/25 , G02B6/107 , G02B6/12004 , G02B6/12007 , G02B6/14 , G02B6/29344 , G02B6/2938 , Y10T29/49
摘要： An optical link may include a main optical waveguide; N sub-optical waveguides, where N is a natural number; N mode couplers, each configured to perform a mode coupling operation between the main optical waveguide and a respective one of the N sub-optical waveguide; and an optical wavelength filter connected to an output terminal of the main optical waveguide and an output terminal of each of the N sub-optical waveguides. A memory system may include a memory device, a memory controller, and the optical link. A data processing system may include the memory system and a central processing unit connected to the memory system through a bus.
摘要翻译：光链路可以包括主光波导; N个子光波导，其中N是自然数; N模耦合器，其被配置为在所述主光波导与所述N个子光波导中的相应一个之间执行模式耦合操作; 以及连接到主光波导的输出端子和N个子光波导中的每一个的输出端子的光波长滤波器。存储器系统可以包括存储器设备，存储器控制器和光学链路。数据处理系统可以包括存储器系统和通过总线连接到存储器系统的中央处理单元。

2. 发明授权

US09166705B2 Semiconductor apparatuses having optical connections between memory controller and memory module 有权
公开(公告)号：US09166705B2
公开(公告)日：2015-10-20
申请号：US12457269
申请日：2009-06-05
申请人： In-sung Joe , Kyoung-ho Ha , Ju-hwan Yi , Yoon-dong Park
发明人： In-sung Joe , Kyoung-ho Ha , Ju-hwan Yi , Yoon-dong Park
IPC分类号： H04B10/00 , H04B10/80 , G02B6/42 , H04B10/12 , G02B6/38 , G02B6/43
CPC分类号： H04B10/801 , G02B6/3885 , G02B6/42 , G02B6/4214 , G02B6/43
摘要： Semiconductor apparatuses having optical connections between a memory controller and a memory module are provided. A semiconductor apparatus includes a memory controller, at least one socket configured to receive a memory module, and a first optical-electrical module. A second optical-electrical module is mounted in the socket and optically coupled to the first optical-electrical module via at least one optical channel.

3. 发明授权

US08842942B2 Optical modulator formed on bulk-silicon substrate 有权
标题翻译：在体硅衬底上形成的光调制器
公开(公告)号：US08842942B2
公开(公告)日：2014-09-23
申请号：US13012036
申请日：2011-01-24
申请人： Dong-jae Shin , Kyoung-won Na , Sung-dong Suh , Kyoung-ho Ha , Seong-gu Kim , Ho-chul Ji , In-sung Joe , Jin-kwon Bok , Pil-kyu Kang
发明人： Dong-jae Shin , Kyoung-won Na , Sung-dong Suh , Kyoung-ho Ha , Seong-gu Kim , Ho-chul Ji , In-sung Joe , Jin-kwon Bok , Pil-kyu Kang
IPC分类号： G02B6/42
CPC分类号： G02F1/2257 , G02F2001/212
摘要： An optical modulator comprises a bulk-silicon substrate comprising a trench having a predetermined width and a predetermined depth. A bottom cladding layer is formed in the trench, and a plurality of waveguides and a phase modulation unit are formed on the bottom cladding layer. A top cladding layer is formed on the plurality of waveguides and the phase modulation unit.
摘要翻译：光学调制器包括体硅衬底，其包括具有预定宽度和预定深度的沟槽。在沟槽中形成底层，在底面包层上形成多个波导管和相位调制单元。在多个波导和相位调制单元上形成顶层。

4. 发明授权

US08791405B2 Optical waveguide and coupler apparatus and method of manufacturing the same 有权
标题翻译：光波导和耦合器装置及其制造方法
公开(公告)号：US08791405B2
公开(公告)日：2014-07-29
申请号：US12911415
申请日：2010-10-25
申请人： Ho-chul Ji , Ki-nam Kim , Yong-woo Hyung , Kyoung-won Na , Kyoung-ho Ha , Yoon-dong Park , Dae-lok Bae , Jin-kwon Bok , Pil-kyu Kang , Sung-dong Suh , Seong-gu Kim , Dong-jae Shin , In-sung Joe
发明人： Ho-chul Ji , Ki-nam Kim , Yong-woo Hyung , Kyoung-won Na , Kyoung-ho Ha , Yoon-dong Park , Dae-lok Bae , Jin-kwon Bok , Pil-kyu Kang , Sung-dong Suh , Seong-gu Kim , Dong-jae Shin , In-sung Joe
IPC分类号： G01J1/04
CPC分类号： G02B6/124 , G02B6/122 , G02B6/30 , G02B6/34 , G02B6/4214 , G02B2006/12104
摘要： Optical waveguide and coupler devices and methods include a trench formed in a bulk semiconductor substrate, for example, a bulk silicon substrate. A bottom cladding layer is formed in the trench, and a core region is formed on the bottom cladding layer. A reflective element, such as a distributed Bragg reflector can be formed under the coupler device and/or the waveguide device. Because the optical devices are integrated in a bulk substrate, they can be readily integrated with other devices on a chip or die in accordance with silicon photonics technology. Specifically, for example, the optical devices can be integrated in a DRAM memory circuit chip die.
摘要翻译：光波导和耦合器器件和方法包括形成在体半导体衬底中的沟槽，例如体硅衬底。在沟槽中形成底层，在底面包层上形成芯部区域。可以在耦合器装置和/或波导装置下形成反射元件，例如分布式布拉格反射器。因为光学器件集成在大容量衬底中，所以它们可以根据硅光子学技术容易地与芯片上或芯片上的其它器件集成。具体地，例如，光学器件可以集成在DRAM存储器电路芯片芯片中。

5. 发明申请

US20130015546A1 MULTI-LAYER PHOTOELECTRIC INTEGRATED CIRCUIT DEVICE WITH OVERLAPPING DEVICES 审中-公开
标题翻译：具多重装置的多层光电集成电路装置
公开(公告)号：US20130015546A1
公开(公告)日：2013-01-17
申请号：US13546363
申请日：2012-07-11
申请人： In-sung Joe , Sung-dong Suh , Kyoung-won Na , Kyoung-ho Ha , Seong-gu Kim , Young-hwack Shin
发明人： In-sung Joe , Sung-dong Suh , Kyoung-won Na , Kyoung-ho Ha , Seong-gu Kim , Young-hwack Shin
IPC分类号： H01L31/0232 , H01L31/02
CPC分类号： G02B6/124 , G02B6/12002 , G02B6/12004 , G02B6/122
摘要： An integrated circuit device includes a plurality of device layers disposed on a substrate. A first one of the device layers includes at least one photo device and/or at least one electronic device and a second one of the device layers includes at least one photo device overlying the at least one photo device and/or the at least one electronic device of the first one of the device layers.
摘要翻译：集成电路器件包括设置在衬底上的多个器件层。设备层中的第一个包括至少一个照片设备和/或至少一个电子设备，并且设备层中的第二个设备层包括覆盖至少一个照片设备和/或至少一个电子设备的至少一个照片设备第一个设备层的设备。

6. 发明授权

US08129260B2 Semiconductor substrates having low defects and methods of manufacturing the same 有权
标题翻译：具有低缺陷的半导体衬底及其制造方法
公开(公告)号：US08129260B2
公开(公告)日：2012-03-06
申请号：US11802667
申请日：2007-05-24
申请人： Ho-sun Paek , Youn-joon Sung , Kyoung-ho Ha , Joong-kon Son , Sung-nam Lee
发明人： Ho-sun Paek , Youn-joon Sung , Kyoung-ho Ha , Joong-kon Son , Sung-nam Lee
IPC分类号： H01L23/58
CPC分类号： H01L21/02647 , H01L21/02378 , H01L21/02381 , H01L21/02403 , H01L21/0242 , H01L21/02433 , H01L21/02458 , H01L21/02461 , H01L21/02463 , H01L21/02469 , H01L21/02516 , H01L21/0254 , H01L21/02543 , H01L21/02546 , H01L21/02551 , H01L21/02609 , H01L21/02642 , H01L21/02645
摘要： A semiconductor substrate includes a first semiconductor layer and a second semiconductor layer. The first semiconductor layer is formed of II-VI-group semiconductor material, III-V-group semiconductor material, or II-VI-group semiconductor material and III-V-group semiconductor material. At least one amorphous region and at least one crystalloid region are formed in the first semiconductor layer. The second semiconductor layer is formed on the first semiconductor layer and is crystal-grown from the at least one crystalloid region. A method of manufacturing a semiconductor substrate includes preparing a growth substrate; crystal-growing the first semiconductor layer on the growth substrate; forming the at least one amorphous region and the at least one crystalloid region in the first semiconductor layer; and forming a second semiconductor layer on the first semiconductor layer using the at least one amorphous region as a mask and the at least one crystalloid region as a seed.
摘要翻译：半导体衬底包括第一半导体层和第二半导体层。第一半导体层由II-VI族半导体材料，III-V族半导体材料或II-VI族半导体材料和III-V族半导体材料形成。在第一半导体层中形成至少一个非晶区域和至少一个晶体区域。第二半导体层形成在第一半导体层上并且从至少一个晶体区域晶体生长。制造半导体衬底的方法包括制备生长衬底; 在生长衬底上晶体生长第一半导体层; 在所述第一半导体层中形成所述至少一个非晶区和所述至少一个晶体区; 以及使用所述至少一个非晶区域作为掩模和所述至少一个晶体区域作为种子在所述第一半导体层上形成第二半导体层。

7. 发明申请

US20110206381A1 OPTICAL SERIALIZING/DESERIALIZING APPARATUS AND METHOD AND METHOD OF MANUFACTURING SAME 审中-公开
标题翻译：光学串联/精制装置及其制造方法及方法
公开(公告)号：US20110206381A1
公开(公告)日：2011-08-25
申请号：US12911417
申请日：2010-10-25
申请人： Ho-Chul Ji , Kyoung Won Na , Sung Dong Suh , Kyoung Ho Ha , Seong Gu Kim , Dong Jae Shin , In Sung Joe
发明人： Ho-Chul Ji , Kyoung Won Na , Sung Dong Suh , Kyoung Ho Ha , Seong Gu Kim , Dong Jae Shin , In Sung Joe
IPC分类号： H04B10/00
CPC分类号： H04B10/801 , H04J14/08
摘要： An optical serializer/deserializer (SERDES) includes serializing circuitry which includes a source of a plurality of unmodulated optical signals, a modulation unit for generating a plurality of modulated optical signals using a plurality of electrical signals to modulate the plurality of unmodulated optical signals, and a coupling unit for delaying the plurality of modulated optical signs to generate a plurality of delayed modulated optical signals and combines the delayed modulated optical signals to generate a serialized modulated optical signal. Deserializing circuitry of the SERDES includes an optical splitter for splitting a serialized modulated optical signal into a plurality of modulated split optical signals, a demodulation unit for demodulating the modulated split optical signals and generating a respective plurality of demodulated split optical signals, and a delay unit for delaying each of the plurality of demodulated split optical signals by a respective delay amount such that the serialized modulated optical signal is converted into a respective plurality of parallel demodulated split optical signals.
摘要翻译：光串行器/解串器（SERDES）包括串行化电路，其包括多个未调制的光信号的源，调制单元，用于使用多个电信号产生多个调制的光信号，以调制多个未调制的光信号;以及耦合单元，用于延迟所述多个调制的光学符号以产生多个延迟调制的光信号，并组合所述经延迟的经调制的光信号以产生串行调制的光信号。 SERDES的反序列化电路包括用于将串行调制的光信号分解为多个调制的分离的光信号的光分路器，用于解调调制的分离的光信号并产生相应的多个解调的分离光信号的解调单元，以及延迟单元用于将所述多个解调的分离光信号中的每一个延迟各自的延迟量，使得所述串行调制的光信号被转换成相应的多个并行解调的分离光信号。

8. 发明申请

US20110038221A1 SEMICONDUCTOR MEMORY DEVICES, CONTROLLERS, AND SEMICONDUCTOR MEMORY SYSTEMS 有权
标题翻译：半导体存储器件，控制器和半导体存储器系统
公开(公告)号：US20110038221A1
公开(公告)日：2011-02-17
申请号：US12855409
申请日：2010-08-12
申请人： Sung-dong Suh , Kyoung-ho Ha , Seong-gu Kim , Soo-haeng Cho , In-sung Joe
发明人： Sung-dong Suh , Kyoung-ho Ha , Seong-gu Kim , Soo-haeng Cho , In-sung Joe
IPC分类号： G11C13/04
CPC分类号： G06F13/4243 , G02B6/43
摘要： A semiconductor memory system includes a controller and a memory device that are optical-interconnected. The controller includes a control logic configured to generate a control signal for controlling the memory device and a transmitter configured to convert the control signal into an optical signal, and output the optical signal. The memory device includes a receiving unit filter configured to convert the optical signal into an electric signal, and the electric signal based on a supply voltage corresponding to a period of the optical signal or the electric signal.
摘要翻译：半导体存储器系统包括光学互连的控制器和存储器件。所述控制器包括：控制逻辑，被配置为产生用于控制所述存储器件的控制信号;以及发射器，被配置为将所述控制信号转换为光信号，并输出所述光信号。存储装置包括：接收单元滤波器，被配置为基于与光信号或电信号的周期相对应的电源电压将光信号转换为电信号。

9. 发明授权

US07785911B2 Semiconductor laser diode with current restricting layer and fabrication method thereof 失效
标题翻译：具有限流层的半导体激光二极管及其制造方法
公开(公告)号：US07785911B2
公开(公告)日：2010-08-31
申请号：US11580093
申请日：2006-10-13
申请人： Joon-seop Kwak , Kyoung-ho Ha , Yoon-joon Sung
发明人： Joon-seop Kwak , Kyoung-ho Ha , Yoon-joon Sung
IPC分类号： H01L21/86
CPC分类号： H01S5/22 , H01S5/2063 , H01S5/32341
摘要： Provided are a semiconductor laser diode having a current confining layer and a method of fabricating the same. The semiconductor laser diode includes a substrate, a first material layer deposited on the substrate, an active layer which is deposited on the first material layer and emits a laser beam, and a second material layer which is deposited on the active layer and includes a ridge portion protruding from the active layer and a current confining layer formed by injection of ions into peripheral portions of the ridge portion so as to confine a current injected into the active layer. Therefore, it is possible to fabricate an improved semiconductor laser diode having a low-resonance critical current value that can remove a loss in an optical profile and reduce the profile width of a current injected into the active layer while maintaining the width of the ridge portion.
摘要翻译：提供一种具有电流限制层的半导体激光二极管及其制造方法。半导体激光二极管包括衬底，沉积在衬底上的第一材料层，沉积在第一材料层上并发射激光束的有源层和沉积在有源层上并包括脊的第二材料层从活性层突出的部分和通过将离子注入脊部的周边部分形成的电流限制层，以便限制注入有源层的电流。因此，可以制造具有低共振临界电流值的改进的半导体激光二极管，其可以消除光学轮廓的损失并且减小注入有源层的电流的轮廓宽度，同时保持脊部的宽度。

10. 发明申请

US20100194399A1 MEMORY SYSTEM, MEMORY TEST SYSTEM AND METHOD OF TESTING MEMORY SYSTEM AND MEMORY TEST SYSTEM 有权
标题翻译：存储器系统，存储器测试系统和测试存储器系统和存储器测试系统的方法
公开(公告)号：US20100194399A1
公开(公告)日：2010-08-05
申请号：US12690656
申请日：2010-01-20
申请人： Soo-Haeng Cho , Ki-Jae Song , Sung-dong Suh , Kyoung-ho Ha , Seong-gu Kim , Yeoung-Kum Kim , In-sung Joe
发明人： Soo-Haeng Cho , Ki-Jae Song , Sung-dong Suh , Kyoung-ho Ha , Seong-gu Kim , Yeoung-Kum Kim , In-sung Joe
IPC分类号： G01R31/00 , G01R31/26
CPC分类号： G11C29/56 , G11C29/56012 , G11C2029/5602 , Y10T29/49004
摘要： A memory test system is disclosed. The memory system includes a memory device, a tester generating a clock signal and a test signal for testing the memory device, and an optical splitting module. The optical splitting module comprises an electrical-optical signal converting unit which converts each of the clock signal and the test signal into an optical signal to output the clock signal and the test signal as an optical clock signal and an optical test signal. The optical splitting unit further comprises an optical signal splitting unit which splits each of the optical clock signal and the optical test signal into n signals (n being at least two), and an optical-electrical signal converting unit which receives the split optical clock signal and the split optical test signal to convert the split optical clock signal and the split optical test signal into electrical signals used in the memory device.
摘要翻译：记录测试系统被公开。存储器系统包括存储器件，产生时钟信号的测试器和用于测试存储器件的测试信号，以及光分离模块。光分路模块包括电光信号转换单元，其将时钟信号和测试信号中的每一个转换为光信号，以输出时钟信号和测试信号作为光时钟信号和光测试信号。光分路单元还包括光信号分离单元，其将每个光时钟信号和光测试信号分解为n个信号（n至少为2个）;以及光电信号转换单元，其接收分离的光时钟信号以及分离的光学测试信号，以将分离的光时钟信号和分割的光学测试信号转换成在存储器件中使用的电信号。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式