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1. 发明授权

US07169440B2 Method for removing photoresist and etch residues 失效
标题翻译：去除光刻胶和蚀刻残留物的方法
公开(公告)号：US07169440B2
公开(公告)日：2007-01-30
申请号：US10259768
申请日：2002-09-30
申请人： Vaidyanathan Balasubramaniam , Masaaki Hagiwara , Eiichi Nishimura , Kouichiro Inazawa
发明人： Vaidyanathan Balasubramaniam , Masaaki Hagiwara , Eiichi Nishimura , Kouichiro Inazawa
IPC分类号： B05D5/06
CPC分类号： H01L21/02063 , G03F7/427 , H01L21/31138
摘要： A method is provided for plasma ashing to remove photoresist remnants and etch residues that are formed during preceding plasma etching of dielectric layers. The ashing method uses a two-step plasma process involving an oxygen-containing gas, where low or zero bias is applied to the substrate in the first cleaning step to remove significant amount of photoresist remnants and etch residues from the substrate, in addition to etching and removing detrimental fluoro-carbon residues from the chamber surfaces. An increased bias is applied to the substrate in the second cleaning step to remove the remains of the photoresist and etch residues from the substrate. The two-step process reduces the memory effect commonly observed in conventional one-step ashing processes. A method of endpoint detection can be used to monitor the ashing process.
摘要翻译：提供了一种用于等离子体灰化以去除光刻胶残留物的蚀刻残留物和蚀刻在电介质层的先前等离子体蚀刻期间形成的残留物的方法。灰化方法使用包含含氧气体的两步等离子体工艺，其中在第一清洁步骤中向衬底施加低或零偏压，以除去蚀刻之外的大量光致抗蚀剂残余物和蚀刻残留物并从室表面除去有害的氟碳残余物。在第二清洗步骤中对衬底施加增加的偏压以除去光刻胶的残余物并从衬底上蚀刻残留物。两步法减少了常规一步灰化过程中常见的记忆效应。端点检测方法可用于监测灰化过程。

2. 发明授权

US6159862A Semiconductor processing method and system using C.sub.5 F.sub.8 失效
标题翻译：半导体处理方法和系统采用C5F8
公开(公告)号：US6159862A
公开(公告)日：2000-12-12
申请号：US87848
申请日：1998-06-01
申请人： Masahiro Yamada , Youbun Ito , Kouichiro Inazawa , Abron Toure , Kunihiko Hinata , Hiromi Sakima
发明人： Masahiro Yamada , Youbun Ito , Kouichiro Inazawa , Abron Toure , Kunihiko Hinata , Hiromi Sakima
IPC分类号： H01L21/311 , H01L21/768 , H01L21/30
CPC分类号： H01L21/76802 , H01L21/31116 , H01L21/76804 , H01L21/7681 , H01L21/76897 , Y02C20/30 , Y02P70/605
摘要： A method and system for processing a substrate in the presence of high purity C.sub.5 F.sub.8. When processing oxides and dielectrics in a gas plasma processing system, C.sub.5 F.sub.8 is used in combination with a carrier gas (e.g., Ar) and one or more of CO and O.sub.2. When using a silicon nitride (Si.sub.x N.sub.y) layer as an etch stop, effective etching is performed due to the selectivity of oxides versus silicon nitride. The method is used when etching down to self-aligning contacts and other layers. The method may be practiced with or without using an anti-reflective coating underneath the photoresist layer.
摘要翻译：在高纯度C5F8存在下处理基材的方法和系统。当在气体等离子体处理系统中处理氧化物和电介质时，C5F8与载气（例如Ar）和CO和O 2中的一种或多种组合使用。当使用氮化硅（SixNy）层作为蚀刻停止时，由于氧化物对氮化硅的选择性而进行有效的蚀刻。当蚀刻到自对准触点和其他层时，使用该方法。可以使用或不使用光致抗蚀剂层下方的抗反射涂层来实施该方法。

3. 发明授权

US5721090A Method of etching a substrate 失效
标题翻译：蚀刻基板的方法
公开(公告)号：US5721090A
公开(公告)日：1998-02-24
申请号：US530910
申请日：1995-09-20
申请人： Shin Okamoto , Kouichiro Inazawa , Sachiko Furuya , Maki Koizumi
发明人： Shin Okamoto , Kouichiro Inazawa , Sachiko Furuya , Maki Koizumi
IPC分类号： G03F7/09 , H01L21/306 , H01L21/308 , H01L21/311 , G03F7/00
CPC分类号： H01L21/31116 , G03F7/091 , H01L21/30621 , H01L21/3081 , H01L21/31144
摘要： An etching method comprising the steps of forming an etched layer on a wafer and covering the etched layer with an anti-reflection cover and then the anti-reflection cover with a photoresist film, pattern-exposing the photoresist film, developing the exposed photoresist film to form pattern openings in each of which the anti-reflection cover is exposed, and carrying the wafer into a chamber, exhausting the chamber to decompressed atmosphere, and introducing a mixed gas of C.sub.4 F.sub.8 gas and at least one of O.sub.2 and N.sub.2 gases into the process chamber to generate plasma of this mixed gas and act active species in this plasma on the wafer, whereby the anti-reflection cover which is exposed in each of the pattern openings is etched and the etched layer is then etched without etching the photoresist film formed on an inner surface each pattern opening.
摘要翻译：一种蚀刻方法，包括以下步骤：在晶片上形成蚀刻层并用抗反射罩覆盖蚀刻层，然后用光致抗蚀剂膜形成抗反射罩，使曝光的光致抗蚀剂膜图案曝光，将曝光的光致抗蚀剂膜显影成形成图案开口，其中每个防反射盖被暴露，并将晶片运送到室中，将该室排放到减压气氛中，以及将C 4 F 8气体和至少一种O 2和N 2气体的混合气体引入该过程以产生该混合气体的等离子体，并且在晶片上的该等离子体中起作用活性物质，由此蚀刻在每个图案开口中暴露的抗反射盖，然后蚀刻蚀刻层，而不蚀刻形成在每个图案开口的内表面。

4. 发明授权

US06737350B1 Method of manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US06737350B1
公开(公告)日：2004-05-18
申请号：US09665960
申请日：2000-09-21
申请人： Takashi Akahori , Kouichiro Inazawa , Kouji Senoo , Masaaki Hagiwara
发明人： Takashi Akahori , Kouichiro Inazawa , Kouji Senoo , Masaaki Hagiwara
IPC分类号： H01L214763
CPC分类号： H01L21/76832 , H01L21/0212 , H01L21/02274 , H01L21/31116 , H01L21/3127 , H01L21/31612 , H01L21/76807 , H01L21/76808 , H01L21/76835 , H01L2221/1031 , H01L2221/1036
摘要： A semiconductor device using, e.g., a fluorine containing carbon film, as an interlayer dielectric film is produced by a dual damascene method which is a simple technique. After an dielectric film, e.g., an SiO2 film 3, is deposited on a substrate 2, the SiO2 film 3 is etched to form a via hole 31 therein, and then, a top dielectric film, e.g., a CF film 4, is deposited on the top face of the SiO2 film 3. If the CF film is deposited by activating a thin-film deposition material having a bad embedded material, e.g., C6F6 gas, as a plasma, the CF film 4 can be deposited on the top face of the SiO2 film 3 while inhibiting the CF film from being embedded into the via hole 31. Subsequently, by etching the CF film 4 to form a groove 41 therein, it is possible to easily produce a dual damascene shape wherein the groove 41 is integrated with the via hole 31.
摘要翻译：使用例如含氟碳膜作为层间电介质膜的半导体器件通过双镶嵌法制造，这是一种简单的技术。在介质膜（例如SiO 2膜3）沉积在衬底2上之后，对SiO 2膜3进行蚀刻以在其中形成通孔31，然后在SiO 2膜3的顶面上沉积顶部电介质膜（例如CF膜4）。如果CF膜通过激活作为等离子体，具有不良嵌入材料（例如，C 6 F 6气体）的薄膜沉积材料可以将CF膜4沉积在SiO 2膜3的顶面上，同时抑制CF膜嵌入到通孔31中。随后，通过蚀刻CF膜4以在其中形成凹槽41，可以容易地产生双镶嵌形状，其中凹槽41与通孔31一体化。

5. 发明授权

US06642149B2 Plasma processing method 有权
标题翻译：等离子体处理方法
公开(公告)号：US06642149B2
公开(公告)日：2003-11-04
申请号：US10286789
申请日：2002-11-04
申请人： Tomoki Suemasa , Tsuyoshi Ono , Kouichiro Inazawa , Makoto Sekine , Itsuko Sakai , Yukimasa Yoshida
发明人： Tomoki Suemasa , Tsuyoshi Ono , Kouichiro Inazawa , Makoto Sekine , Itsuko Sakai , Yukimasa Yoshida
IPC分类号： H01L21302
CPC分类号： H01J37/32174 , H01J37/32091 , H01J37/32165
摘要： In a processing chamber of an etching apparatus a lower electrode and an upper electrode grounded through a processing container are disposed oppositely to each other. A first high frequency power supply section composed of a first filter, a first matching device, and a first power source, and a second high frequency power supply section composed of a second filter, a second matching device, and a second power source are connected to the lower electrode. A superimposed power of two frequencies composed of a first high frequency power component of at least 10 MHz produced from the first power source and a second high frequency power component of at least 2 MHz produced from the second power source is applied to the lower electrode. Ions in the plasma do not accelerated by changes of electric field in the processing chamber, but are accelerated by a self-bias voltage and collide only against a wafer on the lower electrode.
摘要翻译：在蚀刻装置的处理室中，通过处理容器接地的下电极和上电极彼此相对设置。由第一滤波器，第一匹配装置和第一电源组成的第一高频电源部分和由第二滤波器，第二匹配装置和第二电源组成的第二高频电源部分被连接到下电极。将由第一电源产生的至少10MHz的第一高频功率分量和由第二电源产生的至少2MHz的第二高频功率分量组成的两个频率的叠加功率施加到下部电极。等离子体中的离子不会因处理室中的电场的变化而加速，而是通过自偏压加速并且仅与下电极上的晶片相撞。

6. 发明授权

US06602435B1 Etching method 有权
标题翻译：蚀刻方法
公开(公告)号：US06602435B1
公开(公告)日：2003-08-05
申请号：US09582457
申请日：2000-06-26
申请人： Masahiro Yamada , Youbun Ito , Kouichiro Inazawa
发明人： Masahiro Yamada , Youbun Ito , Kouichiro Inazawa
IPC分类号： H01L213065
CPC分类号： H01L21/76802 , H01L21/31116 , H01L21/76804 , Y02P70/605
摘要： A processing gas constituted of C5F8, O2 and Ar achieving a flow rate ratio of 1≦C5F8 flow rate/O2 flow rate≦1.625 is supplied into a processing chamber 102 of an etching apparatus 100 and the atmosphere pressure is set within a range of 45 mTorr˜50 mTorr. High-frequency power is applied to a lower electrode 110 sustained within a temperature range of 20° C.˜40° C. on which a wafer W is mounted to raise the processing gas to plasma, and using the plasma, a contact hole 210 is formed at an SiO2 film 208 on an SiNx film 206 formed at the wafer W. The use of C5F8 and O2 makes it possible to form a contact hole 210 achieving near-perfect verticality at the SiO2 film 208 and also improves the selection ratio of the SiO2 film 208 relative to the SiNx film 206. C5F8, which becomes decomposed over a short period of time when released into the atmosphere, does not induce the greenhouse effect.
摘要翻译：由C5F8，O2和Ar构成的处理气体，将流量比为1 <= C5F8流量/ O2流量<= 1.625而提供到蚀刻装置100的处理室102中，将气氛压力设定在一定范围内 45 mTorr〜50 mTorr。将高频电力施加到在20℃〜40℃的温度范围内保持的下部电极110，在该温度范围内安装有晶片W，以将处理气体升至等离子体，并且使用等离子体，接触孔210 在形成在晶片W上的SiNx膜206上的SiO 2膜208上形成。使用C5F8和O2可以形成接触孔210，其在SiO 2膜208上实现接近完全的垂直度，并且还提高了选择比 SiO 2膜208相对于SiNx膜206.当释放到大气中时，在短时间内分解的C5F8不会引起温室效应。

7. 发明授权

US06488863B2 Plasma etching method 失效
公开(公告)号：US06488863B2
公开(公告)日：2002-12-03
申请号：US09970852
申请日：2001-10-05
申请人： Koichi Yatsuda , Tetsuya Nishiara , Kouichiro Inazawa , Shin Okamoto
发明人： Koichi Yatsuda , Tetsuya Nishiara , Kouichiro Inazawa , Shin Okamoto
IPC分类号： H01L213065
CPC分类号： H01L21/31116
摘要： An etching gas is supplied into a process chamber and turned into plasma so as to etch a silicon nitride film arranged on a field silicon oxide film on a wafer (w). A mixture gas containing at least CH2F2 gas and O2 gas is used as the etching gas. Parameters for planar uniformity, by which the etching apparatus is set in light of a set value of the planar uniformity, include the process pressure and the mixture ratio (CH2F2/O2) of the mixture gas. As the set value of the planar uniformity is more strict, either one of the process pressure and the mixture ratio is set higher.

8. 发明授权

US6089181A Plasma processing apparatus 失效
标题翻译：等离子体处理装置
公开(公告)号：US6089181A
公开(公告)日：2000-07-18
申请号：US897916
申请日：1997-07-21
申请人： Tomoki Suemasa , Tsuyoshi Ono , Kouichiro Inazawa
发明人： Tomoki Suemasa , Tsuyoshi Ono , Kouichiro Inazawa
IPC分类号： C23F4/00 , H01J37/32 , H01L21/302 , H01L21/3065 , C23C16/00
CPC分类号： H01J37/32155 , H01J37/32082 , H01J37/32165
摘要： In a plasma etching apparatus, a process gas is supplied into a process chamber and converted into plasma by means of RF discharge, and a semiconductor wafer placed on a lower electrode is etched by the plasma. An RF power supply mechanism is connected to the lower electrode for applying thereto a superposed RF power for forming an RF electric field in the process chamber. The RF power supply mechanism has first and second RF power supplies for respectively oscillating a low frequency RF component and a high frequency RF component having a higher frequency than the low frequency RF component. The high frequency RF component from the second frequency RF component supply has its wave form modulated by a modulator on the basis of the wave form of the low frequency RF component from the first frequency RF power supply. Thereafter, the modulated high frequency RF component and the low frequency RF component are superposed upon each other. The high frequency RF component has a larger amplitude at a negative side peak of the low frequency RF component than at a positive side peak of the low frequency RF component.
摘要翻译：在等离子体蚀刻装置中，通过RF放电将处理气体供给到处理室并变换为等离子体，通过等离子体蚀刻放置在下部电极上的半导体晶片。 RF电源机构连接到下电极，以向其施加用于在处理室中形成RF电场的叠加RF功率。 RF电源机构具有第一和第二RF电源，用于分别振荡具有比低频RF分量更高频率的低频RF分量和高频RF分量。来自第二频率RF分量电源的高频RF分量的波形由调制器调制，基于来自第一频率RF电源的低频RF分量的波形。此后，调制的高频RF分量和低频RF分量彼此重叠。高频RF分量在低频RF分量的负侧峰值处具有比在低频RF分量的正侧峰值处的振幅更大的振幅。

9. 发明授权

US07465673B2 Method and apparatus for bilayer photoresist dry development 失效
标题翻译：用于双层光致抗蚀剂干式显影的方法和装置
公开(公告)号：US07465673B2
公开(公告)日：2008-12-16
申请号：US10736782
申请日：2003-12-17
申请人： Yoshiki Igarashi , Kouichiro Inazawa , Kimihiro Higuchi , Vaidyanathan Balasubramaniam , Eiichi Nishimura , Ralph Kim , Philip Sansone , Masaaki Hagihara
发明人： Yoshiki Igarashi , Kouichiro Inazawa , Kimihiro Higuchi , Vaidyanathan Balasubramaniam , Eiichi Nishimura , Ralph Kim , Philip Sansone , Masaaki Hagihara
IPC分类号： H01L21/00
CPC分类号： H01L21/31138 , G03F7/091 , H01L21/31144 , H01L21/76802
摘要： A method for etching an organic anti-reflective coating (ARC) layer on a substrate in a plasma processing system comprising: introducing a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O); forming a plasma from the process gas; and exposing the substrate to the plasma. The process gas can, for example, constitute an NH3/O2, N2/H2/O2, N2/H2/CO, NH3/CO, or NH3/CO/O2 based chemistry. Additionally, the process chemistry can further comprise the addition of helium. The present invention further presents a method for forming a bilayer mask for etching a thin film on a substrate, wherein the method comprises: forming the thin film on the substrate; forming an ARC layer on the thin film; forming a photoresist pattern on the ARC layer; and transferring the photoresist pattern to the ARC layer with an etch process using a process gas comprising nitrogen (N), hydrogen (H), and oxygen (O).
摘要翻译：一种用于在等离子体处理系统中蚀刻衬底上的有机抗反射涂层（ARC）层的方法，包括：引入包含氮（N），氢（H）和氧（O）的工艺气体; 从工艺气体形成等离子体; 并将衬底暴露于等离子体。工艺气体可以例如构成基于NH 3 / O 2，N 2 / H 2 / O 2，N 2 / H 2 / CO，NH 3 / CO或NH 3 / CO / O 2的化学。另外，工艺化学可以进一步包括添加氦。本发明还提供一种用于形成用于在衬底上蚀刻薄膜的双层掩模的方法，其中所述方法包括：在所述衬底上形成所述薄膜; 在薄膜上形成ARC层; 在ARC层上形成光刻胶图案; 以及使用包含氮（N），氢（H）和氧（O）的工艺气体的蚀刻工艺将光致抗蚀剂图案转移到ARC层。

10. 发明授权

US06465359B2 Etchant for use in a semiconductor processing method and system 失效
标题翻译：用于半导体处理方法和系统的蚀刻剂
公开(公告)号：US06465359B2
公开(公告)日：2002-10-15
申请号：US09398472
申请日：1999-09-17
申请人： Masahiro Yamada , Youbun Ito , Kouichiro Inazawa , Abron Toure , Kunihiko Hinata , Hiromi Sakima
发明人： Masahiro Yamada , Youbun Ito , Kouichiro Inazawa , Abron Toure , Kunihiko Hinata , Hiromi Sakima
IPC分类号： H01L21302
CPC分类号： H01L21/76802 , H01L21/31116 , H01L21/76804 , H01L21/7681 , H01L21/76897 , Y02C20/30 , Y02P70/605
摘要： A method and system for processing a substrate in the presence of high purity C5F8. When processing oxides and dielectrics in a gas plasma processing system, C5F8 is used in combination with a carrier gas (e.g., Ar) and one or more of CO and O2. When using a silicon nitride (SixNy) layer as an etch stop, effective etching is performed due to the selectivity of oxides versus silicon nitride. The method is used when etching down to self-aligning contacts and other layers. The method may be practiced with or without using an anti-reflective coating underneath the photoresist layer.
摘要翻译：在高纯度C5F8存在下处理基材的方法和系统。当在气体等离子体处理系统中处理氧化物和电介质时，C5F8与载气（例如Ar）和CO和O 2中的一种或多种组合使用。当使用氮化硅（SixNy）层作为蚀刻停止时，由于氧化物对氮化硅的选择性而进行有效的蚀刻。当蚀刻到自对准触点和其他层时，使用该方法。可以使用或不使用光致抗蚀剂层下方的抗反射涂层来实施该方法。

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