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1. 发明授权

US08462887B1 Receiver employing selectable A/D sample clock frequency 有权
标题翻译：接收机采用可选择的A / D采样时钟频率
公开(公告)号：US08462887B1
公开(公告)日：2013-06-11
申请号：US13213846
申请日：2011-08-19
申请人： King Chun Tsai , Patrick Clement , David Cousinard
发明人： King Chun Tsai , Patrick Clement , David Cousinard
IPC分类号： H04L27/00
CPC分类号： H03M3/458 , H01L51/524 , H03M1/004 , H03M1/12
摘要： A receiver is set forth that includes a tuner circuit and a converter circuit. The tuner circuit provides an analog signal corresponding to a modulated signal that is received on a selected channel. The converter circuit includes a sample clock that is used to convert the analog signal to a digital signal at a conversion rate corresponding to the frequency of the sample clock. The sample clock is selectable between at least two different clock frequencies.
摘要翻译：提出了包括调谐器电路和转换器电路的接收器。调谐器电路提供对应于在所选频道上接收的调制信号的模拟信号。转换器电路包括采样时钟，该采样时钟用于以与采样时钟的频率对应的转换速率将模拟信号转换为数字信号。采样时钟可在至少两个不同的时钟频率之间选择。

2. 发明申请

US20100220243A1 SYSTEMS AND METHODS FOR CALIBRATING POWER REGULATED COMMUNICATION CIRCUITRY 有权
标题翻译：用于校准功率调节通信电路的系统和方法
公开(公告)号：US20100220243A1
公开(公告)日：2010-09-02
申请号：US12775694
申请日：2010-05-07
申请人： George Chien , King Chun Tsai , Sang Won Son , Alireza Shirvani-Mahdavi , Qiong Sun , Leycheoh Lim
发明人： George Chien , King Chun Tsai , Sang Won Son , Alireza Shirvani-Mahdavi , Qiong Sun , Leycheoh Lim
IPC分类号： H04N5/52 , H04W52/52 , H03L5/00
CPC分类号： H04W52/52 , H04B17/102 , H04B17/13
摘要： Systems and methods are provided for calibrating the control mechanism in a communication circuit to allow the communication circuit to maintain a desired output power level. The communication circuit includes a variable gain adjustment circuit and a power amplifier, which operate together to provide an output power level. A control circuit controls the variable gain adjustment circuit based on a default gain parameter, a high power threshold, and a low power threshold. A calibration circuit in the control circuit calibrates a default gain parameter to provide a desired output power. A power detector can detect the desired output power level to provide an output power measurement. The calibration circuit calibrates upper and lower power thresholds to provide an acceptable range of power variation around the output power measurement.
摘要翻译：提供了用于校准通信电路中的控制机构以允许通信电路保持期望的输出功率电平的系统和方法。通信电路包括可变增益调整电路和功率放大器，其一起工作以提供输出功率电平。控制电路基于默认增益参数，高功率阈值和低功率阈值来控制可变增益调整电路。控制电路中的校准电路校准默认增益参数以提供期望的输出功率。功率检测器可以检测期望的输出功率电平以提供输出功率测量。校准电路校准上限和下限功率阈值，以提供输出功率测量周围功率变化范围的可接受范围。

3. 发明授权

US07613249B1 Spurious component reduction 失效
标题翻译：杂散成分减少
公开(公告)号：US07613249B1
公开(公告)日：2009-11-03
申请号：US10829801
申请日：2004-04-21
申请人： King Chun Tsai
发明人： King Chun Tsai
IPC分类号： H04L25/03
CPC分类号： H04L25/03828 , H04L27/364
摘要： Apparatus, systems, and methods implementing techniques for reducing spurious components are described. According to one aspect, a wideband polyphase filter filters an input signal that has an associated first frequency. The wideband polyphase filter has poles corresponding to a first filter frequency and a second filter frequency, where the two filter frequencies are different. According to another aspect, a mixer mixes the filtered signal with a local-oscillator signal at a second frequency to produce an upconverted signal, where the second frequency is substantially an integer multiple of the first frequency.
摘要翻译：描述了实现减少杂散分量的技术的装置，系统和方法。根据一个方面，宽带多相滤波器对具有相关联的第一频率的输入信号进行滤波。宽带多相滤波器具有对应于第一滤波器频率和第二滤波器频率的极点，其中两个滤波器频率不同。根据另一方面，混频器将经滤波的信号与本地振荡器信号以第二频率混频以产生上变频信号，其中第二频率基本上是第一频率的整数倍。

4. 发明授权

US07463095B1 Method and apparatus for an LNA with high linearity and improved gain control 有权
标题翻译：具有高线性度和改进的增益控制的LNA的方法和装置
公开(公告)号：US07463095B1
公开(公告)日：2008-12-09
申请号：US11890738
申请日：2007-08-07
申请人： Xiaodong Jin , Lawrence Tse , King Chun Tsai , George Chien
发明人： Xiaodong Jin , Lawrence Tse , King Chun Tsai , George Chien
IPC分类号： H03F3/04
CPC分类号： H03G1/0029 , H03G1/007 , H03G2201/103
摘要： An analog signal processing circuit comprises a bias circuit, a first circuit including a control input that communicates with the bias circuit, a first terminal that generates an output current, and a second terminal, and a device that communicates with the second terminal of the first circuit, that includes a variable resistor, and that has a resistance that is modulated in response to an input signal to the analog signal processing circuit.
摘要翻译：模拟信号处理电路包括偏置电路，包括与偏置电路通信的控制输入的第一电路，产生输出电流的第一端子和第二端子，以及与第一端子的第二端子通信的装置电路，其包括可变电阻器，并且具有响应于模拟信号处理电路的输入信号而被调制的电阻。

5. 发明授权

US07444124B1 Adjustable segmented power amplifier 有权
标题翻译：可调分段功率放大器
公开(公告)号：US07444124B1
公开(公告)日：2008-10-28
申请号：US10776476
申请日：2004-02-10
申请人： Wayne Loeb , King Chun Tsai
发明人： Wayne Loeb , King Chun Tsai
IPC分类号： H03G3/10 , H04B1/04
CPC分类号： H03G1/0088 , H03F1/0261 , H03F1/0277 , H03F3/211 , H03F3/245 , H03F3/45085 , H03F3/602 , H03F2200/09 , H03F2200/18 , H03F2200/423 , H03F2200/451 , H03F2200/541 , H03F2203/21139 , H03F2203/21178 , H03F2203/45731 , H04B1/0483
摘要： An architecture, circuits, systems and a method for amplifying an analog signal. The architecture and/or circuit generally includes a first fixed stage (e.g., a predriver) and an adjustable stage. The first fixed stage may be configured to amplify an analog signal and provide a first amplified analog output at a first common node. The adjustable stage may comprise a plurality of independently selectable parallel amplifier segments. Each of the parallel segments may have an input at the first common node and an output at a second common node, a transistor having a control terminal, and a first inductor in electrical communication with the control terminal of the transistor. The adjustable stage may be configured to apply a bias to the control terminal of the transistor in a selected segment and to provide an output signal in one of a plurality of a power ranges corresponding to a number of selected parallel amplifier segments. The output signal generally has a minimum power efficiency when two or more of the parallel segments are selected. The present invention advantageously provides a relatively compact power amplifier with an extended output power range at which the amplifier is highly efficient. In preferred embodiments, the input and output matching characteristics are generally independent of the number of selected output amplifier segments.
摘要翻译：一种用于放大模拟信号的架构，电路，系统和方法。架构和/或电路通常包括第一固定级（例如，预驱动器）和可调节级。第一固定级可以被配置为放大模拟信号并且在第一公共节点处提供第一放大的模拟输出。可调节级可以包括多个可独立选择的并联放大器段。每个并行段可以具有在第一公共节点处的输入和在第二公共节点处的输出，具有控制端子的晶体管，以及与晶体管的控制端子电连通的第一电感器。可调节级可以被配置为将偏置施加到所选择的段中的晶体管的控制端，并且提供与多个选择的并联放大器段对应的多个功率范围中的一个功率范围中的输出信号。当选择两个或多个并联段时，输出信号通常具有最小功率效率。本发明有利地提供了具有扩展输出功率范围的相对紧凑的功率放大器，在该功率范围内放大器是高效率的。在优选实施例中，输入和输出匹配特性通常与选择的输出放大器段的数量无关。

6. 发明授权

US07239199B1 Amplifier calibration 有权
标题翻译：放大器校准
公开(公告)号：US07239199B1
公开(公告)日：2007-07-03
申请号：US10825781
申请日：2004-04-16
申请人： George Chien , Donghong Cui , King Chun Tsai , Yungping Hsu , Hsiao-Cheng Tang , Yonghua Song
发明人： George Chien , Donghong Cui , King Chun Tsai , Yungping Hsu , Hsiao-Cheng Tang , Yonghua Song
IPC分类号： H03F1/02
CPC分类号： H03F3/45085 , H03F3/45596 , H03F2203/45048 , H03F2203/45072 , H03F2203/45212 , H03F2203/45354 , H03F2203/45356 , H03F2203/45372 , H03F2203/45682
摘要： Apparatus, systems, and methods implementing techniques for reducing the variation of a DC offset are described. An input signal is amplified to produce an intermediate signal. The intermediate signal is processed to produce a feedback signal and an output signal, where the output signal has a DC offset that varies with a varying parameter of the circuitry used to process the intermediate signal. Variation of the DC offset of the output signal is reduced using the feedback signal. In one implementation, the circuitry used to process the intermediate signal is a variable-gain amplifier circuit, and the DC offset of the output signal varies with a gain of the variable-gain amplifier.
摘要翻译：描述了实现用于减小DC偏移的变化的技术的装置，系统和方法。输入信号被放大以产生中间信号。处理中间信号以产生反馈信号和输出信号，其中输出信号具有随着用于处理中间信号的电路的变化参数而变化的DC偏移。使用反馈信号减小输出信号的直流偏移的变化。在一个实现中，用于处理中间信号的电路是可变增益放大器电路，并且输出信号的DC偏移随可变增益放大器的增益而变化。

7. 发明授权

US07167045B1 System and method for modifying output power of an information communication system 有权
标题翻译：用于修改信息通信系统的输出功率的系统和方法
公开(公告)号：US07167045B1
公开(公告)日：2007-01-23
申请号：US10861481
申请日：2004-06-07
申请人： Sang Won Son , King Chun Tsai , Yuan-Ju Chao , Lawrence Tse
发明人： Sang Won Son , King Chun Tsai , Yuan-Ju Chao , Lawrence Tse
IPC分类号： H03G5/16 , H03F3/26
CPC分类号： H03G3/3042
摘要： A system for communicating information includes a variable gain amplifier (VGA) responsive to an input signal and a gain control signal for controlling a gain of the VGA. The system also includes a power amplifier responsive to the VGA. An output power level of the power amplifier is compared to a predetermined reference value to generate the gain control signal. The gain control signal is offset by a gain offset value. To change the output power level of the power amplifier from a first output power level to a second output power level, a first predetermined reference value and a first gain offset value associated with the first output power level are changed substantially concurrently to a second predetermined reference value and a second gain offset value, respectively, associated with the second output power level.
摘要翻译：用于传送信息的系统包括响应于输入信号的可变增益放大器（VGA）和用于控制VGA增益的增益控制信号。该系统还包括一个响应于VGA的功率放大器。将功率放大器的输出功率电平与预定参考值进行比较，以产生增益控制信号。增益控制信号被增益偏移值偏移。为了将功率放大器的输出功率电平从第一输出功率电平改变到第二输出功率电平，与第一输出功率电平相关联的第一预定参考值和第一增益偏移值基本同时地改变为第二预定参考值和与第二输出功率电平相关联的第二增益偏移值。

8. 发明授权

US06977444B1 Methods and apparatus for improving high frequency input/output performance 有权
标题翻译：改善高频输入/输出性能的方法和装置
公开(公告)号：US06977444B1
公开(公告)日：2005-12-20
申请号：US11034093
申请日：2005-01-12
申请人： Xiaodong Jin , Lawrence Tse , King Chun Tsai , George Chien , Shuran Wei
发明人： Xiaodong Jin , Lawrence Tse , King Chun Tsai , George Chien , Shuran Wei
IPC分类号： H01L23/48 , H01L23/49 , H01L23/60 , H01L23/66
CPC分类号： H01L24/49 , H01L23/60 , H01L23/66 , H01L24/06 , H01L24/48 , H01L2223/6611 , H01L2224/05553 , H01L2224/05554 , H01L2224/05599 , H01L2224/45015 , H01L2224/4809 , H01L2224/48091 , H01L2224/484 , H01L2224/49113 , H01L2224/85399 , H01L2924/00014 , H01L2924/01014 , H01L2924/01033 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2224/45099 , H01L2924/00
摘要： An input circuit for an integrated circuit (IC), which is mounted on a package having an input pin, rejects signal energy at a first frequency. A first bondwire arranged on the package has one end that communicates with the pin and an opposite end that communicates with components of the IC. A second bondwire located on the package has one end that communicates with the pin and an opposite end that communicates with a capacitance. The capacitance and an inductance of the first and second bondwires resonate at the first frequency to reject signal energy at the first frequency. Bondwires are also used to eliminate external components such as resonant components and impedance matching circuits to reduce cost.
摘要翻译：用于集成电路（IC）的输入电路，其安装在具有输入引脚的封装上，以第一频率拒绝信号能量。布置在封装上的第一接合线具有与引脚连通的一端和与IC的部件连通的相对端。位于封装上的第二接合线具有与销连通的一端和与电容连通的相对端。第一和第二键合线的电容和电感以第一频率谐振以在第一频率处抑制信号能量。 Bondwires也用于消除诸如谐振元件和阻抗匹配电路的外部元件，以降低成本。

9. 发明授权

US08605633B1 Frame/packet-based calibration for wireless transceivers 有权
标题翻译：无线收发器的帧/分组校准
公开(公告)号：US08605633B1
公开(公告)日：2013-12-10
申请号：US12907837
申请日：2010-10-19
申请人： Lawrence Tse , King Chun Tsai , George Chien , Tyson Leistiko
发明人： Lawrence Tse , King Chun Tsai , George Chien , Tyson Leistiko
IPC分类号： H04B7/00 , H04B7/216
CPC分类号： H04W56/003 , H04B1/40 , H04B17/21
摘要： A transceiver including a transceiver component with a first and second inputs and an output. The transceiver is configured to (i) receive an input signal having packets via the first input and (ii) generate output signals at the output based on the input signal. The transceiver further includes a first comparator configured to compare the output signals and generate a first comparison signal; a register configured to store the first comparison signal; a calibration circuit is configured to generate a current signal based on the first comparison signal to adjust a current in the transceiver component; and a signal generator is configured to generate a reference signal based on the current signal. The transceiver component is configured to (i) based on the current signal, adjust a performance parameter of the transceiver at times synchronized with the packets and (ii) generate the output signals based on the current signal and the reference signal.
摘要翻译：收发器，包括具有第一和第二输入和输出的收发器组件。收发器被配置为（i）经由第一输入接收具有分组的输入信号，以及（ii）基于输入信号在输出端生成输出信号。收发器还包括第一比较器，其被配置为比较输出信号并产生第一比较信号; 配置为存储第一比较信号的寄存器; 校准电路被配置为基于第一比较信号产生电流信号以调整收发器部件中的电流; 并且信号发生器被配置为基于当前信号产生参考信号。收发器组件被配置为（i）基于当前信号，在与分组同步的时间调整收发器的性能参数，以及（ii）基于当前信号和参考信号生成输出信号。

10. 发明授权

US07957487B1 Spurious component reduction 有权
标题翻译：杂散成分减少
公开(公告)号：US07957487B1
公开(公告)日：2011-06-07
申请号：US12581451
申请日：2009-10-19
申请人： King Chun Tsai
发明人： King Chun Tsai
IPC分类号： H04L25/03
CPC分类号： H04L25/03828 , H04L27/364
摘要： Apparatus, systems, and methods implementing techniques for reducing spurious components are described. According to one aspect, a wideband polyphase filter filters an input signal that has an associated first frequency. The wideband polyphase filter has poles corresponding to a first filter frequency and a second filter frequency, where the two filter frequencies are different. According to another aspect, a mixer mixes the filtered signal with a local-oscillator signal at a second frequency to produce an upconverted signal, where the second frequency is substantially an integer multiple of the first frequency.
摘要翻译：描述了实现减少杂散分量的技术的装置，系统和方法。根据一个方面，宽带多相滤波器对具有相关联的第一频率的输入信号进行滤波。宽带多相滤波器具有对应于第一滤波器频率和第二滤波器频率的极点，其中两个滤波器频率不同。根据另一方面，混频器将经滤波的信号与本地振荡器信号以第二频率混频以产生上变频信号，其中第二频率基本上是第一频率的整数倍。

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