专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20060058979A1 Method and system for calibrating integrated metrology systems and stand-alone metrology systems that acquire wafer state data 审中-公开
标题翻译：用于校准集成计量系统的方法和系统以及采集晶圆状态数据的独立测量系统
公开(公告)号：US20060058979A1
公开(公告)日：2006-03-16
申请号：US10940369
申请日：2004-09-14
申请人： Richard Markle , Kevin Lensing , Christopher Bode
发明人： Richard Markle , Kevin Lensing , Christopher Bode
IPC分类号： G01B15/00
CPC分类号： H01L21/67276
摘要： The present invention is directed to methods and systems for calibrating integrated metrology systems and stand-alone metrology systems that acquire wafer state data. In one illustrative embodiment, the method includes providing a plurality of process tools, each of the process tools comprising an integrated metrology system adapted to obtain wafer state data, and providing a plurality of stand-alone metrology tools, each of which are adapted to obtain wafer state data. The method further comprises processing at least one wafer through each of the process tools and each of the stand-alone metrology tools, wherein wafer state data for at least one wafer is acquired in each of the process tools and in each of the stand-alone metrology tools, and calibrating the integrated metrology system in at least one of the process tools or at least one of the stand-alone metrology tools based upon the wafer state data acquired for the wafer.
摘要翻译：本发明涉及用于校准集成计量系统和采集晶片状态数据的独立度量系统的方法和系统。在一个说明性实施例中，该方法包括提供多个处理工具，每个处理工具包括适于获得晶片状态数据的集成计量系统，以及提供多个独立计量工具，每个测量工具适于获得晶圆状态数据。该方法还包括通过每个处理工具和每个独立测量工具处理至少一个晶片，其中在每个处理工具中以及每个独立的测量工具中获取至少一个晶片的晶片状态数据测量工具，以及基于为晶片获取的晶片状态数据，在至少一个工艺工具或至少一个独立测量工具中校准集成测量系统。

2. 发明授权

US07838308B2 Method of controlling embedded material/gate proximity 有权
标题翻译：控制嵌入材料/栅极接近度的方法
公开(公告)号：US07838308B2
公开(公告)日：2010-11-23
申请号：US12119196
申请日：2008-05-12
申请人： Rohit Pal , David E. Brown , Alok Vaid , Kevin Lensing
发明人： Rohit Pal , David E. Brown , Alok Vaid , Kevin Lensing
IPC分类号： H01L21/00
CPC分类号： H01L29/7848 , H01L22/12 , H01L22/20 , H01L29/66636 , H01L29/78
摘要： A method that includes forming a gate of a semiconductor device on a substrate and forming a recess for an embedded silicon-straining material in source and drain regions for the gate. In this method, a proximity value, which is defined as a distance between the gate and a closest edge of the recess, is controlled by controlling formation of an oxide layer provided beneath the gate. The method can also include feedforward control of process steps in the formation of the recess based upon values measured during the formation of the recess. The method can also apply feedback control to adjust a subsequent recess formation process performed on a subsequent semiconductor device based on the comparison between a measured proximity value and a target proximity value to decrease a difference between a proximity value of the subsequent semiconductor device and the target proximity value.
摘要翻译：一种方法，包括在衬底上形成半导体器件的栅极，并在栅极的源极和漏极区域中形成嵌入的硅应变材料的凹部。在该方法中，通过控制形成在栅极下方的氧化物层来控制被定义为栅极和凹部的最近边缘之间的距离的接近值。该方法还可以包括基于在形成凹部期间测量的值来形成凹部中的工艺步骤的前馈控制。该方法还可以基于测量的接近度值和目标接近值之间的比较来应用反馈控制来调整对随后的半导体器件执行的随后的凹陷形成处理，以减小随后的半导体器件的接近值与目标之间的差异接近值。

3. 发明授权

US07682845B2 Methods for calibrating a process for growing an epitaxial silicon film and methods for growing an epitaxial silicon film 有权
标题翻译：用于校准用于生长外延硅膜的工艺的方法和用于生长外延硅膜的方法
公开(公告)号：US07682845B2
公开(公告)日：2010-03-23
申请号：US11964935
申请日：2007-12-27
申请人： Rohit Pal , Alok Vaid , Kevin Lensing
发明人： Rohit Pal , Alok Vaid , Kevin Lensing
IPC分类号： G01R31/26
CPC分类号： H01L22/12 , C30B25/16 , C30B29/06 , H01L21/02532 , H01L22/20
摘要： Methods are provided for calibrating a process for growing an epitaxial silicon-comprising film and for growing an epitaxial silicon-comprising film. One method comprises epitaxially growing a first silicon-comprising film on a first silicon substrate that has an adjacent non-crystalline-silicon structure that extends from said first silicon substrate. The step of epitaxially growing uses hydrochloric acid provided at a first hydrochloric acid flow rate for a first time period. A morphology of the first film relevant to the adjacent non-crystalline-silicon structure is analyzed and a thickness of the first film is measured. The first flow rate is adjusted to a second flow rate based on the morphology of the first film. The first time period is adjusted to a second time period based on the second flow rate and the thickness. A second silicon-comprising film on a second silicon substrate is epitaxially grown for the second time period using the second flow rate.
摘要翻译：提供了用于校准用于生长外延含硅膜并用于生长外延含硅膜的工艺的方法。一种方法包括在具有从所述第一硅衬底延伸的相邻非晶硅结构的第一硅衬底上外延生长第一含硅膜。外延生长的步骤使用以第一次盐酸流速提供的盐酸第一次。分析与相邻的非晶硅结构相关的第一膜的形态，并测量第一膜的厚度。基于第一膜的形态将第一流量调节到第二流量。基于第二流量和厚度将第一时间段调整到第二时间段。使用第二流量，在第二时间段外延生长第二硅衬底上的第二含硅膜。

4. 发明申请

US20090280579A1 METHOD OF CONTROLLING EMBEDDED MATERIAL/GATE PROXIMITY 有权
标题翻译：控制嵌入材料/栅格近似的方法
公开(公告)号：US20090280579A1
公开(公告)日：2009-11-12
申请号：US12119196
申请日：2008-05-12
申请人： Rohit Pal , David E. Brown , Alok Vaid , Kevin Lensing
发明人： Rohit Pal , David E. Brown , Alok Vaid , Kevin Lensing
IPC分类号： H01L21/66
CPC分类号： H01L29/7848 , H01L22/12 , H01L22/20 , H01L29/66636 , H01L29/78
摘要： A method that includes forming a gate of a semiconductor device on a substrate and forming a recess for an embedded silicon-straining material in source and drain regions for the gate. In this method, a proximity value, which is defined as a distance between the gate and a closest edge of the recess, is controlled by controlling formation of an oxide layer provided beneath the gate. The method can also include feedforward control of process steps in the formation of the recess based upon values measured during the formation of the recess. The method can also apply feedback control to adjust a subsequent recess formation process performed on a subsequent semiconductor device based on the comparison between a measured proximity value and a target proximity value to decrease a difference between a proximity value of the subsequent semiconductor device and the target proximity value.
摘要翻译：一种方法，包括在衬底上形成半导体器件的栅极，并在栅极的源极和漏极区域中形成嵌入的硅应变材料的凹部。在该方法中，通过控制形成在栅极下方的氧化物层来控制被定义为栅极和凹部的最近边缘之间的距离的接近值。该方法还可以包括基于在形成凹部期间测量的值来形成凹部中的工艺步骤的前馈控制。该方法还可以基于测量的接近度值和目标接近值之间的比较来应用反馈控制来调整对随后的半导体器件执行的随后的凹陷形成处理，以减小随后的半导体器件的接近值与目标之间的差异接近值。

5. 发明申请

US20090170223A1 METHODS FOR CALIBRATING A PROCESS FOR GROWING AN EPITAXIAL SILICON FILM AND METHODS FOR GROWING AN EPITAXIAL SILICON FILM 有权
标题翻译：用于校准生长外延硅膜的方法的方法和用于生长外延硅膜的方法
公开(公告)号：US20090170223A1
公开(公告)日：2009-07-02
申请号：US11964935
申请日：2007-12-27
申请人： Rohit PAL , Alok VAID , Kevin LENSING
发明人： Rohit PAL , Alok VAID , Kevin LENSING
IPC分类号： H01L21/66
CPC分类号： H01L22/12 , C30B25/16 , C30B29/06 , H01L21/02532 , H01L22/20
摘要： Methods are provided for calibrating a process for growing an epitaxial silicon-comprising film and for growing an epitaxial silicon-comprising film. One method comprises epitaxially growing a first silicon-comprising film on a first silicon substrate that has an adjacent non-crystalline-silicon structure that extends from said first silicon substrate. The step of epitaxially growing uses hydrochloric acid provided at a first hydrochloric acid flow rate for a first time period. A morphology of the first film relevant to the adjacent non-crystalline-silicon structure is analyzed and a thickness of the first film is measured. The first flow rate is adjusted to a second flow rate based on the morphology of the first film. The first time period is adjusted to a second time period based on the second flow rate and the thickness. A second silicon-comprising film on a second silicon substrate is epitaxially grown for the second time period using the second flow rate.
摘要翻译：提供了用于校准用于生长外延含硅膜并用于生长外延含硅膜的工艺的方法。一种方法包括在具有从所述第一硅衬底延伸的相邻非晶硅结构的第一硅衬底上外延生长第一含硅膜。外延生长的步骤使用以第一次盐酸流速提供的盐酸第一次。分析与相邻的非晶硅结构相关的第一膜的形态，并测量第一膜的厚度。基于第一膜的形态将第一流量调节到第二流量。基于第二流量和厚度将第一时间段调整到第二时间段。使用第二流量，在第二时间段外延生长第二硅衬底上的第二含硅膜。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式