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1. 发明授权

US08723294B2 Resistance element and inverting buffer circuit 有权
标题翻译：电阻元件和反相缓冲电路
公开(公告)号：US08723294B2
公开(公告)日：2014-05-13
申请号：US13274535
申请日：2011-10-17
申请人： Ken Yamamura
发明人： Ken Yamamura
IPC分类号： H01L21/02
CPC分类号： H01L27/0802 , H01L27/11898 , H01L28/20
摘要： It is possible to suppress a change in a resistance value caused by a potential of a semiconductor substrate 10 near a resistance element layer 13, a power line passing on or above the resistance element layer, or a signal line, without generating useless current or a distortion in a signal. A first conductive layer 15 biased by the potential of a first electrode 11 and a second conductive layer 16 biased by the potential of a second electrode 12 cover below the resistance element layer equally. A change in the resistance value caused by a potential difference between the resistance element layer and a neighboring semiconductor substrate 14 is cancelled by the first conductive layer and the second conductive layer covering at least one of above and below the resistance element layer with both ends biased, so the change in the resistance value is suppressed.
摘要翻译：可以抑制由电阻元件层13附近的半导体衬底10的电位，通过电阻元件层或信号线上方的电力线引起的电阻值的变化，而不产生无用的电流或信号失真。由第一电极11的电位和由第二电极12的电位偏置的第二导电层16的第一导电层15均匀地覆盖在电阻元件层下方。由电阻元件层和相邻的半导体衬底14之间的电位差引起的电阻值的变化被第一导电层和第二导电层抵消，第二导电层覆盖电阻元件层的上下两个中的至少一个，两端被偏置所以电阻值的变化被抑制。

2. 发明申请

US20120097910A1 Resistance Element and Inverting Buffer Circuit 有权
标题翻译：电阻元件和反相缓冲电路
公开(公告)号：US20120097910A1
公开(公告)日：2012-04-26
申请号：US13274535
申请日：2011-10-17
申请人： Ken YAMAMURA
发明人： Ken YAMAMURA
IPC分类号： H01L45/00
CPC分类号： H01L27/0802 , H01L27/11898 , H01L28/20
摘要： There is provided a resistance element and an inverting buffer circuit to suppress a change in a resistance value caused by a potential of a semiconductor substrate in the neighborhood of the resistance element layer, a power line passing on or above the resistance element layer, or a signal line, without generating useless current or a distortion in a signal. In the resistance element 10, a resistance element layer 13 having a first electrode 11 and a second electrode 12 is formed on a semiconductor substrate 14. A first conductive layer 15 biased by the potential of the first electrode 11 and a second conductive layer 16 biased by the potential of the second electrode 12 cover below the resistance element layer 13 equally, so that a change in the resistance value is suppressed.
摘要翻译：提供了电阻元件和反相缓冲电路，以抑制由电阻元件层附近的半导体衬底的电位，通过电阻元件层上方或上方的电力线引起的电阻值的变化，或信号线，不产生无用电流或信号失真。在电阻元件10中，在半导体衬底14上形成具有第一电极11和第二电极12的电阻元件层13.由第一电极11的电位和第二导电层16偏置的第一导电层15偏置通过第二电极12的电位等同地覆盖电阻元件层13下方，从而抑制电阻值的变化。

3. 发明申请

US20060202754A1 Digital switching amplifier 有权
标题翻译：数字开关放大器
公开(公告)号：US20060202754A1
公开(公告)日：2006-09-14
申请号：US11370052
申请日：2006-03-08
申请人： Ken Yamamura , Akihiro Ikehara , Naoko Hyodo
发明人： Ken Yamamura , Akihiro Ikehara , Naoko Hyodo
IPC分类号： H03F1/36
CPC分类号： H03F1/26 , H03F1/34 , H03F3/217 , H03F2200/331
摘要： There is provided a digital switching amplifier capable of enhancing an S/N ratio at the time of a small signal output and reducing current consumption and electromagnetic interference (EMI). The digital switching amplifier according to the present invention is provided with an integrator 11 for integrating an input signal, quantizer 12 for quantizing the output signal of the integrator 11 with resolutions different for each of the predetermined signal regions, pulse width modulator 13 for performing pulse width modulation for each of signals quantized with different resolutions by the quantizer 12 using different proportionality coefficients, switching circuit 14 for providing the load 15 with electrical signals different in value for each of pulse-width modulated signals with different proportionality coefficients by the pulse width modulator 13 in response to the pulse-width modulated signal, and feedback circuit 17 for negatively feeding back the output of the quantizer 12 to the input of the integrator 11.
摘要翻译：提供了能够在小信号输出时提高S / N比并减少电流消耗和电磁干扰（EMI）的数字开关放大器。根据本发明的数字开关放大器设置有用于对输入信号进行积分的积分器11，用于量化积分器11的输出信号的量化器12具有针对每个预定信号区域的分辨率不同的脉冲宽度调制器13，用于执行脉冲使用不同比例系数由量化器12以不同分辨率量化的每个信号的宽度调制;切换电路14，用于通过脉冲宽度调制器为不同比例系数的脉冲宽度调制信号提供不同值的电信号响应于脉冲宽度调制信号，以及用于将量化器12的输出负反馈给积分器11的输入的反馈电路17。

4. 发明授权

US06693574B2 D/A converter and delta-sigma D/A converter 有权
标题翻译： D / A转换器和delta-sigma D / A转换器
公开(公告)号：US06693574B2
公开(公告)日：2004-02-17
申请号：US10394155
申请日：2003-03-24
申请人： Ken Yamamura
发明人： Ken Yamamura
IPC分类号： H03M266
CPC分类号： H03M1/804 , H03M1/0682 , H03M3/502
摘要： When a clock &phgr;1 is in high state, based on a digital signal, capacitive elements C11 to C1i are connected between a reference voltage Vr+ or Vr− and a sampling ground V1 to hold a charge corresponding to difference between the reference voltage and sampling ground V1 while capacitive elements C21 to C2i are connected between a reference voltage Vr+ or Vr− and a sampling ground V2 to hold a charge corresponding to difference between the reference voltage and sampling ground V2. When a clock &phgr;2 is in high state, the capacitive elements C11 to C1i and C21 to C2i are connected, in parallel with a feedback capacitive element Cfb, between an input terminal and output terminal of an operational amplifier 100. To obtain a D/A converter which operates at a lower supply voltage and produces output signals low in harmonic components and noise components.
摘要翻译：当时钟phi1处于高电平状态时，基于数字信号，电容元件C11至C1i连接在参考电压Vr +或Vr-与采样接地V1之间，以保持对应于参考电压和采样接地V1之间的差的电荷而电容元件C21至C2i连接在参考电压Vr +或Vr-与采样接地V2之间，以保持对应于参考电压和采样接地V2之间的差的电荷。当时钟phi2处于高电平状态时，电容元件C11至C1i和C21至C2i与反馈电容元件Cfb并联连接在运算放大器100的输入端和输出端之间。为了获得D / A 转换器，其在较低的电源电压下工作，并产生低谐波分量和噪声分量的输出信号。

5. 发明授权

US5334803A Semiconductor device and method of producing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US5334803A
公开(公告)日：1994-08-02
申请号：US968055
申请日：1992-10-28
申请人： Ken Yamamura , Naoto Ueda , Kazunari Michii , Hitoshi Fujimoto , Kiyoaki Tsumura , Hitoshi Sasaki , Takashi Miyamoto
发明人： Ken Yamamura , Naoto Ueda , Kazunari Michii , Hitoshi Fujimoto , Kiyoaki Tsumura , Hitoshi Sasaki , Takashi Miyamoto
IPC分类号： H01L21/60 , H01L23/485 , H01L23/495 , H01L23/02 , H01L23/28 , H01R43/00
CPC分类号： H01L24/85 , H01L23/49503 , H01L23/4951 , H01L23/49537 , H01L23/49551 , H01L24/05 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/06136 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48253 , H01L2224/4826 , H01L2224/48465 , H01L2224/48599 , H01L2224/4899 , H01L2224/49171 , H01L2224/78301 , H01L2224/85181 , H01L2224/85205 , H01L24/45 , H01L24/78 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/0102 , H01L2924/01033 , H01L2924/01068 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2924/20752 , H01L2924/20753 , H01L2924/30105 , Y10T29/49146 , Y10T29/49158 , Y10T29/49169 , Y10T29/49171
摘要： A semiconductor device of the present invention accommodates a large semiconductor chip in a downsized package without impairing its reliability. The semiconductor chip is bonded on a relatively small die pad. Common inner leads and a plurality of inner leads are disposed opposite and spaced from the semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap between the semiconductor chip and the common inner leads and the plurality of inner leads is filled with a resin which forms part of a resin package.
摘要翻译：本发明的半导体器件在小尺寸封装中容纳大型半导体芯片，而不损害其可靠性。半导体芯片被接合在相对较小的管芯焊盘上。通常的内引线和多个内引线与半导体芯片相对设置并间隔0.1mm至0.4mm的间隙，并且半导体芯片与公共内引线之间的间隙和多个内引线填充有形成树脂封装的一部分的树脂。

6. 发明申请

US20080297183A1 PROBE CARD HAVING COLUMNAR BASE PORTION AND METHOD OF PRODUCING THE SAME 审中-公开
标题翻译：具有柱状基部的探针卡及其制造方法
公开(公告)号：US20080297183A1
公开(公告)日：2008-12-04
申请号：US12050085
申请日：2008-03-17
申请人： Ken YAMAMURA , Shinji MURATA
发明人： Ken YAMAMURA , Shinji MURATA
IPC分类号： G01R1/067 , G01R3/00
CPC分类号： G01R1/06733 , G01R1/06755 , Y10T29/49204
摘要： A probe card includes a flat plate-shaped wiring board, a columnar base portion, and a thee-dimensional spiral contactor. The base portion is interposed between a wiring pattern of the wiring board and the bottom of the contactor.
摘要翻译：探针卡包括平板状布线板，柱状基部和直径螺旋接触器。基部插入在布线板的布线图案和接触器的底部之间。

7. 发明授权

US06552384B2 Thin-film capacitor element and electronic circuit board on which thin-film capacitor element is formed 失效
公开(公告)号：US06552384B2
公开(公告)日：2003-04-22
申请号：US09898670
申请日：2001-07-02
申请人： Shinji Murata , Ken Yamamura , Mitsuru Tokuta
发明人： Shinji Murata , Ken Yamamura , Mitsuru Tokuta
IPC分类号： H01L2362
CPC分类号： H01L28/40 , H01L2224/4813 , H01L2924/19107 , H05K1/0306 , H05K1/162 , H05K1/165 , H05K1/167 , H05K3/0023 , H05K3/108 , H05K3/386 , H05K3/388 , H05K2201/0175 , H05K2201/0179 , H05K2201/0317 , H05K2201/09763 , H05K2201/09909
摘要： In order to provide an electronic circuit board capable of preventing the breakdown voltage of a capacitor element from dropping and excellent in high frequency performance, a positive type photoresist is spin-coated over the surface of an alumina substrate and is exposed to light and developed to form an insulating layer partially, followed by formation of a capacitor element by successively stacking a lower electrode, a dielectric layer and an upper electrode over this insulating layer, further followed by formation of a resistance element, an inductor element and a transmission line, each in a filmy state, over the surface of the alumina substrate.

8. 发明授权

US5594488A Thermal head 失效
标题翻译：热头
公开(公告)号：US5594488A
公开(公告)日：1997-01-14
申请号：US438573
申请日：1995-05-10
申请人： Noboru Tsushima , Toshiya Endoh , Satoru Sasaki , Ken Yamamura , Takashi Shirakawa , Toshifumi Nakatani , Akinori Takahashi
发明人： Noboru Tsushima , Toshiya Endoh , Satoru Sasaki , Ken Yamamura , Takashi Shirakawa , Toshifumi Nakatani , Akinori Takahashi
IPC分类号： B41J2/335 , B41J2/32
CPC分类号： B41J2/3351 , B41J2/33515 , B41J2/33545 , B41J2/3355 , B41J2/3357
摘要： A thermal head including a temperature keeping layer disposed on a substrate, a plurality of heat generating elements formed on the temperature keeping layer, a plurality of individual electrodes connected to the corresponding heat generating elements, a common electrode connected to the heat generating elements, respectively. Each heat generating element includes a heat generating portion formed between one of the individual electrodes and the common electrode. Each of the individual electrodes and the common electrode have a dual layered structure including a lower electrode and an upper electrode, the lower electrode being formed between the temperature keeping layer and one of the heat generating elements, and the upper electrode being formed above the heat generating element.
摘要翻译：一种热敏头，包括设置在基板上的保温层，形成在保温层上的多个发热元件，连接到相应的发热元件的多个单独的电极，分别连接到发热元件的公共电极。每个发热元件包括在单个电极之间形成的发热部分和公共电极。单个电极和公共电极中的每一个具有包括下电极和上电极的双层结构，下电极形成在保温层和一个发热元件之间，上电极形成在热生成元素。

9. 发明授权

US07330069B2 Digital switching amplifier 有权
标题翻译：数字开关放大器
公开(公告)号：US07330069B2
公开(公告)日：2008-02-12
申请号：US11370052
申请日：2006-03-08
申请人： Ken Yamamura , Akihiro Ikehara , Naoko Hyodo
发明人： Ken Yamamura , Akihiro Ikehara , Naoko Hyodo
IPC分类号： H03F3/38
CPC分类号： H03F1/26 , H03F1/34 , H03F3/217 , H03F2200/331
摘要： There is provided a digital switching amplifier capable of enhancing an S/N ratio at the time of a small signal output and reducing current consumption and electromagnetic interference (EMI). The digital switching amplifier according to the present invention is provided with an integrator 11 for integrating an input signal, quantizer 12 for quantizing the output signal of the integrator 11 with resolutions different for each of the predetermined signal regions, pulse width modulator 13 for performing pulse width modulation for each of signals quantized with different resolutions by the quantizer 12 using different proportionality coefficients, switching circuit 14 for providing the load 15 with electrical signals different in value for each of pulse-width modulated signals with different proportionality coefficients by the pulse width modulator 13 in response to the pulse-width modulated signal, and feedback circuit 17 for negatively feeding back the output of the quantizer 12 to the input of the integrator 11.
摘要翻译：提供了能够在小信号输出时提高S / N比并减少电流消耗和电磁干扰（EMI）的数字开关放大器。根据本发明的数字开关放大器设置有用于对输入信号进行积分的积分器11，用于量化积分器11的输出信号的量化器12具有针对每个预定信号区域的分辨率不同的脉冲宽度调制器13，用于执行脉冲使用不同比例系数由量化器12以不同分辨率量化的每个信号的宽度调制;切换电路14，用于通过脉冲宽度调制器为不同比例系数的脉冲宽度调制信号提供不同值的电信号响应于脉冲宽度调制信号，以及用于将量化器12的输出负反馈给积分器11的输入的反馈电路17。

10. 再颁专利

USRE35496E Semiconductor device and method of producing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：USRE35496E
公开(公告)日：1997-04-29
申请号：US525174
申请日：1995-09-08
申请人： Ken Yamamura , Naoto Ueda , Kazunari Michii , Hitoshi Fujimoto , Kiyoaki Tsumura , Hitoshi Sasaki , Takashi Miyamoto
发明人： Ken Yamamura , Naoto Ueda , Kazunari Michii , Hitoshi Fujimoto , Kiyoaki Tsumura , Hitoshi Sasaki , Takashi Miyamoto
IPC分类号： H01L21/60 , H01L23/485 , H01L23/495 , H01L23/02 , H01L23/08 , H01L43/00
CPC分类号： H01L24/85 , H01L23/49503 , H01L23/4951 , H01L23/49537 , H01L23/49551 , H01L24/05 , H01L24/06 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/06136 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48247 , H01L2224/48253 , H01L2224/4826 , H01L2224/48465 , H01L2224/48599 , H01L2224/4899 , H01L2224/49171 , H01L2224/78301 , H01L2224/85181 , H01L2224/85205 , H01L24/45 , H01L24/78 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/0102 , H01L2924/01033 , H01L2924/01068 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/181 , H01L2924/20752 , H01L2924/20753 , H01L2924/30105 , Y10T29/49146 , Y10T29/49158 , Y10T29/49169 , Y10T29/49171
摘要： A semiconductor device of the present invention accommodates a large semiconductor chip in a downsized package without impairing its reliability. The semiconductor chip is bonded on a relatively small die pad. Common inner leads and a plurality of inner leads are disposed opposite and spaced from the semiconductor chip by a gap ranging from 0.1 mm to 0.4 mm and the gap between the semiconductor chip and the common inner leads and the plurality of inner leads is filled with a resin which forms pan of a resin package.
摘要翻译：本发明的半导体器件在小尺寸封装中容纳大型半导体芯片，而不损害其可靠性。半导体芯片被接合在相对较小的管芯焊盘上。通常的内部引线和多个内部引线与半导体芯片相对设置并间隔0.1mm至0.4mm的间隙，并且半导体芯片与公共内部引线之间的间隙以及多个内部引线填充有形成树脂包装盘的树脂。

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