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2. 发明申请

US20120097910A1 Resistance Element and Inverting Buffer Circuit 有权
标题翻译：电阻元件和反相缓冲电路
公开(公告)号：US20120097910A1
公开(公告)日：2012-04-26
申请号：US13274535
申请日：2011-10-17
申请人： Ken YAMAMURA
发明人： Ken YAMAMURA
IPC分类号： H01L45/00
CPC分类号： H01L27/0802 , H01L27/11898 , H01L28/20
摘要： There is provided a resistance element and an inverting buffer circuit to suppress a change in a resistance value caused by a potential of a semiconductor substrate in the neighborhood of the resistance element layer, a power line passing on or above the resistance element layer, or a signal line, without generating useless current or a distortion in a signal. In the resistance element 10, a resistance element layer 13 having a first electrode 11 and a second electrode 12 is formed on a semiconductor substrate 14. A first conductive layer 15 biased by the potential of the first electrode 11 and a second conductive layer 16 biased by the potential of the second electrode 12 cover below the resistance element layer 13 equally, so that a change in the resistance value is suppressed.
摘要翻译：提供了电阻元件和反相缓冲电路，以抑制由电阻元件层附近的半导体衬底的电位，通过电阻元件层上方或上方的电力线引起的电阻值的变化，或信号线，不产生无用电流或信号失真。在电阻元件10中，在半导体衬底14上形成具有第一电极11和第二电极12的电阻元件层13.由第一电极11的电位和第二导电层16偏置的第一导电层15偏置通过第二电极12的电位等同地覆盖电阻元件层13下方，从而抑制电阻值的变化。

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