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1. 发明授权

US09195352B2 Touch sensor panel controller and semiconductor device 有权
标题翻译：触摸传感器面板控制器和半导体器件
公开(公告)号：US09195352B2
公开(公告)日：2015-11-24
申请号：US13467214
申请日：2012-05-09
申请人： Akihito Akai , Tatsuya Ishii , Kazuya Endo , Shinobu Notomi , Akihiro Kodama
发明人： Akihito Akai , Tatsuya Ishii , Kazuya Endo , Shinobu Notomi , Akihiro Kodama
IPC分类号： G09G3/36 , G06F3/044 , G09G3/20 , G06F3/041 , G02F1/1333
CPC分类号： G06F3/044 , G02F1/13338 , G06F3/0416 , G09G3/2092
摘要： Provided is a touch sensor panel which can increase the detection sensitivity of a touch relatively readily. The touch sensor panel controller supplies drive electrodes of a touch sensor panel with a high-voltage AC drive signal with its low level set to a negative voltage and drives them. The time of change of a drive waveform supplied to the drive electrodes of the touch sensor panel is shifted relative to the time of change of a drive waveform supplied to a display scan electrode. The touch sensor panel controller uses a charge pump in synchronization with clock signals of more than one phase to produce a high drive voltage to activate drive electrodes of the touch sensor panel, and the clock signals of more than one phase are initialized each time the drive electrode is subjected to AC pulse driving.
摘要翻译：提供了可以相对容易地增加触摸的检测灵敏度的触摸传感器面板。触摸传感器面板控制器为触摸传感器面板的驱动电极提供高电压交流驱动信号，其低电平设置为负电压并驱动它们。提供给触摸传感器面板的驱动电极的驱动波形的变化时间相对于提供给显示扫描电极的驱动波形的变化时间移动。触摸传感器面板控制器使用与多于一相的时钟信号同步的电荷泵来产生高驱动电压以激活触摸传感器面板的驱动电极，并且每次驱动器初始化多于一相的时钟信号电极进行交流脉冲驱动。

2. 发明授权

US07492341B2 Semiconductor circuit 有权
标题翻译：半导体电路
公开(公告)号：US07492341B2
公开(公告)日：2009-02-17
申请号：US10895884
申请日：2004-07-22
申请人： Toshikazu Tachibana , Yoshitaka Iwasaki , Kazuya Endo , Goro Sakamaki
发明人： Toshikazu Tachibana , Yoshitaka Iwasaki , Kazuya Endo , Goro Sakamaki
IPC分类号： G09G5/00
CPC分类号： G09G3/3688 , G09G3/3677
摘要： A semiconductor circuit with the reduced scale of circuitry and a semiconductor integrated circuit chip which is obtained by integrating the semiconductor circuit and enables chip size reduction are provided. For this purpose, a two-decode method is used. The method uses: a pre-decode circuit comprising a first decoder of the preceding stage which decodes an arbitrary bit of an address signal of eight bits and a second decoder of the preceding stage which decodes the remaining bits; level conversion circuits which shift the output of the pre-decode circuit; and post-decode circuits which decode the decode outputs of the decoders in the pre-decode circuit, level-converted through the level conversion circuits.
摘要翻译：提供了通过集成半导体电路并实现芯片尺寸减小而获得的缩小电路规模的半导体电路和半导体集成电路芯片。为此，使用双解码方法。该方法使用：预解码电路，包括前级的第一解码器，其对八位地址信号的任意位进行解码，以及解码剩余位的前一级的第二解码器; 电平转换电路，其使预解码电路的输出移位; 以及后解码电路，其解码通过电平转换电路进行电平转换的预解码电路中的解码器的解码输出。

3. 发明授权

US07110274B1 Semiconductor integrated circuit with voltage generation circuit, liquid crystal display controller and mobile electric equipment 有权
公开(公告)号：US07110274B1
公开(公告)日：2006-09-19
申请号：US11033308
申请日：2005-01-12
申请人： Kazuya Endo , Naoki Miyamoto , Toshio Mizuno , Takayuki Nakaji , Takatoshi Uchida , Kazuo Ookado , Yoshikazu Yokota
发明人： Kazuya Endo , Naoki Miyamoto , Toshio Mizuno , Takayuki Nakaji , Takatoshi Uchida , Kazuo Ookado , Yoshikazu Yokota
IPC分类号： H02M1/00 , H03K3/01 , G09G3/10
CPC分类号： G09G3/3622 , G09G3/3611 , G09G3/3696 , G09G2310/0245 , G09G2310/0278 , G09G2310/08 , G09G2330/02 , G09G2330/021 , G09G2330/026 , H02M3/07 , H02M2003/071
摘要： There is to be provided a liquid crystal drive controller with a built-in power supply circuit wherein latch-up is made difficult to arise even if one amplitude level of the segment line drive voltage is set to the ground potential and the levels of other liquid crystal drive voltages are determined accordingly. A semiconductor integrated circuit with a built-in power supply circuit, wherein a negative voltage generated in a power supply circuit is applied to a substrate or a well region as a bias voltage, is provided with a switch for temporarily applying the ground potential to the substrate or well region to be biased with the negative voltage at the time of starting up the power supply circuit.

4. 发明授权

US06898096B2 Semiconductor integrated circuit with voltage generation circuit, liquid crystal display controller and mobile electric equipment 有权
标题翻译：具有电压发生电路的半导体集成电路，液晶显示控制器和移动电气设备
公开(公告)号：US06898096B2
公开(公告)日：2005-05-24
申请号：US10091405
申请日：2002-03-07
申请人： Kazuya Endo , Naoki Miyamoto , Toshio Mizuno , Takayuki Nakaji , Takatoshi Uchida , Kazuo Ookado , Yoshikazu Yokota
发明人： Kazuya Endo , Naoki Miyamoto , Toshio Mizuno , Takayuki Nakaji , Takatoshi Uchida , Kazuo Ookado , Yoshikazu Yokota
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , H01L21/822 , H01L27/04 , H02M1/00 , H03K3/01
CPC分类号： G09G3/3622 , G09G3/3611 , G09G3/3696 , G09G2310/0245 , G09G2310/0278 , G09G2310/08 , G09G2330/02 , G09G2330/021 , G09G2330/026 , H02M3/07 , H02M2003/071
摘要： There is to be provided a liquid crystal drive controller with a built-in power supply circuit wherein latch-up is made difficult to arise even if one amplitude level of the segment line drive voltage is set to the ground potential and the levels of other liquid crystal drive voltages are determined accordingly. A semiconductor integrated circuit with a built-in power supply circuit, wherein a negative voltage generated in a power supply circuit is applied to a substrate or a well region as a bias voltage, is provided with a switch for temporarily applying the ground potential to the substrate or well region to be biased with the negative voltage at the time of starting up the power supply circuit.
摘要翻译：要提供具有内置电源电路的液晶驱动控制器，其中即使将片段线驱动电压的一个幅度电平设置为地电位并且其它液体的电平也难以产生闩锁相应地确定晶体驱动电压。一种具有内置电源电路的半导体集成电路，其中在电源电路中产生的负电压作为偏置电压施加到衬底或阱区，设置有用于将接地电位临时施加到衬底或阱区域在启动电源电路时被负电压偏置。

5. 发明授权

US5237187A Semiconductor memory circuit device and method for fabricating same 失效
标题翻译：半导体存储器电路器件及其制造方法
公开(公告)号：US5237187A
公开(公告)日：1993-08-17
申请号：US799541
申请日：1991-11-27
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region, which is a memory cell array region, a first MISFET having a gate electrode and source and drain regions; first and second capacitor electrodes and a dielectric film extended over a first insulating film and over the gate electrode; a second insulating film disposed on the second capacitor electrode; a third insulating film interposed between the first insulating film and first capacitor electrode; and a first wiring positioned on the second insulating film. In a second region of the device, which is a peripheral circuit region, there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a second insulating film on a third insulating film, the third insulating film being interposed between the first and second insulating films; and a second wiring on the second insulating film. The second wiring is formed by the same level conductor layer as that forming the first wiring. Similarly, the first through third insulating films of the first region are correspondingly associated with the first through third insulating films of the second region, respectively.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，存在作为存储单元阵列区域的第一区域，第一 MISFET具有栅极电极和源极和漏极区域; 第一和第二电容器电极以及在第一绝缘膜上并在栅电极上方延伸的电介质膜; 设置在所述第二电容器电极上的第二绝缘膜; 介于所述第一绝缘膜和所述第一电容器电极之间的第三绝缘膜; 以及位于第二绝缘膜上的第一布线。在作为外围电路区域的器件的第二区域中，存在具有栅极电极和源极和漏极区域的第二MISFET，栅电极上的第一绝缘膜; 在第三绝缘膜上的第二绝缘膜，所述第三绝缘膜介于所述第一和第二绝缘膜之间; 以及在第二绝缘膜上的第二布线。第二布线由与形成第一布线的层相同的导体层形成。类似地，第一区域的第一至第三绝缘膜分别与第二区域的第一至第三绝缘膜相关联。

6. 发明申请

US20120287081A1 TOUCH SENSOR PANEL CONTROLLER AND SEMICODUCTOR DEVICE 有权
标题翻译：触摸传感器面板控制器和半导体器件
公开(公告)号：US20120287081A1
公开(公告)日：2012-11-15
申请号：US13467214
申请日：2012-05-09
申请人： Akihito AKAI , Tatsuya ISHII , Kazuya ENDO , Shinobu NOTOMI , Akihiro KODAMA
发明人： Akihito AKAI , Tatsuya ISHII , Kazuya ENDO , Shinobu NOTOMI , Akihiro KODAMA
IPC分类号： G06F3/044
CPC分类号： G06F3/044 , G02F1/13338 , G06F3/0416 , G09G3/2092
摘要： Provided is a touch sensor panel which can increase the detection sensitivity of a touch relatively readily. The touch sensor panel controller supplies drive electrodes of a touch sensor panel with a high-voltage AC drive signal with its low level set to a negative voltage and drives them. The time of change of a drive waveform supplied to the drive electrodes of the touch sensor panel is shifted relative to the time of change of a drive waveform supplied to a display scan electrode. The touch sensor panel controller uses a charge pump in synchronization with clock signals of more than one phase to produce a high drive voltage to activate drive electrodes of the touch sensor panel, and the clock signals of more than one phase are initialized each time the drive electrode is subjected to AC pulse driving.
摘要翻译：提供了可以相对容易地增加触摸的检测灵敏度的触摸传感器面板。触摸传感器面板控制器为触摸传感器面板的驱动电极提供高电压交流驱动信号，其低电平设置为负电压并驱动它们。提供给触摸传感器面板的驱动电极的驱动波形的变化时间相对于提供给显示扫描电极的驱动波形的变化时间移动。触摸传感器面板控制器使用与多于一相的时钟信号同步的电荷泵来产生高驱动电压以激活触摸传感器面板的驱动电极，并且每次驱动器初始化多于一相的时钟信号电极进行交流脉冲驱动。

7. 发明授权

US07317627B2 Semiconductor integrated circuit with voltage generation circuit, liquid crystal display controller and mobile electric equipment 有权
标题翻译：具有电压发生电路的半导体集成电路，液晶显示控制器和移动电气设备
公开(公告)号：US07317627B2
公开(公告)日：2008-01-08
申请号：US11797793
申请日：2007-05-08
申请人： Kazuya Endo , Naoki Miyamoto , Toshio Mizuno , Takayuki Nakaji , Takatoshi Uchida , Kazuo Ookado , Yoshikazu Yokota
发明人： Kazuya Endo , Naoki Miyamoto , Toshio Mizuno , Takayuki Nakaji , Takatoshi Uchida , Kazuo Ookado , Yoshikazu Yokota
IPC分类号： H02M1/00 , H03K3/01 , G09G3/36 , G05F1/40
CPC分类号： G09G3/3622 , G09G3/3611 , G09G3/3696 , G09G2310/0245 , G09G2310/0278 , G09G2310/08 , G09G2330/02 , G09G2330/021 , G09G2330/026 , H02M3/07 , H02M2003/071
摘要： There is to be provided a liquid crystal drive controller with a built-in power supply circuit wherein latch-up is made difficult to arise even if one amplitude level of the segment line drive voltage is set to the ground potential and the levels of other liquid crystal drive voltages are determined accordingly. A semiconductor integrated circuit with a built-in power supply circuit, wherein a negative voltage generated in a power supply circuit is applied to a substrate or a well region as a bias voltage, is provided with a switch for temporarily applying the ground potential to the substrate or well region to be biased with the negative voltage at the time of starting up the power supply circuit.
摘要翻译：要提供具有内置电源电路的液晶驱动控制器，其中即使将片段线驱动电压的一个幅度电平设置为地电位并且其它液体的电平也难以产生闩锁相应地确定晶体驱动电压。一种具有内置电源电路的半导体集成电路，其中在电源电路中产生的负电压作为偏置电压施加到衬底或阱区，设置有用于将接地电位临时施加到衬底或阱区域在启动电源电路时被负电压偏置。

8. 发明授权

US07233511B2 Semiconductor integrated circuit with voltage generation circuit, liquid crystal display controller and mobile electric equipment 有权
标题翻译：具有电压发生电路的半导体集成电路，液晶显示控制器和移动电气设备
公开(公告)号：US07233511B2
公开(公告)日：2007-06-19
申请号：US11503234
申请日：2006-08-14
申请人： Kazuya Endo , Naoki Miyamoto , Toshio Mizuno , Takayuki Nakaji , Takatoshi Uchida , Kazuo Ookado , Yoshikazu Yokota
发明人： Kazuya Endo , Naoki Miyamoto , Toshio Mizuno , Takayuki Nakaji , Takatoshi Uchida , Kazuo Ookado , Yoshikazu Yokota
IPC分类号： H02M1/00 , H03K3/01 , G09G3/36
CPC分类号： G09G3/3622 , G09G3/3611 , G09G3/3696 , G09G2310/0245 , G09G2310/0278 , G09G2310/08 , G09G2330/02 , G09G2330/021 , G09G2330/026 , H02M3/07 , H02M2003/071
摘要： There is to be provided a liquid crystal drive controller with a built-in power supply circuit wherein latch-up is made difficult to arise even if one amplitude level of the segment line drive voltage is set to the ground potential and the levels of other liquid crystal drive voltages are determined accordingly. A semiconductor integrated circuit with a built-in power supply circuit, wherein a negative voltage generated in a power supply circuit is applied to a substrate or a well region as a bias voltage, is provided with a switch for temporarily applying the ground potential to the substrate or well region to be biased with the negative voltage at the time of starting up the power supply circuit.
摘要翻译：要提供具有内置电源电路的液晶驱动控制器，其中即使将片段线驱动电压的一个幅度电平设置为地电位并且其它液体的电平也难以产生闩锁相应地确定晶体驱动电压。一种具有内置电源电路的半导体集成电路，其中在电源电路中产生的负电压作为偏置电压施加到衬底或阱区，设置有用于将接地电位临时施加到衬底或阱区域在启动电源电路时被负电压偏置。

9. 发明申请

US20060208996A1 Semiconductor circuit 审中-公开
标题翻译：半导体电路
公开(公告)号：US20060208996A1
公开(公告)日：2006-09-21
申请号：US11337583
申请日：2006-01-24
申请人： Toshikazu Tachibana , Yoshitaka Iwasaki , Kazuya Endo , Goro Sakamaki
发明人： Toshikazu Tachibana , Yoshitaka Iwasaki , Kazuya Endo , Goro Sakamaki
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G3/20 , G09G3/3208 , G09G2310/0267
摘要： A two-stage decode system is provided which uses a pre-stage decoder comprising a pre-stage first decoder which decodes a bit of arbitrary part of address signals and a pre-stage second decoder which decodes the remaining bits, level shifters which respectively shift the levels of outputs of the pre-stage decoder, and post-stage decoders which respectively decode the decode outputs of the respective decoders in the pre-stage decoder, which have been level-shifted by the level shifters.
摘要翻译：提供了一种两级解码系统，其使用包括前级第一解码器的前级解码器，该前级解码器对地址信号的任意部分的位进行解码，以及解码其余位的前级第二解码器，分别移位的电平移位器前级解码器和后级解码器的输出电平分别解码前级解码器中的各个解码器的解码输出，这些译码器已由电平移位器电平移位。

10. 发明授权

US6043118A Semiconductor memory circuit device and method for fabricating a semiconductor memory device circuit 失效
标题翻译：半导体存储器电路器件及半导体存储器件电路的制造方法
公开(公告)号：US6043118A
公开(公告)日：2000-03-28
申请号：US800018
申请日：1997-02-13
申请人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
发明人： Naokatsu Suwanai , Hiroyuki Miyazawa , Atushi Ogishima , Masaki Nagao , Kyoichiro Asayama , Hiroyuki Uchiyama , Yoshiyuki Kaneko , Takashi Yoneoka , Kozo Watanabe , Kazuya Endo , Hiroki Soeda
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10844 , H01L27/10805 , H01L27/10808
摘要： In a semiconductor memory circuit device wherein each memory cell is constituted by a series circuit of a memory cell selecting MISFET and an information storing capacitor of a stacked structure, there are present in a first region as a memory cell array region a first MISFET having a gate electrode and source and drain regions; first and second capacity electrodes and a dielectric film extending onto a first insulating film on the gate electrode; a second insulating film positioned on the second capacity electrode; and a first wiring positioned on the second insulating film, while in a second region as a peripheral circuit region there are present a second MISFET having a gate electrode and source and drain regions; a first insulating film on the gate electrode; a third insulating film on the first insulating film; a second insulating film on the third insulating film; and a second wiring on the second insulating film.
摘要翻译：在其中每个存储单元由存储单元选择MISFET的串联电路和层叠结构的信息存储电容器构成的半导体存储器电路器件中，在第一区域中存在作为存储单元阵列区域的第一MISFET，其具有栅极电极和源极和漏极区域; 第一和第二电容电极和延伸到栅电极上的第一绝缘膜上的电介质膜; 位于所述第二容量电极上的第二绝缘膜; 以及位于所述第二绝缘膜上的第一布线，而在作为外围电路区域的第二区域中存在具有栅极电极和源极和漏极区域的第二MISFET; 栅电极上的第一绝缘膜; 第一绝缘膜上的第三绝缘膜; 第三绝缘膜上的第二绝缘膜; 以及在第二绝缘膜上的第二布线。

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